Merge branch 'i2c-for-linus' of git://jdelvare.pck.nerim.net/jdelvare-2.6

* 'i2c-for-linus' of git://jdelvare.pck.nerim.net/jdelvare-2.6:
  i2c-s3c2410: Build fix
  i2c/menelaus: Build fix
  i2c-mv64xxx: Reinitialize hw and driver on I2C bus hang
  i2c-mpc: Don't disable I2C module on stop condition
  i2c-iop3xx: Set I2C_CLASS_HWMON to adapter class
  i2c/isp1301_omap: Build fixes, whitespace
  i2c-mpc: Pass correct dev_id to free_irq on error path
  i2c-i801: Typo: erroneous
This commit is contained in:
Linus Torvalds 2007-08-14 09:52:12 -07:00
commit 3b993e8bee
7 changed files with 51 additions and 45 deletions

View File

@ -272,11 +272,11 @@ static int i801_block_transaction_byte_by_byte(union i2c_smbus_data *data,
/* Make sure the SMBus host is ready to start transmitting */
temp = inb_p(SMBHSTSTS);
if (i == 1) {
/* Erronenous conditions before transaction:
/* Erroneous conditions before transaction:
* Byte_Done, Failed, Bus_Err, Dev_Err, Intr, Host_Busy */
errmask = 0x9f;
} else {
/* Erronenous conditions during transaction:
/* Erroneous conditions during transaction:
* Failed, Bus_Err, Dev_Err, Intr */
errmask = 0x1e;
}

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@ -490,6 +490,7 @@ iop3xx_i2c_probe(struct platform_device *pdev)
memcpy(new_adapter->name, pdev->name, strlen(pdev->name));
new_adapter->id = I2C_HW_IOP3XX;
new_adapter->owner = THIS_MODULE;
new_adapter->class = I2C_CLASS_HWMON;
new_adapter->dev.parent = &pdev->dev;
new_adapter->nr = pdev->id;

View File

@ -105,6 +105,7 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, int writing)
schedule();
if (time_after(jiffies, orig_jiffies + timeout)) {
pr_debug("I2C: timeout\n");
writeccr(i2c, 0);
result = -EIO;
break;
}
@ -116,10 +117,12 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, int writing)
result = wait_event_interruptible_timeout(i2c->queue,
(i2c->interrupt & CSR_MIF), timeout * HZ);
if (unlikely(result < 0))
if (unlikely(result < 0)) {
pr_debug("I2C: wait interrupted\n");
else if (unlikely(!(i2c->interrupt & CSR_MIF))) {
writeccr(i2c, 0);
} else if (unlikely(!(i2c->interrupt & CSR_MIF))) {
pr_debug("I2C: wait timeout\n");
writeccr(i2c, 0);
result = -ETIMEDOUT;
}
@ -172,7 +175,6 @@ static void mpc_i2c_start(struct mpc_i2c *i2c)
static void mpc_i2c_stop(struct mpc_i2c *i2c)
{
writeccr(i2c, CCR_MEN);
writeccr(i2c, 0);
}
static int mpc_write(struct mpc_i2c *i2c, int target,
@ -261,6 +263,7 @@ static int mpc_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
while (readb(i2c->base + MPC_I2C_SR) & CSR_MBB) {
if (signal_pending(current)) {
pr_debug("I2C: Interrupted\n");
writeccr(i2c, 0);
return -EINTR;
}
if (time_after(jiffies, orig_jiffies + HZ)) {
@ -362,7 +365,7 @@ static int fsl_i2c_probe(struct platform_device *pdev)
fail_add:
if (i2c->irq != 0)
free_irq(i2c->irq, NULL);
free_irq(i2c->irq, i2c);
fail_irq:
iounmap(i2c->base);
fail_map:

View File

@ -107,6 +107,21 @@ struct mv64xxx_i2c_data {
*
*****************************************************************************
*/
/* Reset hardware and initialize FSM */
static void
mv64xxx_i2c_hw_init(struct mv64xxx_i2c_data *drv_data)
{
writel(0, drv_data->reg_base + MV64XXX_I2C_REG_SOFT_RESET);
writel((((drv_data->freq_m & 0xf) << 3) | (drv_data->freq_n & 0x7)),
drv_data->reg_base + MV64XXX_I2C_REG_BAUD);
writel(0, drv_data->reg_base + MV64XXX_I2C_REG_SLAVE_ADDR);
writel(0, drv_data->reg_base + MV64XXX_I2C_REG_EXT_SLAVE_ADDR);
writel(MV64XXX_I2C_REG_CONTROL_TWSIEN | MV64XXX_I2C_REG_CONTROL_STOP,
drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
drv_data->state = MV64XXX_I2C_STATE_IDLE;
}
static void
mv64xxx_i2c_fsm(struct mv64xxx_i2c_data *drv_data, u32 status)
{
@ -203,7 +218,7 @@ mv64xxx_i2c_fsm(struct mv64xxx_i2c_data *drv_data, u32 status)
drv_data->state, status, drv_data->msg->addr,
drv_data->msg->flags);
drv_data->action = MV64XXX_I2C_ACTION_SEND_STOP;
drv_data->state = MV64XXX_I2C_STATE_IDLE;
mv64xxx_i2c_hw_init(drv_data);
drv_data->rc = -EIO;
}
}
@ -367,6 +382,7 @@ mv64xxx_i2c_wait_for_completion(struct mv64xxx_i2c_data *drv_data)
"mv64xxx: I2C bus locked, block: %d, "
"time_left: %d\n", drv_data->block,
(int)time_left);
mv64xxx_i2c_hw_init(drv_data);
}
} else
spin_unlock_irqrestore(&drv_data->lock, flags);
@ -443,19 +459,6 @@ static const struct i2c_algorithm mv64xxx_i2c_algo = {
*
*****************************************************************************
*/
static void __devinit
mv64xxx_i2c_hw_init(struct mv64xxx_i2c_data *drv_data)
{
writel(0, drv_data->reg_base + MV64XXX_I2C_REG_SOFT_RESET);
writel((((drv_data->freq_m & 0xf) << 3) | (drv_data->freq_n & 0x7)),
drv_data->reg_base + MV64XXX_I2C_REG_BAUD);
writel(0, drv_data->reg_base + MV64XXX_I2C_REG_SLAVE_ADDR);
writel(0, drv_data->reg_base + MV64XXX_I2C_REG_EXT_SLAVE_ADDR);
writel(MV64XXX_I2C_REG_CONTROL_TWSIEN | MV64XXX_I2C_REG_CONTROL_STOP,
drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
drv_data->state = MV64XXX_I2C_STATE_IDLE;
}
static int __devinit
mv64xxx_i2c_map_regs(struct platform_device *pd,
struct mv64xxx_i2c_data *drv_data)

View File

@ -39,8 +39,8 @@
#include <asm/io.h>
#include <asm/arch/regs-gpio.h>
#include <asm/arch/regs-iic.h>
#include <asm/arch/iic.h>
#include <asm/plat-s3c/regs-iic.h>
#include <asm/plat-s3c/iic.h>
/* i2c controller state */

View File

@ -18,8 +18,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#undef DEBUG
#undef VERBOSE
#include <linux/kernel.h>
#include <linux/module.h>
@ -44,7 +42,7 @@
#define DRIVER_VERSION "24 August 2004"
#define DRIVER_NAME (isp1301_driver.name)
#define DRIVER_NAME (isp1301_driver.driver.name)
MODULE_DESCRIPTION("ISP1301 USB OTG Transceiver Driver");
MODULE_LICENSE("GPL");
@ -55,6 +53,7 @@ struct isp1301 {
void (*i2c_release)(struct device *dev);
int irq;
int irq_type;
u32 last_otg_ctrl;
unsigned working:1;
@ -63,7 +62,7 @@ struct isp1301 {
/* use keventd context to change the state for us */
struct work_struct work;
unsigned long todo;
# define WORK_UPDATE_ISP 0 /* update ISP from OTG */
# define WORK_UPDATE_OTG 1 /* update OTG from ISP */
@ -94,7 +93,7 @@ struct isp1301 {
/* board-specific PM hooks */
#include <asm/arch/gpio.h>
#include <asm/gpio.h>
#include <asm/arch/mux.h>
#include <asm/mach-types.h>
@ -291,7 +290,7 @@ static void power_up(struct isp1301 *isp)
{
// isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_2, MC2_GLOBAL_PWR_DN);
isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1, MC1_SUSPEND_REG);
/* do this only when cpu is driving transceiver,
* so host won't see a low speed device...
*/
@ -799,7 +798,7 @@ static irqreturn_t omap_otg_irq(int irq, void *_isp)
/* role is host */
} else {
if (!(otg_ctrl & OTG_ID)) {
otg_ctrl &= OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS;
otg_ctrl &= OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS;
OTG_CTRL_REG = otg_ctrl | OTG_A_BUSREQ;
}
@ -1100,9 +1099,9 @@ static u8 isp1301_clear_latch(struct isp1301 *isp)
}
static void
isp1301_work(void *data)
isp1301_work(struct work_struct *work)
{
struct isp1301 *isp = data;
struct isp1301 *isp = container_of(work, struct isp1301, work);
int stop;
/* implicit lock: we're the only task using this device */
@ -1244,7 +1243,7 @@ static int isp1301_detach_client(struct i2c_client *i2c)
* - DEVICE mode, for when there's a B/Mini-B (device) connector
*
* As a rule, you won't have an isp1301 chip unless it's there to
* support the OTG mode. Other modes help testing USB controllers
* support the OTG mode. Other modes help testing USB controllers
* in isolation from (full) OTG support, or maybe so later board
* revisions can help to support those feature.
*/
@ -1260,9 +1259,9 @@ static int isp1301_otg_enable(struct isp1301 *isp)
* a few more interrupts than are strictly needed.
*/
isp1301_set_bits(isp, ISP1301_INTERRUPT_RISING,
INTR_VBUS_VLD | INTR_SESS_VLD | INTR_ID_GND);
INTR_VBUS_VLD | INTR_SESS_VLD | INTR_ID_GND);
isp1301_set_bits(isp, ISP1301_INTERRUPT_FALLING,
INTR_VBUS_VLD | INTR_SESS_VLD | INTR_ID_GND);
INTR_VBUS_VLD | INTR_SESS_VLD | INTR_ID_GND);
dev_info(&isp->client.dev, "ready for dual-role USB ...\n");
@ -1306,9 +1305,9 @@ isp1301_set_host(struct otg_transceiver *otg, struct usb_bus *host)
dev_info(&isp->client.dev, "A-Host sessions ok\n");
isp1301_set_bits(isp, ISP1301_INTERRUPT_RISING,
INTR_ID_GND);
INTR_ID_GND);
isp1301_set_bits(isp, ISP1301_INTERRUPT_FALLING,
INTR_ID_GND);
INTR_ID_GND);
/* If this has a Mini-AB connector, this mode is highly
* nonstandard ... but can be handy for testing, especially with
@ -1368,9 +1367,9 @@ isp1301_set_peripheral(struct otg_transceiver *otg, struct usb_gadget *gadget)
isp1301_set_bits(isp, ISP1301_MODE_CONTROL_1, MC1_DAT_SE0);
isp1301_set_bits(isp, ISP1301_INTERRUPT_RISING,
INTR_SESS_VLD);
INTR_SESS_VLD);
isp1301_set_bits(isp, ISP1301_INTERRUPT_FALLING,
INTR_VBUS_VLD);
INTR_VBUS_VLD);
dev_info(&isp->client.dev, "B-Peripheral sessions ok\n");
dump_regs(isp, __FUNCTION__);
@ -1494,7 +1493,7 @@ static int isp1301_probe(struct i2c_adapter *bus, int address, int kind)
if (!isp)
return 0;
INIT_WORK(&isp->work, isp1301_work, isp);
INIT_WORK(&isp->work, isp1301_work);
init_timer(&isp->timer);
isp->timer.function = isp1301_timer;
isp->timer.data = (unsigned long) isp;
@ -1572,13 +1571,14 @@ fail1:
/* IRQ wired at M14 */
omap_cfg_reg(M14_1510_GPIO2);
isp->irq = OMAP_GPIO_IRQ(2);
omap_request_gpio(2);
omap_set_gpio_direction(2, 1);
omap_set_gpio_edge_ctrl(2, OMAP_GPIO_FALLING_EDGE);
if (gpio_request(2, "isp1301") == 0)
gpio_direction_input(2);
isp->irq_type = IRQF_TRIGGER_FALLING;
}
isp->irq_type |= IRQF_SAMPLE_RANDOM;
status = request_irq(isp->irq, isp1301_irq,
IRQF_SAMPLE_RANDOM, DRIVER_NAME, isp);
isp->irq_type, DRIVER_NAME, isp);
if (status < 0) {
dev_dbg(&i2c->dev, "can't get IRQ %d, err %d\n",
isp->irq, status);

View File

@ -1,4 +1,3 @@
#define DEBUG
/*
* Copyright (C) 2004 Texas Instruments, Inc.
*
@ -933,7 +932,7 @@ static int menelaus_set_time(struct device *dev, struct rtc_time *t)
return status;
status = menelaus_write_reg(MENELAUS_RTC_WKDAY, BIN2BCD(t->tm_wday));
if (status < 0) {
dev_err(&the_menelaus->client->dev, "rtc write reg %02x",
dev_err(&the_menelaus->client->dev, "rtc write reg %02x "
"err %d\n", MENELAUS_RTC_WKDAY, status);
return status;
}