Merge tag 'iwlwifi-next-for-kalle-2022-03-10' of git://git.kernel.org/pub/scm/linux/kernel/git/iwlwifi/iwlwifi-next
iwlwifi patches for v5.18 * Mostly debugging infra changes; * Some more work on the Bz family of devices; * Bump the FW API twice; * Some other small fixes, clean-ups and improvements.
This commit is contained in:
@@ -1,7 +1,7 @@
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// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
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/*
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* Copyright (C) 2015-2017 Intel Deutschland GmbH
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* Copyright (C) 2018-2021 Intel Corporation
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* Copyright (C) 2018-2022 Intel Corporation
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*/
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#include <linux/module.h>
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#include <linux/stringify.h>
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@@ -10,7 +10,7 @@
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#include "fw/api/txq.h"
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/* Highest firmware API version supported */
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#define IWL_22000_UCODE_API_MAX 70
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#define IWL_22000_UCODE_API_MAX 72
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/* Lowest firmware API version supported */
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#define IWL_22000_UCODE_API_MIN 39
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@@ -391,6 +391,21 @@ const struct iwl_cfg_trans_params iwl_so_long_latency_trans_cfg = {
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.ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US,
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};
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const struct iwl_cfg_trans_params iwl_so_long_latency_imr_trans_cfg = {
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.mq_rx_supported = true,
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.use_tfh = true,
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.rf_id = true,
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.gen2 = true,
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.device_family = IWL_DEVICE_FAMILY_AX210,
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.base_params = &iwl_ax210_base_params,
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.umac_prph_offset = 0x300000,
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.integrated = true,
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.low_latency_xtal = true,
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.xtal_latency = 12000,
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.ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US,
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.imr_enabled = true,
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};
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/*
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* If the device doesn't support HE, no need to have that many buffers.
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* 22000 devices can split multiple frames into a single RB, so fewer are
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@@ -4,6 +4,7 @@
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* Copyright (C) 2019-2021 Intel Corporation
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*/
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#include <linux/uuid.h>
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#include <linux/dmi.h>
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#include "iwl-drv.h"
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#include "iwl-debug.h"
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#include "acpi.h"
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@@ -19,6 +20,30 @@ const guid_t iwl_rfi_guid = GUID_INIT(0x7266172C, 0x220B, 0x4B29,
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0xDD, 0x26, 0xB5, 0xFD);
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IWL_EXPORT_SYMBOL(iwl_rfi_guid);
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static const struct dmi_system_id dmi_ppag_approved_list[] = {
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{ .ident = "HP",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "HP"),
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},
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},
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{ .ident = "SAMSUNG",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD"),
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},
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},
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{ .ident = "MSFT",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
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},
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},
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{ .ident = "ASUS",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "ASUSTek COMPUTER INC."),
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},
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},
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{}
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};
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static int iwl_acpi_get_handle(struct device *dev, acpi_string method,
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acpi_handle *ret_handle)
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{
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@@ -537,8 +562,8 @@ IWL_EXPORT_SYMBOL(iwl_sar_select_profile);
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int iwl_sar_get_wrds_table(struct iwl_fw_runtime *fwrt)
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{
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union acpi_object *wifi_pkg, *table, *data;
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bool enabled;
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int ret, tbl_rev;
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u32 flags;
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u8 num_chains, num_sub_bands;
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data = iwl_acpi_get_object(fwrt->dev, ACPI_WRDS_METHOD);
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@@ -604,7 +629,8 @@ read_table:
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IWL_DEBUG_RADIO(fwrt, "Reading WRDS tbl_rev=%d\n", tbl_rev);
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enabled = !!(wifi_pkg->package.elements[1].integer.value);
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flags = wifi_pkg->package.elements[1].integer.value;
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fwrt->reduced_power_flags = flags >> IWL_REDUCE_POWER_FLAGS_POS;
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/* position of the actual table */
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table = &wifi_pkg->package.elements[2];
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@@ -612,7 +638,8 @@ read_table:
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/* The profile from WRDS is officially profile 1, but goes
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* into sar_profiles[0] (because we don't have a profile 0).
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*/
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ret = iwl_sar_set_profile(table, &fwrt->sar_profiles[0], enabled,
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ret = iwl_sar_set_profile(table, &fwrt->sar_profiles[0],
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flags & IWL_SAR_ENABLE_MSK,
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num_chains, num_sub_bands);
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out_free:
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kfree(data);
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@@ -969,3 +996,181 @@ __le32 iwl_acpi_get_lari_config_bitmap(struct iwl_fw_runtime *fwrt)
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return config_bitmap;
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}
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IWL_EXPORT_SYMBOL(iwl_acpi_get_lari_config_bitmap);
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int iwl_acpi_get_ppag_table(struct iwl_fw_runtime *fwrt)
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{
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union acpi_object *wifi_pkg, *data, *flags;
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int i, j, ret, tbl_rev, num_sub_bands = 0;
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int idx = 2;
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fwrt->ppag_flags = 0;
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data = iwl_acpi_get_object(fwrt->dev, ACPI_PPAG_METHOD);
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if (IS_ERR(data))
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return PTR_ERR(data);
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/* try to read ppag table rev 2 or 1 (both have the same data size) */
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wifi_pkg = iwl_acpi_get_wifi_pkg(fwrt->dev, data,
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ACPI_PPAG_WIFI_DATA_SIZE_V2, &tbl_rev);
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if (!IS_ERR(wifi_pkg)) {
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if (tbl_rev == 1 || tbl_rev == 2) {
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num_sub_bands = IWL_NUM_SUB_BANDS_V2;
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IWL_DEBUG_RADIO(fwrt,
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"Reading PPAG table v2 (tbl_rev=%d)\n",
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tbl_rev);
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goto read_table;
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} else {
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ret = -EINVAL;
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goto out_free;
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}
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}
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/* try to read ppag table revision 0 */
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wifi_pkg = iwl_acpi_get_wifi_pkg(fwrt->dev, data,
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ACPI_PPAG_WIFI_DATA_SIZE_V1, &tbl_rev);
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if (!IS_ERR(wifi_pkg)) {
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if (tbl_rev != 0) {
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ret = -EINVAL;
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goto out_free;
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}
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num_sub_bands = IWL_NUM_SUB_BANDS_V1;
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IWL_DEBUG_RADIO(fwrt, "Reading PPAG table v1 (tbl_rev=0)\n");
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goto read_table;
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}
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read_table:
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fwrt->ppag_ver = tbl_rev;
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flags = &wifi_pkg->package.elements[1];
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if (flags->type != ACPI_TYPE_INTEGER) {
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ret = -EINVAL;
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goto out_free;
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}
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fwrt->ppag_flags = flags->integer.value & ACPI_PPAG_MASK;
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if (!fwrt->ppag_flags) {
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ret = 0;
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goto out_free;
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}
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/*
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* read, verify gain values and save them into the PPAG table.
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* first sub-band (j=0) corresponds to Low-Band (2.4GHz), and the
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* following sub-bands to High-Band (5GHz).
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*/
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for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) {
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for (j = 0; j < num_sub_bands; j++) {
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union acpi_object *ent;
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ent = &wifi_pkg->package.elements[idx++];
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if (ent->type != ACPI_TYPE_INTEGER) {
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ret = -EINVAL;
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goto out_free;
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}
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fwrt->ppag_chains[i].subbands[j] = ent->integer.value;
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if ((j == 0 &&
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(fwrt->ppag_chains[i].subbands[j] > ACPI_PPAG_MAX_LB ||
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fwrt->ppag_chains[i].subbands[j] < ACPI_PPAG_MIN_LB)) ||
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(j != 0 &&
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(fwrt->ppag_chains[i].subbands[j] > ACPI_PPAG_MAX_HB ||
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fwrt->ppag_chains[i].subbands[j] < ACPI_PPAG_MIN_HB))) {
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fwrt->ppag_flags = 0;
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ret = -EINVAL;
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goto out_free;
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}
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}
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}
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ret = 0;
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out_free:
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kfree(data);
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return ret;
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}
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IWL_EXPORT_SYMBOL(iwl_acpi_get_ppag_table);
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int iwl_read_ppag_table(struct iwl_fw_runtime *fwrt, union iwl_ppag_table_cmd *cmd,
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int *cmd_size)
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{
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u8 cmd_ver;
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int i, j, num_sub_bands;
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s8 *gain;
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if (!fw_has_capa(&fwrt->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_PPAG)) {
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IWL_DEBUG_RADIO(fwrt,
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"PPAG capability not supported by FW, command not sent.\n");
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return -EINVAL;
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}
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if (!fwrt->ppag_flags) {
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IWL_DEBUG_RADIO(fwrt, "PPAG not enabled, command not sent.\n");
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return -EINVAL;
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}
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/* The 'flags' field is the same in v1 and in v2 so we can just
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* use v1 to access it.
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*/
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cmd->v1.flags = cpu_to_le32(fwrt->ppag_flags);
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cmd_ver = iwl_fw_lookup_cmd_ver(fwrt->fw,
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WIDE_ID(PHY_OPS_GROUP, PER_PLATFORM_ANT_GAIN_CMD),
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IWL_FW_CMD_VER_UNKNOWN);
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if (cmd_ver == 1) {
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num_sub_bands = IWL_NUM_SUB_BANDS_V1;
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gain = cmd->v1.gain[0];
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*cmd_size = sizeof(cmd->v1);
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if (fwrt->ppag_ver == 1 || fwrt->ppag_ver == 2) {
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IWL_DEBUG_RADIO(fwrt,
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"PPAG table rev is %d but FW supports v1, sending truncated table\n",
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fwrt->ppag_ver);
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cmd->v1.flags &= cpu_to_le32(IWL_PPAG_ETSI_MASK);
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}
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} else if (cmd_ver == 2 || cmd_ver == 3) {
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num_sub_bands = IWL_NUM_SUB_BANDS_V2;
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gain = cmd->v2.gain[0];
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*cmd_size = sizeof(cmd->v2);
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if (fwrt->ppag_ver == 0) {
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IWL_DEBUG_RADIO(fwrt,
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"PPAG table is v1 but FW supports v2, sending padded table\n");
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} else if (cmd_ver == 2 && fwrt->ppag_ver == 2) {
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IWL_DEBUG_RADIO(fwrt,
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"PPAG table is v3 but FW supports v2, sending partial bitmap.\n");
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cmd->v1.flags &= cpu_to_le32(IWL_PPAG_ETSI_MASK);
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}
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} else {
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IWL_DEBUG_RADIO(fwrt, "Unsupported PPAG command version\n");
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return -EINVAL;
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}
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for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) {
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for (j = 0; j < num_sub_bands; j++) {
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gain[i * num_sub_bands + j] =
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fwrt->ppag_chains[i].subbands[j];
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IWL_DEBUG_RADIO(fwrt,
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"PPAG table: chain[%d] band[%d]: gain = %d\n",
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i, j, gain[i * num_sub_bands + j]);
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}
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}
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return 0;
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}
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IWL_EXPORT_SYMBOL(iwl_read_ppag_table);
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bool iwl_acpi_is_ppag_approved(struct iwl_fw_runtime *fwrt)
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{
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if (!dmi_check_system(dmi_ppag_approved_list)) {
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IWL_DEBUG_RADIO(fwrt,
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"System vendor '%s' is not in the approved list, disabling PPAG.\n",
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dmi_get_system_info(DMI_SYS_VENDOR));
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fwrt->ppag_flags = 0;
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return false;
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}
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return true;
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}
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IWL_EXPORT_SYMBOL(iwl_acpi_is_ppag_approved);
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@@ -91,6 +91,11 @@
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#define ACPI_PPAG_MAX_LB 24
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#define ACPI_PPAG_MIN_HB -16
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#define ACPI_PPAG_MAX_HB 40
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#define ACPI_PPAG_MASK 3
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#define IWL_PPAG_ETSI_MASK BIT(0)
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#define IWL_SAR_ENABLE_MSK BIT(0)
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#define IWL_REDUCE_POWER_FLAGS_POS 1
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/*
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* The profile for revision 2 is a superset of revision 1, which is in
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@@ -220,6 +225,13 @@ int iwl_acpi_get_tas(struct iwl_fw_runtime *fwrt,
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__le32 iwl_acpi_get_lari_config_bitmap(struct iwl_fw_runtime *fwrt);
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int iwl_acpi_get_ppag_table(struct iwl_fw_runtime *fwrt);
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int iwl_read_ppag_table(struct iwl_fw_runtime *fwrt, union iwl_ppag_table_cmd *cmd,
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int *cmd_size);
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bool iwl_acpi_is_ppag_approved(struct iwl_fw_runtime *fwrt);
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#else /* CONFIG_ACPI */
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static inline void *iwl_acpi_get_object(struct device *dev, acpi_string method)
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@@ -307,6 +319,22 @@ static inline __le32 iwl_acpi_get_lari_config_bitmap(struct iwl_fw_runtime *fwrt
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return 0;
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}
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static inline int iwl_acpi_get_ppag_table(struct iwl_fw_runtime *fwrt)
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{
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return -ENOENT;
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}
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static inline int iwl_read_ppag_table(struct iwl_fw_runtime *fwrt,
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union iwl_ppag_table_cmd *cmd, int *cmd_size)
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{
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return -ENOENT;
|
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}
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static inline bool iwl_acpi_is_ppag_approved(struct iwl_fw_runtime *fwrt)
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{
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return false;
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}
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#endif /* CONFIG_ACPI */
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|
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static inline union acpi_object *
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@@ -1,6 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
|
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/*
|
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* Copyright (C) 2012-2014, 2018-2021 Intel Corporation
|
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* Copyright (C) 2012-2014, 2018-2022 Intel Corporation
|
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* Copyright (C) 2013-2014 Intel Mobile Communications GmbH
|
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* Copyright (C) 2015-2017 Intel Deutschland GmbH
|
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*/
|
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@@ -340,7 +340,7 @@ struct iwl_dev_tx_power_cmd_v5 {
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} __packed; /* TX_REDUCED_POWER_API_S_VER_5 */
|
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|
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/**
|
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* struct iwl_dev_tx_power_cmd_v5 - TX power reduction command version 5
|
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* struct iwl_dev_tx_power_cmd_v6 - TX power reduction command version 6
|
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* @per_chain: per chain restrictions
|
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* @enable_ack_reduction: enable or disable close range ack TX power
|
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* reduction.
|
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@@ -360,6 +360,28 @@ struct iwl_dev_tx_power_cmd_v6 {
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__le32 timer_period;
|
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} __packed; /* TX_REDUCED_POWER_API_S_VER_6 */
|
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|
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/**
|
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* struct iwl_dev_tx_power_cmd_v7 - TX power reduction command version 7
|
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* @per_chain: per chain restrictions
|
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* @enable_ack_reduction: enable or disable close range ack TX power
|
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* reduction.
|
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* @per_chain_restriction_changed: is per_chain_restriction has changed
|
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* from last command. used if set_mode is
|
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* IWL_TX_POWER_MODE_SET_SAR_TIMER.
|
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* note: if not changed, the command is used for keep alive only.
|
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* @reserved: reserved (padding)
|
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* @timer_period: timer in milliseconds. if expires FW will change to default
|
||||
* BIOS values. relevant if setMode is IWL_TX_POWER_MODE_SET_SAR_TIMER
|
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* @flags: reduce power flags.
|
||||
*/
|
||||
struct iwl_dev_tx_power_cmd_v7 {
|
||||
__le16 per_chain[IWL_NUM_CHAIN_TABLES_V2][IWL_NUM_CHAIN_LIMITS][IWL_NUM_SUB_BANDS_V2];
|
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u8 enable_ack_reduction;
|
||||
u8 per_chain_restriction_changed;
|
||||
u8 reserved[2];
|
||||
__le32 timer_period;
|
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__le32 flags;
|
||||
} __packed; /* TX_REDUCED_POWER_API_S_VER_7 */
|
||||
/**
|
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* struct iwl_dev_tx_power_cmd - TX power reduction command (multiversion)
|
||||
* @common: common part of the command
|
||||
@@ -375,6 +397,7 @@ struct iwl_dev_tx_power_cmd {
|
||||
struct iwl_dev_tx_power_cmd_v4 v4;
|
||||
struct iwl_dev_tx_power_cmd_v5 v5;
|
||||
struct iwl_dev_tx_power_cmd_v6 v6;
|
||||
struct iwl_dev_tx_power_cmd_v7 v7;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -2430,6 +2430,9 @@ static u32 iwl_dump_ini_trigger(struct iwl_fw_runtime *fwrt,
|
||||
struct iwl_dump_ini_region_data reg_data = {
|
||||
.dump_data = dump_data,
|
||||
};
|
||||
struct iwl_dump_ini_region_data imr_reg_data = {
|
||||
.dump_data = dump_data,
|
||||
};
|
||||
int i;
|
||||
u32 size = 0;
|
||||
u64 regions_mask = le64_to_cpu(trigger->regions_mask) &
|
||||
@@ -2465,10 +2468,32 @@ static u32 iwl_dump_ini_trigger(struct iwl_fw_runtime *fwrt,
|
||||
tp_id);
|
||||
continue;
|
||||
}
|
||||
/*
|
||||
* DRAM_IMR can be collected only for FW/HW error timepoint
|
||||
* when fw is not alive. In addition, it must be collected
|
||||
* lastly as it overwrites SRAM that can possibly contain
|
||||
* debug data which also need to be collected.
|
||||
*/
|
||||
if (reg_type == IWL_FW_INI_REGION_DRAM_IMR) {
|
||||
if (tp_id == IWL_FW_INI_TIME_POINT_FW_ASSERT ||
|
||||
tp_id == IWL_FW_INI_TIME_POINT_FW_HW_ERROR)
|
||||
imr_reg_data.reg_tlv = fwrt->trans->dbg.active_regions[i];
|
||||
else
|
||||
IWL_INFO(fwrt,
|
||||
"WRT: trying to collect DRAM_IMR at time point: %d, skipping\n",
|
||||
tp_id);
|
||||
/* continue to next region */
|
||||
continue;
|
||||
}
|
||||
|
||||
|
||||
size += iwl_dump_ini_mem(fwrt, list, ®_data,
|
||||
&iwl_dump_ini_region_ops[reg_type]);
|
||||
}
|
||||
/* collect DRAM_IMR region in the last */
|
||||
if (imr_reg_data.reg_tlv)
|
||||
size += iwl_dump_ini_mem(fwrt, list, ®_data,
|
||||
&iwl_dump_ini_region_ops[IWL_FW_INI_REGION_DRAM_IMR]);
|
||||
|
||||
if (size)
|
||||
size += iwl_dump_ini_info(fwrt, trigger, list);
|
||||
@@ -2880,6 +2905,11 @@ static void iwl_fw_dbg_collect_sync(struct iwl_fw_runtime *fwrt, u8 wk_idx)
|
||||
if (!test_bit(wk_idx, &fwrt->dump.active_wks))
|
||||
return;
|
||||
|
||||
if (!dump_data->trig) {
|
||||
IWL_ERR(fwrt, "dump trigger data is not set\n");
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (!test_bit(STATUS_DEVICE_ENABLED, &fwrt->trans->status)) {
|
||||
IWL_ERR(fwrt, "Device is not enabled - cannot dump error\n");
|
||||
goto out;
|
||||
@@ -2967,10 +2997,10 @@ int iwl_fw_dbg_ini_collect(struct iwl_fw_runtime *fwrt,
|
||||
"WRT: Collecting data: ini trigger %d fired (delay=%dms).\n",
|
||||
tp_id, (u32)(delay / USEC_PER_MSEC));
|
||||
|
||||
schedule_delayed_work(&fwrt->dump.wks[idx].wk, usecs_to_jiffies(delay));
|
||||
|
||||
if (sync)
|
||||
iwl_fw_dbg_collect_sync(fwrt, idx);
|
||||
else
|
||||
schedule_delayed_work(&fwrt->dump.wks[idx].wk, usecs_to_jiffies(delay));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -518,34 +518,6 @@ enum iwl_fw_phy_cfg {
|
||||
FW_PHY_CFG_SHARED_CLK = BIT(31),
|
||||
};
|
||||
|
||||
#define IWL_UCODE_MAX_CS 1
|
||||
|
||||
/**
|
||||
* struct iwl_fw_cipher_scheme - a cipher scheme supported by FW.
|
||||
* @cipher: a cipher suite selector
|
||||
* @flags: cipher scheme flags (currently reserved for a future use)
|
||||
* @hdr_len: a size of MPDU security header
|
||||
* @pn_len: a size of PN
|
||||
* @pn_off: an offset of pn from the beginning of the security header
|
||||
* @key_idx_off: an offset of key index byte in the security header
|
||||
* @key_idx_mask: a bit mask of key_idx bits
|
||||
* @key_idx_shift: bit shift needed to get key_idx
|
||||
* @mic_len: mic length in bytes
|
||||
* @hw_cipher: a HW cipher index used in host commands
|
||||
*/
|
||||
struct iwl_fw_cipher_scheme {
|
||||
__le32 cipher;
|
||||
u8 flags;
|
||||
u8 hdr_len;
|
||||
u8 pn_len;
|
||||
u8 pn_off;
|
||||
u8 key_idx_off;
|
||||
u8 key_idx_mask;
|
||||
u8 key_idx_shift;
|
||||
u8 mic_len;
|
||||
u8 hw_cipher;
|
||||
} __packed;
|
||||
|
||||
enum iwl_fw_dbg_reg_operator {
|
||||
CSR_ASSIGN,
|
||||
CSR_SETBIT,
|
||||
|
||||
@@ -133,16 +133,6 @@ struct iwl_fw_paging {
|
||||
u32 fw_offs;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct iwl_fw_cscheme_list - a cipher scheme list
|
||||
* @size: a number of entries
|
||||
* @cs: cipher scheme entries
|
||||
*/
|
||||
struct iwl_fw_cscheme_list {
|
||||
u8 size;
|
||||
struct iwl_fw_cipher_scheme cs[];
|
||||
} __packed;
|
||||
|
||||
/**
|
||||
* enum iwl_fw_type - iwlwifi firmware type
|
||||
* @IWL_FW_DVM: DVM firmware
|
||||
@@ -197,7 +187,6 @@ struct iwl_dump_exclude {
|
||||
* @inst_evtlog_size: event log size for runtime ucode.
|
||||
* @inst_errlog_ptr: error log offfset for runtime ucode.
|
||||
* @type: firmware type (&enum iwl_fw_type)
|
||||
* @cipher_scheme: optional external cipher scheme.
|
||||
* @human_readable: human readable version
|
||||
* we get the ALIVE from the uCode
|
||||
* @phy_integration_ver: PHY integration version string
|
||||
@@ -228,7 +217,6 @@ struct iwl_fw {
|
||||
|
||||
enum iwl_fw_type type;
|
||||
|
||||
struct iwl_fw_cipher_scheme cs[IWL_UCODE_MAX_CS];
|
||||
u8 human_readable[FW_VER_HUMAN_READABLE_SZ];
|
||||
|
||||
struct iwl_fw_dbg dbg;
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
|
||||
/*
|
||||
* Copyright (C) 2017 Intel Deutschland GmbH
|
||||
* Copyright (C) 2018-2020 Intel Corporation
|
||||
* Copyright (C) 2018-2022 Intel Corporation
|
||||
*/
|
||||
#ifndef __iwl_fw_runtime_h__
|
||||
#define __iwl_fw_runtime_h__
|
||||
@@ -163,6 +163,7 @@ struct iwl_fw_runtime {
|
||||
u32 ppag_ver;
|
||||
struct iwl_sar_offset_mapping_cmd sgom_table;
|
||||
bool sgom_enabled;
|
||||
u8 reduced_power_flags;
|
||||
#endif
|
||||
};
|
||||
|
||||
|
||||
@@ -260,6 +260,7 @@ enum iwl_cfg_trans_ltr_delay {
|
||||
* @integrated: discrete or integrated
|
||||
* @low_latency_xtal: use the low latency xtal if supported
|
||||
* @ltr_delay: LTR delay parameter, &enum iwl_cfg_trans_ltr_delay.
|
||||
* @imr_enabled: use the IMR if supported.
|
||||
*/
|
||||
struct iwl_cfg_trans_params {
|
||||
const struct iwl_base_params *base_params;
|
||||
@@ -274,7 +275,8 @@ struct iwl_cfg_trans_params {
|
||||
integrated:1,
|
||||
low_latency_xtal:1,
|
||||
bisr_workaround:1,
|
||||
ltr_delay:2;
|
||||
ltr_delay:2,
|
||||
imr_enabled:1;
|
||||
};
|
||||
|
||||
/**
|
||||
@@ -491,6 +493,7 @@ extern const struct iwl_cfg_trans_params iwl_ax200_trans_cfg;
|
||||
extern const struct iwl_cfg_trans_params iwl_snj_trans_cfg;
|
||||
extern const struct iwl_cfg_trans_params iwl_so_trans_cfg;
|
||||
extern const struct iwl_cfg_trans_params iwl_so_long_latency_trans_cfg;
|
||||
extern const struct iwl_cfg_trans_params iwl_so_long_latency_imr_trans_cfg;
|
||||
extern const struct iwl_cfg_trans_params iwl_ma_trans_cfg;
|
||||
extern const struct iwl_cfg_trans_params iwl_bz_trans_cfg;
|
||||
extern const char iwl9162_name[];
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
|
||||
/*
|
||||
* Copyright (C) 2018, 2020-2021 Intel Corporation
|
||||
* Copyright (C) 2018, 2020-2022 Intel Corporation
|
||||
*/
|
||||
#ifndef __iwl_context_info_file_gen3_h__
|
||||
#define __iwl_context_info_file_gen3_h__
|
||||
@@ -34,6 +34,7 @@ enum iwl_prph_scratch_mtr_format {
|
||||
|
||||
/**
|
||||
* enum iwl_prph_scratch_flags - PRPH scratch control flags
|
||||
* @IWL_PRPH_SCRATCH_IMR_DEBUG_EN: IMR support for debug
|
||||
* @IWL_PRPH_SCRATCH_EARLY_DEBUG_EN: enable early debug conf
|
||||
* @IWL_PRPH_SCRATCH_EDBG_DEST_DRAM: use DRAM, with size allocated
|
||||
* in hwm config.
|
||||
@@ -55,6 +56,7 @@ enum iwl_prph_scratch_mtr_format {
|
||||
* @IWL_PRPH_SCRATCH_RB_SIZE_EXT_16K: 16kB RB size
|
||||
*/
|
||||
enum iwl_prph_scratch_flags {
|
||||
IWL_PRPH_SCRATCH_IMR_DEBUG_EN = BIT(1),
|
||||
IWL_PRPH_SCRATCH_EARLY_DEBUG_EN = BIT(4),
|
||||
IWL_PRPH_SCRATCH_EDBG_DEST_DRAM = BIT(8),
|
||||
IWL_PRPH_SCRATCH_EDBG_DEST_INTERNAL = BIT(9),
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
|
||||
/*
|
||||
* Copyright (C) 2018-2021 Intel Corporation
|
||||
* Copyright (C) 2018-2022 Intel Corporation
|
||||
*/
|
||||
#ifndef __iwl_dbg_tlv_h__
|
||||
#define __iwl_dbg_tlv_h__
|
||||
@@ -10,6 +10,8 @@
|
||||
#include <fw/file.h>
|
||||
#include <fw/api/dbg-tlv.h>
|
||||
|
||||
#define IWL_DBG_TLV_MAX_PRESET 15
|
||||
|
||||
/**
|
||||
* struct iwl_dbg_tlv_node - debug TLV node
|
||||
* @list: list of &struct iwl_dbg_tlv_node
|
||||
|
||||
@@ -324,30 +324,6 @@ static void set_sec_offset(struct iwl_firmware_pieces *pieces,
|
||||
pieces->img[type].sec[sec].offset = offset;
|
||||
}
|
||||
|
||||
static int iwl_store_cscheme(struct iwl_fw *fw, const u8 *data, const u32 len)
|
||||
{
|
||||
int i, j;
|
||||
const struct iwl_fw_cscheme_list *l =
|
||||
(const struct iwl_fw_cscheme_list *)data;
|
||||
const struct iwl_fw_cipher_scheme *fwcs;
|
||||
|
||||
if (len < sizeof(*l) ||
|
||||
len < sizeof(l->size) + l->size * sizeof(l->cs[0]))
|
||||
return -EINVAL;
|
||||
|
||||
for (i = 0, j = 0; i < IWL_UCODE_MAX_CS && i < l->size; i++) {
|
||||
fwcs = &l->cs[j];
|
||||
|
||||
/* we skip schemes with zero cipher suite selector */
|
||||
if (!fwcs->cipher)
|
||||
continue;
|
||||
|
||||
fw->cs[j++] = *fwcs;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Gets uCode section from tlv.
|
||||
*/
|
||||
@@ -926,10 +902,6 @@ static int iwl_parse_tlv_firmware(struct iwl_drv *drv,
|
||||
return -EINVAL;
|
||||
}
|
||||
break;
|
||||
case IWL_UCODE_TLV_CSCHEME:
|
||||
if (iwl_store_cscheme(&drv->fw, tlv_data, tlv_len))
|
||||
goto invalid_tlv_len;
|
||||
break;
|
||||
case IWL_UCODE_TLV_N_SCAN_CHANNELS:
|
||||
if (tlv_len != sizeof(u32))
|
||||
goto invalid_tlv_len;
|
||||
@@ -1796,6 +1768,7 @@ void iwl_drv_stop(struct iwl_drv *drv)
|
||||
kfree(drv);
|
||||
}
|
||||
|
||||
#define ENABLE_INI (IWL_DBG_TLV_MAX_PRESET + 1)
|
||||
|
||||
/* shared module parameters */
|
||||
struct iwl_mod_params iwlwifi_mod_params = {
|
||||
@@ -1803,7 +1776,7 @@ struct iwl_mod_params iwlwifi_mod_params = {
|
||||
.bt_coex_active = true,
|
||||
.power_level = IWL_POWER_INDEX_1,
|
||||
.uapsd_disable = IWL_DISABLE_UAPSD_BSS | IWL_DISABLE_UAPSD_P2P_CLIENT,
|
||||
.enable_ini = true,
|
||||
.enable_ini = ENABLE_INI,
|
||||
/* the rest are 0 by default */
|
||||
};
|
||||
IWL_EXPORT_SYMBOL(iwlwifi_mod_params);
|
||||
@@ -1915,10 +1888,42 @@ MODULE_PARM_DESC(nvm_file, "NVM file name");
|
||||
module_param_named(uapsd_disable, iwlwifi_mod_params.uapsd_disable, uint, 0644);
|
||||
MODULE_PARM_DESC(uapsd_disable,
|
||||
"disable U-APSD functionality bitmap 1: BSS 2: P2P Client (default: 3)");
|
||||
module_param_named(enable_ini, iwlwifi_mod_params.enable_ini,
|
||||
bool, S_IRUGO | S_IWUSR);
|
||||
|
||||
static int enable_ini_set(const char *arg, const struct kernel_param *kp)
|
||||
{
|
||||
int ret = 0;
|
||||
bool res;
|
||||
__u32 new_enable_ini;
|
||||
|
||||
/* in case the argument type is a number */
|
||||
ret = kstrtou32(arg, 0, &new_enable_ini);
|
||||
if (!ret) {
|
||||
if (new_enable_ini > ENABLE_INI) {
|
||||
pr_err("enable_ini cannot be %d, in range 0-16\n", new_enable_ini);
|
||||
return -EINVAL;
|
||||
}
|
||||
goto out;
|
||||
}
|
||||
|
||||
/* in case the argument type is boolean */
|
||||
ret = kstrtobool(arg, &res);
|
||||
if (ret)
|
||||
return ret;
|
||||
new_enable_ini = (res ? ENABLE_INI : 0);
|
||||
|
||||
out:
|
||||
iwlwifi_mod_params.enable_ini = new_enable_ini;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct kernel_param_ops enable_ini_ops = {
|
||||
.set = enable_ini_set
|
||||
};
|
||||
|
||||
module_param_cb(enable_ini, &enable_ini_ops, &iwlwifi_mod_params.enable_ini, 0644);
|
||||
MODULE_PARM_DESC(enable_ini,
|
||||
"Enable debug INI TLV FW debug infrastructure (default: true");
|
||||
"0:disable, 1-15:FW_DBG_PRESET Values, 16:enabled without preset value defined,"
|
||||
"Debug INI TLV FW debug infrastructure (default: 16)");
|
||||
|
||||
/*
|
||||
* set bt_coex_active to true, uCode will do kill/defer
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
|
||||
/*
|
||||
* Copyright (C) 2005-2014, 2018-2020 Intel Corporation
|
||||
* Copyright (C) 2005-2014, 2018-2022 Intel Corporation
|
||||
*/
|
||||
#ifndef __iwl_modparams_h__
|
||||
#define __iwl_modparams_h__
|
||||
@@ -83,7 +83,8 @@ struct iwl_mod_params {
|
||||
*/
|
||||
bool disable_11ax;
|
||||
bool remove_when_gone;
|
||||
bool enable_ini;
|
||||
u32 enable_ini;
|
||||
bool disable_11be;
|
||||
};
|
||||
|
||||
static inline bool iwl_enable_rx_ampdu(void)
|
||||
|
||||
@@ -25,9 +25,6 @@
|
||||
#define MVM_UCODE_ALIVE_TIMEOUT (HZ)
|
||||
#define MVM_UCODE_CALIB_TIMEOUT (2 * HZ)
|
||||
|
||||
#define IWL_PPAG_MASK 3
|
||||
#define IWL_PPAG_ETSI_MASK BIT(0)
|
||||
|
||||
#define IWL_TAS_US_MCC 0x5553
|
||||
#define IWL_TAS_CANADA_MCC 0x4341
|
||||
|
||||
@@ -124,6 +121,7 @@ static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
|
||||
u32 lmac_error_event_table, umac_error_table;
|
||||
u32 version = iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP,
|
||||
UCODE_ALIVE_NTFY, 0);
|
||||
u32 i;
|
||||
|
||||
if (version == 6) {
|
||||
struct iwl_alive_ntf_v6 *palive;
|
||||
@@ -146,6 +144,28 @@ static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
|
||||
mvm->trans->dbg.imr_data.imr_enable,
|
||||
mvm->trans->dbg.imr_data.imr_size,
|
||||
le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr));
|
||||
|
||||
if (!mvm->trans->dbg.imr_data.imr_enable) {
|
||||
for (i = 0; i < ARRAY_SIZE(mvm->trans->dbg.active_regions); i++) {
|
||||
struct iwl_ucode_tlv *reg_tlv;
|
||||
struct iwl_fw_ini_region_tlv *reg;
|
||||
|
||||
reg_tlv = mvm->trans->dbg.active_regions[i];
|
||||
if (!reg_tlv)
|
||||
continue;
|
||||
|
||||
reg = (void *)reg_tlv->data;
|
||||
/*
|
||||
* We have only one DRAM IMR region, so we
|
||||
* can break as soon as we find the first
|
||||
* one.
|
||||
*/
|
||||
if (reg->type == IWL_FW_INI_REGION_DRAM_IMR) {
|
||||
mvm->trans->dbg.unsupported_region_msk |= BIT(i);
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (version >= 5) {
|
||||
@@ -806,8 +826,12 @@ int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b)
|
||||
u32 n_subbands;
|
||||
u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
|
||||
IWL_FW_CMD_VER_UNKNOWN);
|
||||
|
||||
if (cmd_ver == 6) {
|
||||
if (cmd_ver == 7) {
|
||||
len = sizeof(cmd.v7);
|
||||
n_subbands = IWL_NUM_SUB_BANDS_V2;
|
||||
per_chain = cmd.v7.per_chain[0][0];
|
||||
cmd.v7.flags = cpu_to_le32(mvm->fwrt.reduced_power_flags);
|
||||
} else if (cmd_ver == 6) {
|
||||
len = sizeof(cmd.v6);
|
||||
n_subbands = IWL_NUM_SUB_BANDS_V2;
|
||||
per_chain = cmd.v6.per_chain[0][0];
|
||||
@@ -985,161 +1009,15 @@ static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
|
||||
return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd);
|
||||
}
|
||||
|
||||
static int iwl_mvm_get_ppag_table(struct iwl_mvm *mvm)
|
||||
{
|
||||
union acpi_object *wifi_pkg, *data, *flags;
|
||||
int i, j, ret, tbl_rev, num_sub_bands;
|
||||
int idx = 2;
|
||||
|
||||
mvm->fwrt.ppag_flags = 0;
|
||||
|
||||
data = iwl_acpi_get_object(mvm->dev, ACPI_PPAG_METHOD);
|
||||
if (IS_ERR(data))
|
||||
return PTR_ERR(data);
|
||||
|
||||
/* try to read ppag table rev 2 or 1 (both have the same data size) */
|
||||
wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
|
||||
ACPI_PPAG_WIFI_DATA_SIZE_V2, &tbl_rev);
|
||||
if (!IS_ERR(wifi_pkg)) {
|
||||
if (tbl_rev == 1 || tbl_rev == 2) {
|
||||
num_sub_bands = IWL_NUM_SUB_BANDS_V2;
|
||||
IWL_DEBUG_RADIO(mvm,
|
||||
"Reading PPAG table v2 (tbl_rev=%d)\n",
|
||||
tbl_rev);
|
||||
goto read_table;
|
||||
} else {
|
||||
ret = -EINVAL;
|
||||
goto out_free;
|
||||
}
|
||||
}
|
||||
|
||||
/* try to read ppag table revision 0 */
|
||||
wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
|
||||
ACPI_PPAG_WIFI_DATA_SIZE_V1, &tbl_rev);
|
||||
if (!IS_ERR(wifi_pkg)) {
|
||||
if (tbl_rev != 0) {
|
||||
ret = -EINVAL;
|
||||
goto out_free;
|
||||
}
|
||||
num_sub_bands = IWL_NUM_SUB_BANDS_V1;
|
||||
IWL_DEBUG_RADIO(mvm, "Reading PPAG table v1 (tbl_rev=0)\n");
|
||||
goto read_table;
|
||||
}
|
||||
ret = PTR_ERR(wifi_pkg);
|
||||
goto out_free;
|
||||
|
||||
read_table:
|
||||
mvm->fwrt.ppag_ver = tbl_rev;
|
||||
flags = &wifi_pkg->package.elements[1];
|
||||
|
||||
if (flags->type != ACPI_TYPE_INTEGER) {
|
||||
ret = -EINVAL;
|
||||
goto out_free;
|
||||
}
|
||||
|
||||
mvm->fwrt.ppag_flags = flags->integer.value & IWL_PPAG_MASK;
|
||||
|
||||
if (!mvm->fwrt.ppag_flags) {
|
||||
ret = 0;
|
||||
goto out_free;
|
||||
}
|
||||
|
||||
/*
|
||||
* read, verify gain values and save them into the PPAG table.
|
||||
* first sub-band (j=0) corresponds to Low-Band (2.4GHz), and the
|
||||
* following sub-bands to High-Band (5GHz).
|
||||
*/
|
||||
for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) {
|
||||
for (j = 0; j < num_sub_bands; j++) {
|
||||
union acpi_object *ent;
|
||||
|
||||
ent = &wifi_pkg->package.elements[idx++];
|
||||
if (ent->type != ACPI_TYPE_INTEGER) {
|
||||
ret = -EINVAL;
|
||||
goto out_free;
|
||||
}
|
||||
|
||||
mvm->fwrt.ppag_chains[i].subbands[j] = ent->integer.value;
|
||||
|
||||
if ((j == 0 &&
|
||||
(mvm->fwrt.ppag_chains[i].subbands[j] > ACPI_PPAG_MAX_LB ||
|
||||
mvm->fwrt.ppag_chains[i].subbands[j] < ACPI_PPAG_MIN_LB)) ||
|
||||
(j != 0 &&
|
||||
(mvm->fwrt.ppag_chains[i].subbands[j] > ACPI_PPAG_MAX_HB ||
|
||||
mvm->fwrt.ppag_chains[i].subbands[j] < ACPI_PPAG_MIN_HB))) {
|
||||
mvm->fwrt.ppag_flags = 0;
|
||||
ret = -EINVAL;
|
||||
goto out_free;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
ret = 0;
|
||||
out_free:
|
||||
kfree(data);
|
||||
return ret;
|
||||
}
|
||||
|
||||
int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
|
||||
{
|
||||
union iwl_ppag_table_cmd cmd;
|
||||
u8 cmd_ver;
|
||||
int i, j, ret, num_sub_bands, cmd_size;
|
||||
s8 *gain;
|
||||
int ret, cmd_size;
|
||||
|
||||
if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_PPAG)) {
|
||||
IWL_DEBUG_RADIO(mvm,
|
||||
"PPAG capability not supported by FW, command not sent.\n");
|
||||
return 0;
|
||||
}
|
||||
if (!mvm->fwrt.ppag_flags) {
|
||||
IWL_DEBUG_RADIO(mvm, "PPAG not enabled, command not sent.\n");
|
||||
return 0;
|
||||
}
|
||||
ret = iwl_read_ppag_table(&mvm->fwrt, &cmd, &cmd_size);
|
||||
if(ret < 0)
|
||||
return ret;
|
||||
|
||||
/* The 'flags' field is the same in v1 and in v2 so we can just
|
||||
* use v1 to access it.
|
||||
*/
|
||||
cmd.v1.flags = cpu_to_le32(mvm->fwrt.ppag_flags);
|
||||
cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw,
|
||||
WIDE_ID(PHY_OPS_GROUP, PER_PLATFORM_ANT_GAIN_CMD),
|
||||
IWL_FW_CMD_VER_UNKNOWN);
|
||||
if (cmd_ver == 1) {
|
||||
num_sub_bands = IWL_NUM_SUB_BANDS_V1;
|
||||
gain = cmd.v1.gain[0];
|
||||
cmd_size = sizeof(cmd.v1);
|
||||
if (mvm->fwrt.ppag_ver == 1 || mvm->fwrt.ppag_ver == 2) {
|
||||
IWL_DEBUG_RADIO(mvm,
|
||||
"PPAG table rev is %d but FW supports v1, sending truncated table\n",
|
||||
mvm->fwrt.ppag_ver);
|
||||
cmd.v1.flags &= cpu_to_le32(IWL_PPAG_ETSI_MASK);
|
||||
}
|
||||
} else if (cmd_ver == 2 || cmd_ver == 3) {
|
||||
num_sub_bands = IWL_NUM_SUB_BANDS_V2;
|
||||
gain = cmd.v2.gain[0];
|
||||
cmd_size = sizeof(cmd.v2);
|
||||
if (mvm->fwrt.ppag_ver == 0) {
|
||||
IWL_DEBUG_RADIO(mvm,
|
||||
"PPAG table is v1 but FW supports v2, sending padded table\n");
|
||||
} else if (cmd_ver == 2 && mvm->fwrt.ppag_ver == 2) {
|
||||
IWL_DEBUG_RADIO(mvm,
|
||||
"PPAG table is v3 but FW supports v2, sending partial bitmap.\n");
|
||||
cmd.v1.flags &= cpu_to_le32(IWL_PPAG_ETSI_MASK);
|
||||
}
|
||||
} else {
|
||||
IWL_DEBUG_RADIO(mvm, "Unsupported PPAG command version\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) {
|
||||
for (j = 0; j < num_sub_bands; j++) {
|
||||
gain[i * num_sub_bands + j] =
|
||||
mvm->fwrt.ppag_chains[i].subbands[j];
|
||||
IWL_DEBUG_RADIO(mvm,
|
||||
"PPAG table: chain[%d] band[%d]: gain = %d\n",
|
||||
i, j, gain[i * num_sub_bands + j]);
|
||||
}
|
||||
}
|
||||
IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n");
|
||||
ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP,
|
||||
PER_PLATFORM_ANT_GAIN_CMD),
|
||||
@@ -1151,40 +1029,11 @@ int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
|
||||
return ret;
|
||||
}
|
||||
|
||||
static const struct dmi_system_id dmi_ppag_approved_list[] = {
|
||||
{ .ident = "HP",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "HP"),
|
||||
},
|
||||
},
|
||||
{ .ident = "SAMSUNG",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD"),
|
||||
},
|
||||
},
|
||||
{ .ident = "MSFT",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
|
||||
},
|
||||
},
|
||||
{ .ident = "ASUS",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "ASUSTek COMPUTER INC."),
|
||||
},
|
||||
},
|
||||
{}
|
||||
};
|
||||
|
||||
static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
|
||||
{
|
||||
/* no need to read the table, done in INIT stage */
|
||||
if (!dmi_check_system(dmi_ppag_approved_list)) {
|
||||
IWL_DEBUG_RADIO(mvm,
|
||||
"System vendor '%s' is not in the approved list, disabling PPAG.\n",
|
||||
dmi_get_system_info(DMI_SYS_VENDOR));
|
||||
mvm->fwrt.ppag_flags = 0;
|
||||
if (!(iwl_acpi_is_ppag_approved(&mvm->fwrt)))
|
||||
return 0;
|
||||
}
|
||||
|
||||
return iwl_mvm_ppag_send_cmd(mvm);
|
||||
}
|
||||
@@ -1411,7 +1260,7 @@ void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm)
|
||||
int ret;
|
||||
|
||||
/* read PPAG table */
|
||||
ret = iwl_mvm_get_ppag_table(mvm);
|
||||
ret = iwl_acpi_get_ppag_table(&mvm->fwrt);
|
||||
if (ret < 0) {
|
||||
IWL_DEBUG_RADIO(mvm,
|
||||
"PPAG BIOS table invalid or unavailable. (%d)\n",
|
||||
|
||||
@@ -448,28 +448,6 @@ int iwl_mvm_mac_setup_register(struct iwl_mvm *mvm)
|
||||
hw->wiphy->n_cipher_suites++;
|
||||
}
|
||||
|
||||
/* currently FW API supports only one optional cipher scheme */
|
||||
if (mvm->fw->cs[0].cipher) {
|
||||
const struct iwl_fw_cipher_scheme *fwcs = &mvm->fw->cs[0];
|
||||
struct ieee80211_cipher_scheme *cs = &mvm->cs[0];
|
||||
|
||||
mvm->hw->n_cipher_schemes = 1;
|
||||
|
||||
cs->cipher = le32_to_cpu(fwcs->cipher);
|
||||
cs->iftype = BIT(NL80211_IFTYPE_STATION);
|
||||
cs->hdr_len = fwcs->hdr_len;
|
||||
cs->pn_len = fwcs->pn_len;
|
||||
cs->pn_off = fwcs->pn_off;
|
||||
cs->key_idx_off = fwcs->key_idx_off;
|
||||
cs->key_idx_mask = fwcs->key_idx_mask;
|
||||
cs->key_idx_shift = fwcs->key_idx_shift;
|
||||
cs->mic_len = fwcs->mic_len;
|
||||
|
||||
mvm->hw->cipher_schemes = mvm->cs;
|
||||
mvm->ciphers[hw->wiphy->n_cipher_suites] = cs->cipher;
|
||||
hw->wiphy->n_cipher_suites++;
|
||||
}
|
||||
|
||||
if (fw_has_capa(&mvm->fw->ucode_capa,
|
||||
IWL_UCODE_TLV_CAPA_FTM_CALIBRATED)) {
|
||||
wiphy_ext_feature_set(hw->wiphy,
|
||||
@@ -1336,7 +1314,9 @@ static int iwl_mvm_set_tx_power(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
|
||||
if (tx_power == IWL_DEFAULT_MAX_TX_POWER)
|
||||
cmd.common.pwr_restriction = cpu_to_le16(IWL_DEV_MAX_TX_POWER);
|
||||
|
||||
if (cmd_ver == 6)
|
||||
if (cmd_ver == 7)
|
||||
len = sizeof(cmd.v7);
|
||||
else if (cmd_ver == 6)
|
||||
len = sizeof(cmd.v6);
|
||||
else if (fw_has_api(&mvm->fw->ucode_capa,
|
||||
IWL_UCODE_TLV_API_REDUCE_TX_POWER))
|
||||
@@ -3742,11 +3722,6 @@ static int __iwl_mvm_mac_set_key(struct ieee80211_hw *hw,
|
||||
/* support HW crypto on TX */
|
||||
return 0;
|
||||
default:
|
||||
/* currently FW supports only one optional cipher scheme */
|
||||
if (hw->n_cipher_schemes &&
|
||||
hw->cipher_schemes->cipher == key->cipher)
|
||||
key->flags |= IEEE80211_KEY_FLAG_PUT_IV_SPACE;
|
||||
else
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
|
||||
@@ -1075,7 +1075,6 @@ struct iwl_mvm {
|
||||
|
||||
|
||||
u32 ciphers[IWL_MVM_NUM_CIPHERS];
|
||||
struct ieee80211_cipher_scheme cs[IWL_UCODE_MAX_CS];
|
||||
|
||||
struct cfg80211_ftm_responder_stats ftm_resp_stats;
|
||||
struct {
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
|
||||
/*
|
||||
* Copyright (C) 2018-2021 Intel Corporation
|
||||
* Copyright (C) 2018-2022 Intel Corporation
|
||||
*/
|
||||
#include "iwl-trans.h"
|
||||
#include "iwl-fh.h"
|
||||
@@ -125,6 +125,9 @@ int iwl_pcie_ctxt_info_gen3_init(struct iwl_trans *trans,
|
||||
control_flags |= IWL_PRPH_SCRATCH_MTR_MODE;
|
||||
control_flags |= IWL_PRPH_MTR_FORMAT_256B & IWL_PRPH_SCRATCH_MTR_FORMAT;
|
||||
|
||||
if (trans->trans_cfg->imr_enabled)
|
||||
control_flags |= IWL_PRPH_SCRATCH_IMR_DEBUG_EN;
|
||||
|
||||
/* initialize RX default queue */
|
||||
prph_sc_ctrl->rbd_cfg.free_rbd_addr =
|
||||
cpu_to_le64(trans_pcie->rxq->bd_dma);
|
||||
|
||||
@@ -491,9 +491,10 @@ static const struct pci_device_id iwl_hw_card_ids[] = {
|
||||
/* So devices */
|
||||
{IWL_PCI_DEVICE(0x2725, PCI_ANY_ID, iwl_so_trans_cfg)},
|
||||
{IWL_PCI_DEVICE(0x2726, PCI_ANY_ID, iwl_snj_trans_cfg)},
|
||||
{IWL_PCI_DEVICE(0x7A70, PCI_ANY_ID, iwl_so_long_latency_trans_cfg)},
|
||||
{IWL_PCI_DEVICE(0x7A70, PCI_ANY_ID, iwl_so_long_latency_imr_trans_cfg)},
|
||||
{IWL_PCI_DEVICE(0x7AF0, PCI_ANY_ID, iwl_so_trans_cfg)},
|
||||
{IWL_PCI_DEVICE(0x51F0, PCI_ANY_ID, iwl_so_long_latency_trans_cfg)},
|
||||
{IWL_PCI_DEVICE(0x51F1, PCI_ANY_ID, iwl_so_long_latency_imr_trans_cfg)},
|
||||
{IWL_PCI_DEVICE(0x54F0, PCI_ANY_ID, iwl_so_long_latency_trans_cfg)},
|
||||
{IWL_PCI_DEVICE(0x7F70, PCI_ANY_ID, iwl_so_trans_cfg)},
|
||||
|
||||
|
||||
@@ -1112,7 +1112,7 @@ static const struct iwl_causes_list causes_list_pre_bz[] = {
|
||||
};
|
||||
|
||||
static const struct iwl_causes_list causes_list_bz[] = {
|
||||
{MSIX_HW_INT_CAUSES_REG_SW_ERR_BZ, CSR_MSIX_HW_INT_MASK_AD, 0x29},
|
||||
{MSIX_HW_INT_CAUSES_REG_SW_ERR_BZ, CSR_MSIX_HW_INT_MASK_AD, 0x15},
|
||||
};
|
||||
|
||||
static void iwl_pcie_map_list(struct iwl_trans *trans,
|
||||
|
||||
@@ -1199,6 +1199,10 @@ int iwl_txq_dyn_alloc(struct iwl_trans *trans, u32 flags, u32 sta_mask,
|
||||
};
|
||||
int ret;
|
||||
|
||||
if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_BZ &&
|
||||
trans->hw_rev_step == SILICON_A_STEP)
|
||||
size = 4096;
|
||||
|
||||
txq = iwl_txq_dyn_alloc_dma(trans, size, timeout);
|
||||
if (IS_ERR(txq))
|
||||
return PTR_ERR(txq);
|
||||
|
||||
Reference in New Issue
Block a user