net/mlx5e: Support DCBX CEE API
Add DCBX CEE API interface for ConnectX-4. Configurations are stored in a temporary structure and are applied to the card's firmware when the CEE's setall callback function is called. Note: priority group in CEE is equivalent to traffic class in ConnectX-4 hardware spec. bw allocation per priority in CEE is not supported because ConnectX-4 only supports bw allocation per traffic class. user priority in CEE does not have an equivalent term in ConnectX-4. Therefore, user priority to priority mapping in CEE is not supported. Signed-off-by: Huy Nguyen <huyn@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Huy Nguyen
David S. Miller
parent
80653f73c5
commit
3a6a931dfb
@ -221,6 +221,26 @@ struct mlx5e_params {
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u32 lro_timeout;
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};
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#ifdef CONFIG_MLX5_CORE_EN_DCB
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struct mlx5e_cee_config {
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/* bw pct for priority group */
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u8 pg_bw_pct[CEE_DCBX_MAX_PGS];
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u8 prio_to_pg_map[CEE_DCBX_MAX_PRIO];
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bool pfc_setting[CEE_DCBX_MAX_PRIO];
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bool pfc_enable;
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};
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enum {
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MLX5_DCB_CHG_RESET,
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MLX5_DCB_NO_CHG,
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MLX5_DCB_CHG_NO_RESET,
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};
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struct mlx5e_dcbx {
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struct mlx5e_cee_config cee_cfg; /* pending configuration */
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};
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#endif
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struct mlx5e_tstamp {
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rwlock_t lock;
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struct cyclecounter cycles;
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@ -688,6 +708,10 @@ struct mlx5e_priv {
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struct mlx5e_stats stats;
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struct mlx5e_tstamp tstamp;
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u16 q_counter;
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#ifdef CONFIG_MLX5_CORE_EN_DCB
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struct mlx5e_dcbx dcbx;
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#endif
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const struct mlx5e_profile *profile;
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void *ppriv;
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};
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@ -38,6 +38,9 @@
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#define MLX5E_100MB (100000)
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#define MLX5E_1GB (1000000)
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#define MLX5E_CEE_STATE_UP 1
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#define MLX5E_CEE_STATE_DOWN 0
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static int mlx5e_dcbnl_ieee_getets(struct net_device *netdev,
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struct ieee_ets *ets)
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{
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@ -222,13 +225,15 @@ static int mlx5e_dcbnl_ieee_setpfc(struct net_device *dev,
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static u8 mlx5e_dcbnl_getdcbx(struct net_device *dev)
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{
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return DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_IEEE;
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return DCB_CAP_DCBX_HOST |
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DCB_CAP_DCBX_VER_IEEE |
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DCB_CAP_DCBX_VER_CEE;
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}
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static u8 mlx5e_dcbnl_setdcbx(struct net_device *dev, u8 mode)
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{
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if ((mode & DCB_CAP_DCBX_LLD_MANAGED) ||
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(mode & DCB_CAP_DCBX_VER_CEE) ||
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!(mode & DCB_CAP_DCBX_VER_CEE) ||
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!(mode & DCB_CAP_DCBX_VER_IEEE) ||
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!(mode & DCB_CAP_DCBX_HOST))
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return 1;
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@ -304,6 +309,281 @@ static int mlx5e_dcbnl_ieee_setmaxrate(struct net_device *netdev,
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return mlx5_modify_port_ets_rate_limit(mdev, max_bw_value, max_bw_unit);
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}
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static u8 mlx5e_dcbnl_setall(struct net_device *netdev)
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{
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struct mlx5e_priv *priv = netdev_priv(netdev);
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struct mlx5e_cee_config *cee_cfg = &priv->dcbx.cee_cfg;
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struct mlx5_core_dev *mdev = priv->mdev;
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struct ieee_ets ets;
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struct ieee_pfc pfc;
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int err;
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int i;
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memset(&ets, 0, sizeof(ets));
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memset(&pfc, 0, sizeof(pfc));
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ets.ets_cap = IEEE_8021QAZ_MAX_TCS;
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for (i = 0; i < CEE_DCBX_MAX_PGS; i++) {
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ets.tc_tx_bw[i] = cee_cfg->pg_bw_pct[i];
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ets.tc_rx_bw[i] = cee_cfg->pg_bw_pct[i];
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ets.tc_tsa[i] = IEEE_8021QAZ_TSA_ETS;
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ets.prio_tc[i] = cee_cfg->prio_to_pg_map[i];
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}
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err = mlx5e_dbcnl_validate_ets(netdev, &ets);
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if (err) {
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netdev_err(netdev,
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"%s, Failed to validate ETS: %d\n", __func__, err);
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goto out;
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}
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err = mlx5e_dcbnl_ieee_setets_core(priv, &ets);
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if (err) {
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netdev_err(netdev,
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"%s, Failed to set ETS: %d\n", __func__, err);
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goto out;
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}
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/* Set PFC */
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pfc.pfc_cap = mlx5_max_tc(mdev) + 1;
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if (!cee_cfg->pfc_enable)
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pfc.pfc_en = 0;
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else
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for (i = 0; i < CEE_DCBX_MAX_PRIO; i++)
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pfc.pfc_en |= cee_cfg->pfc_setting[i] << i;
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err = mlx5e_dcbnl_ieee_setpfc(netdev, &pfc);
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if (err) {
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netdev_err(netdev,
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"%s, Failed to set PFC: %d\n", __func__, err);
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goto out;
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}
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out:
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return err ? MLX5_DCB_NO_CHG : MLX5_DCB_CHG_RESET;
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}
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static u8 mlx5e_dcbnl_getstate(struct net_device *netdev)
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{
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return MLX5E_CEE_STATE_UP;
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}
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static void mlx5e_dcbnl_getpermhwaddr(struct net_device *netdev,
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u8 *perm_addr)
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{
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struct mlx5e_priv *priv = netdev_priv(netdev);
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if (!perm_addr)
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return;
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mlx5_query_nic_vport_mac_address(priv->mdev, 0, perm_addr);
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}
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static void mlx5e_dcbnl_setpgtccfgtx(struct net_device *netdev,
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int priority, u8 prio_type,
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u8 pgid, u8 bw_pct, u8 up_map)
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{
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struct mlx5e_priv *priv = netdev_priv(netdev);
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struct mlx5e_cee_config *cee_cfg = &priv->dcbx.cee_cfg;
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if (priority >= CEE_DCBX_MAX_PRIO) {
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netdev_err(netdev,
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"%s, priority is out of range\n", __func__);
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return;
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}
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if (pgid >= CEE_DCBX_MAX_PGS) {
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netdev_err(netdev,
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"%s, priority group is out of range\n", __func__);
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return;
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}
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cee_cfg->prio_to_pg_map[priority] = pgid;
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}
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static void mlx5e_dcbnl_setpgbwgcfgtx(struct net_device *netdev,
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int pgid, u8 bw_pct)
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{
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struct mlx5e_priv *priv = netdev_priv(netdev);
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struct mlx5e_cee_config *cee_cfg = &priv->dcbx.cee_cfg;
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if (pgid >= CEE_DCBX_MAX_PGS) {
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netdev_err(netdev,
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"%s, priority group is out of range\n", __func__);
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return;
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}
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cee_cfg->pg_bw_pct[pgid] = bw_pct;
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}
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static void mlx5e_dcbnl_getpgtccfgtx(struct net_device *netdev,
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int priority, u8 *prio_type,
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u8 *pgid, u8 *bw_pct, u8 *up_map)
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{
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struct mlx5e_priv *priv = netdev_priv(netdev);
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struct mlx5_core_dev *mdev = priv->mdev;
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if (priority >= CEE_DCBX_MAX_PRIO) {
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netdev_err(netdev,
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"%s, priority is out of range\n", __func__);
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return;
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}
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*prio_type = 0;
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*bw_pct = 0;
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*up_map = 0;
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if (mlx5_query_port_prio_tc(mdev, priority, pgid))
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*pgid = 0;
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}
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static void mlx5e_dcbnl_getpgbwgcfgtx(struct net_device *netdev,
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int pgid, u8 *bw_pct)
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{
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struct mlx5e_priv *priv = netdev_priv(netdev);
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struct mlx5_core_dev *mdev = priv->mdev;
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if (pgid >= CEE_DCBX_MAX_PGS) {
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netdev_err(netdev,
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"%s, priority group is out of range\n", __func__);
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return;
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}
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if (mlx5_query_port_tc_bw_alloc(mdev, pgid, bw_pct))
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*bw_pct = 0;
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}
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static void mlx5e_dcbnl_setpfccfg(struct net_device *netdev,
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int priority, u8 setting)
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{
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struct mlx5e_priv *priv = netdev_priv(netdev);
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struct mlx5e_cee_config *cee_cfg = &priv->dcbx.cee_cfg;
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if (priority >= CEE_DCBX_MAX_PRIO) {
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netdev_err(netdev,
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"%s, priority is out of range\n", __func__);
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return;
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}
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if (setting > 1)
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return;
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cee_cfg->pfc_setting[priority] = setting;
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}
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static int
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mlx5e_dcbnl_get_priority_pfc(struct net_device *netdev,
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int priority, u8 *setting)
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{
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struct ieee_pfc pfc;
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int err;
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err = mlx5e_dcbnl_ieee_getpfc(netdev, &pfc);
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if (err)
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*setting = 0;
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else
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*setting = (pfc.pfc_en >> priority) & 0x01;
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return err;
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}
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static void mlx5e_dcbnl_getpfccfg(struct net_device *netdev,
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int priority, u8 *setting)
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{
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if (priority >= CEE_DCBX_MAX_PRIO) {
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netdev_err(netdev,
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"%s, priority is out of range\n", __func__);
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return;
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}
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if (!setting)
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return;
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mlx5e_dcbnl_get_priority_pfc(netdev, priority, setting);
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}
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static u8 mlx5e_dcbnl_getcap(struct net_device *netdev,
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int capid, u8 *cap)
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{
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struct mlx5e_priv *priv = netdev_priv(netdev);
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struct mlx5_core_dev *mdev = priv->mdev;
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u8 rval = 0;
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switch (capid) {
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case DCB_CAP_ATTR_PG:
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*cap = true;
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break;
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case DCB_CAP_ATTR_PFC:
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*cap = true;
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break;
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case DCB_CAP_ATTR_UP2TC:
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*cap = false;
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break;
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case DCB_CAP_ATTR_PG_TCS:
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*cap = 1 << mlx5_max_tc(mdev);
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break;
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case DCB_CAP_ATTR_PFC_TCS:
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*cap = 1 << mlx5_max_tc(mdev);
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break;
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case DCB_CAP_ATTR_GSP:
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*cap = false;
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break;
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case DCB_CAP_ATTR_BCN:
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*cap = false;
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break;
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case DCB_CAP_ATTR_DCBX:
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*cap = (DCB_CAP_DCBX_LLD_MANAGED |
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DCB_CAP_DCBX_VER_CEE |
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DCB_CAP_DCBX_STATIC);
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break;
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default:
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*cap = 0;
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rval = 1;
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break;
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}
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return rval;
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}
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static int mlx5e_dcbnl_getnumtcs(struct net_device *netdev,
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int tcs_id, u8 *num)
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{
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struct mlx5e_priv *priv = netdev_priv(netdev);
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struct mlx5_core_dev *mdev = priv->mdev;
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switch (tcs_id) {
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case DCB_NUMTCS_ATTR_PG:
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case DCB_NUMTCS_ATTR_PFC:
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*num = mlx5_max_tc(mdev) + 1;
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static u8 mlx5e_dcbnl_getpfcstate(struct net_device *netdev)
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{
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struct ieee_pfc pfc;
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if (mlx5e_dcbnl_ieee_getpfc(netdev, &pfc))
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return MLX5E_CEE_STATE_DOWN;
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return pfc.pfc_en ? MLX5E_CEE_STATE_UP : MLX5E_CEE_STATE_DOWN;
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}
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static void mlx5e_dcbnl_setpfcstate(struct net_device *netdev, u8 state)
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{
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struct mlx5e_priv *priv = netdev_priv(netdev);
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struct mlx5e_cee_config *cee_cfg = &priv->dcbx.cee_cfg;
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if ((state != MLX5E_CEE_STATE_UP) && (state != MLX5E_CEE_STATE_DOWN))
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return;
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cee_cfg->pfc_enable = state;
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}
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const struct dcbnl_rtnl_ops mlx5e_dcbnl_ops = {
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.ieee_getets = mlx5e_dcbnl_ieee_getets,
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.ieee_setets = mlx5e_dcbnl_ieee_setets,
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@ -313,4 +593,21 @@ const struct dcbnl_rtnl_ops mlx5e_dcbnl_ops = {
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.ieee_setpfc = mlx5e_dcbnl_ieee_setpfc,
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.getdcbx = mlx5e_dcbnl_getdcbx,
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.setdcbx = mlx5e_dcbnl_setdcbx,
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/* CEE interfaces */
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.setall = mlx5e_dcbnl_setall,
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.getstate = mlx5e_dcbnl_getstate,
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.getpermhwaddr = mlx5e_dcbnl_getpermhwaddr,
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.setpgtccfgtx = mlx5e_dcbnl_setpgtccfgtx,
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.setpgbwgcfgtx = mlx5e_dcbnl_setpgbwgcfgtx,
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.getpgtccfgtx = mlx5e_dcbnl_getpgtccfgtx,
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.getpgbwgcfgtx = mlx5e_dcbnl_getpgbwgcfgtx,
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.setpfccfg = mlx5e_dcbnl_setpfccfg,
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.getpfccfg = mlx5e_dcbnl_getpfccfg,
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.getcap = mlx5e_dcbnl_getcap,
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.getnumtcs = mlx5e_dcbnl_getnumtcs,
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.getpfcstate = mlx5e_dcbnl_getpfcstate,
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.setpfcstate = mlx5e_dcbnl_setpfcstate,
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};
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@ -572,6 +572,28 @@ int mlx5_set_port_prio_tc(struct mlx5_core_dev *mdev, u8 *prio_tc)
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}
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EXPORT_SYMBOL_GPL(mlx5_set_port_prio_tc);
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int mlx5_query_port_prio_tc(struct mlx5_core_dev *mdev,
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u8 prio, u8 *tc)
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{
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u32 in[MLX5_ST_SZ_DW(qtct_reg)];
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u32 out[MLX5_ST_SZ_DW(qtct_reg)];
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int err;
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memset(in, 0, sizeof(in));
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memset(out, 0, sizeof(out));
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MLX5_SET(qtct_reg, in, port_number, 1);
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MLX5_SET(qtct_reg, in, prio, prio);
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err = mlx5_core_access_reg(mdev, in, sizeof(in), out,
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sizeof(out), MLX5_REG_QTCT, 0, 0);
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if (!err)
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*tc = MLX5_GET(qtct_reg, out, tclass);
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return err;
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}
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EXPORT_SYMBOL_GPL(mlx5_query_port_prio_tc);
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static int mlx5_set_port_qetcr_reg(struct mlx5_core_dev *mdev, u32 *in,
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int inlen)
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{
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@ -625,6 +647,27 @@ int mlx5_set_port_tc_bw_alloc(struct mlx5_core_dev *mdev, u8 *tc_bw)
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}
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EXPORT_SYMBOL_GPL(mlx5_set_port_tc_bw_alloc);
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int mlx5_query_port_tc_bw_alloc(struct mlx5_core_dev *mdev,
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u8 tc, u8 *bw_pct)
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{
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u32 out[MLX5_ST_SZ_DW(qetc_reg)];
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void *ets_tcn_conf;
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int err;
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err = mlx5_query_port_qetcr_reg(mdev, out, sizeof(out));
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if (err)
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return err;
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ets_tcn_conf = MLX5_ADDR_OF(qetc_reg, out,
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tc_configuration[tc]);
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*bw_pct = MLX5_GET(ets_tcn_config_reg, ets_tcn_conf,
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bw_allocation);
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return 0;
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}
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EXPORT_SYMBOL_GPL(mlx5_query_port_tc_bw_alloc);
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int mlx5_modify_port_ets_rate_limit(struct mlx5_core_dev *mdev,
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u8 *max_bw_value,
|
||||
u8 *max_bw_units)
|
||||
|
||||
@ -141,8 +141,12 @@ int mlx5_query_port_pfc(struct mlx5_core_dev *dev, u8 *pfc_en_tx,
|
||||
int mlx5_max_tc(struct mlx5_core_dev *mdev);
|
||||
|
||||
int mlx5_set_port_prio_tc(struct mlx5_core_dev *mdev, u8 *prio_tc);
|
||||
int mlx5_query_port_prio_tc(struct mlx5_core_dev *mdev,
|
||||
u8 prio, u8 *tc);
|
||||
int mlx5_set_port_tc_group(struct mlx5_core_dev *mdev, u8 *tc_group);
|
||||
int mlx5_set_port_tc_bw_alloc(struct mlx5_core_dev *mdev, u8 *tc_bw);
|
||||
int mlx5_query_port_tc_bw_alloc(struct mlx5_core_dev *mdev,
|
||||
u8 tc, u8 *bw_pct);
|
||||
int mlx5_modify_port_ets_rate_limit(struct mlx5_core_dev *mdev,
|
||||
u8 *max_bw_value,
|
||||
u8 *max_bw_unit);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user