devlink: Introduce controller number
A devlink port may be for a controller consist of PCI device.
A devlink instance holds ports of two types of controllers.
(1) controller discovered on same system where eswitch resides
This is the case where PCI PF/VF of a controller and devlink eswitch
instance both are located on a single system.
(2) controller located on external host system.
This is the case where a controller is located in one system and its
devlink eswitch ports are located in a different system.
When a devlink eswitch instance serves the devlink ports of both
controllers together, PCI PF/VF numbers may overlap.
Due to this a unique phys_port_name cannot be constructed.
For example in below such system controller-0 and controller-1, each has
PCI PF pf0 whose eswitch ports can be present in controller-0.
These results in phys_port_name as "pf0" for both.
Similar problem exists for VFs and upcoming Sub functions.
An example view of two controller systems:
---------------------------------------------------------
| |
| --------- --------- ------- ------- |
----------- | | vf(s) | | sf(s) | |vf(s)| |sf(s)| |
| server | | ------- ----/---- ---/----- ------- ---/--- ---/--- |
| pci rc |=== | pf0 |______/________/ | pf1 |___/_______/ |
| connect | | ------- ------- |
----------- | | controller_num=1 (no eswitch) |
------|--------------------------------------------------
(internal wire)
|
---------------------------------------------------------
| devlink eswitch ports and reps |
| ----------------------------------------------------- |
| |ctrl-0 | ctrl-0 | ctrl-0 | ctrl-0 | ctrl-0 |ctrl-0 | |
| |pf0 | pf0vfN | pf0sfN | pf1 | pf1vfN |pf1sfN | |
| ----------------------------------------------------- |
| |ctrl-1 | ctrl-1 | ctrl-1 | ctrl-1 | ctrl-1 |ctrl-1 | |
| |pf1 | pf1vfN | pf1sfN | pf1 | pf1vfN |pf0sfN | |
| ----------------------------------------------------- |
| |
| |
| --------- --------- ------- ------- |
| | vf(s) | | sf(s) | |vf(s)| |sf(s)| |
| ------- ----/---- ---/----- ------- ---/--- ---/--- |
| | pf0 |______/________/ | pf1 |___/_______/ |
| ------- ------- |
| |
| local controller_num=0 (eswitch) |
---------------------------------------------------------
An example devlink port for external controller with controller
number = 1 for a VF 1 of PF 0:
$ devlink port show pci/0000:06:00.0/2
pci/0000:06:00.0/2: type eth netdev ens2f0pf0vf1 flavour pcivf controller 1 pfnum 0 vfnum 1 external true splittable false
function:
hw_addr 00:00:00:00:00:00
$ devlink port show pci/0000:06:00.0/2 -jp
{
"port": {
"pci/0000:06:00.0/2": {
"type": "eth",
"netdev": "ens2f0pf0vf1",
"flavour": "pcivf",
"controller": 1,
"pfnum": 0,
"vfnum": 1,
"external": true,
"splittable": false,
"function": {
"hw_addr": "00:00:00:00:00:00"
}
}
}
}
Signed-off-by: Parav Pandit <parav@nvidia.com>
Reviewed-by: Jiri Pirko <jiri@nvidia.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
committed by
David S. Miller
parent
05b595e9c4
commit
3a2d9588c4
@@ -1210,11 +1210,13 @@ is_devlink_port_supported(const struct mlx5_core_dev *dev,
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static int register_devlink_port(struct mlx5_core_dev *dev,
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struct mlx5e_rep_priv *rpriv)
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{
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struct mlx5_esw_offload *offloads = &dev->priv.eswitch->offloads;
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struct devlink *devlink = priv_to_devlink(dev);
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struct mlx5_eswitch_rep *rep = rpriv->rep;
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struct devlink_port_attrs attrs = {};
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struct netdev_phys_item_id ppid = {};
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unsigned int dl_port_index = 0;
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u32 controller_num = 0;
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bool external;
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u16 pfnum;
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@@ -1222,6 +1224,8 @@ static int register_devlink_port(struct mlx5_core_dev *dev,
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return 0;
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external = mlx5_core_is_ecpf_esw_manager(dev);
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if (external)
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controller_num = offloads->host_number + 1;
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mlx5e_rep_get_port_parent_id(rpriv->netdev, &ppid);
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dl_port_index = mlx5_esw_vport_to_devlink_port_index(dev, rep->vport);
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pfnum = PCI_FUNC(dev->pdev->devfn);
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@@ -1234,11 +1238,12 @@ static int register_devlink_port(struct mlx5_core_dev *dev,
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} else if (rep->vport == MLX5_VPORT_PF) {
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memcpy(rpriv->dl_port.attrs.switch_id.id, &ppid.id[0], ppid.id_len);
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rpriv->dl_port.attrs.switch_id.id_len = ppid.id_len;
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devlink_port_attrs_pci_pf_set(&rpriv->dl_port, pfnum, external);
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devlink_port_attrs_pci_pf_set(&rpriv->dl_port, controller_num,
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pfnum, external);
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} else if (mlx5_eswitch_is_vf_vport(dev->priv.eswitch, rpriv->rep->vport)) {
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memcpy(rpriv->dl_port.attrs.switch_id.id, &ppid.id[0], ppid.id_len);
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rpriv->dl_port.attrs.switch_id.id_len = ppid.id_len;
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devlink_port_attrs_pci_vf_set(&rpriv->dl_port,
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devlink_port_attrs_pci_vf_set(&rpriv->dl_port, controller_num,
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pfnum, rep->vport - 1, external);
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}
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return devlink_port_register(devlink, &rpriv->dl_port, dl_port_index);
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@@ -59,21 +59,25 @@ struct devlink_port_phys_attrs {
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/**
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* struct devlink_port_pci_pf_attrs - devlink port's PCI PF attributes
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* @controller: Associated controller number
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* @pf: Associated PCI PF number for this port.
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* @external: when set, indicates if a port is for an external controller
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*/
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struct devlink_port_pci_pf_attrs {
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u32 controller;
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u16 pf;
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u8 external:1;
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};
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/**
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* struct devlink_port_pci_vf_attrs - devlink port's PCI VF attributes
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* @controller: Associated controller number
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* @pf: Associated PCI PF number for this port.
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* @vf: Associated PCI VF for of the PCI PF for this port.
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* @external: when set, indicates if a port is for an external controller
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*/
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struct devlink_port_pci_vf_attrs {
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u32 controller;
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u16 pf;
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u16 vf;
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u8 external:1;
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@@ -1219,8 +1223,9 @@ void devlink_port_type_ib_set(struct devlink_port *devlink_port,
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void devlink_port_type_clear(struct devlink_port *devlink_port);
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void devlink_port_attrs_set(struct devlink_port *devlink_port,
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struct devlink_port_attrs *devlink_port_attrs);
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void devlink_port_attrs_pci_pf_set(struct devlink_port *devlink_port, u16 pf, bool external);
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void devlink_port_attrs_pci_vf_set(struct devlink_port *devlink_port,
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void devlink_port_attrs_pci_pf_set(struct devlink_port *devlink_port, u32 controller,
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u16 pf, bool external);
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void devlink_port_attrs_pci_vf_set(struct devlink_port *devlink_port, u32 controller,
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u16 pf, u16 vf, bool external);
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int devlink_sb_register(struct devlink *devlink, unsigned int sb_index,
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u32 size, u16 ingress_pools_count,
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@@ -459,6 +459,7 @@ enum devlink_attr {
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DEVLINK_ATTR_PORT_SPLITTABLE, /* u8 */
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DEVLINK_ATTR_PORT_EXTERNAL, /* u8 */
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DEVLINK_ATTR_PORT_CONTROLLER_NUMBER, /* u32 */
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/* add new attributes above here, update the policy in devlink.c */
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__DEVLINK_ATTR_MAX,
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@@ -523,17 +523,18 @@ static int devlink_nl_port_attrs_put(struct sk_buff *msg,
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return -EMSGSIZE;
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switch (devlink_port->attrs.flavour) {
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case DEVLINK_PORT_FLAVOUR_PCI_PF:
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if (nla_put_u16(msg, DEVLINK_ATTR_PORT_PCI_PF_NUMBER,
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attrs->pci_pf.pf))
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if (nla_put_u32(msg, DEVLINK_ATTR_PORT_CONTROLLER_NUMBER,
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attrs->pci_pf.controller) ||
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nla_put_u16(msg, DEVLINK_ATTR_PORT_PCI_PF_NUMBER, attrs->pci_pf.pf))
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return -EMSGSIZE;
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if (nla_put_u8(msg, DEVLINK_ATTR_PORT_EXTERNAL, attrs->pci_pf.external))
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return -EMSGSIZE;
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break;
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case DEVLINK_PORT_FLAVOUR_PCI_VF:
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if (nla_put_u16(msg, DEVLINK_ATTR_PORT_PCI_PF_NUMBER,
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attrs->pci_vf.pf) ||
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nla_put_u16(msg, DEVLINK_ATTR_PORT_PCI_VF_NUMBER,
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attrs->pci_vf.vf))
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if (nla_put_u32(msg, DEVLINK_ATTR_PORT_CONTROLLER_NUMBER,
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attrs->pci_vf.controller) ||
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nla_put_u16(msg, DEVLINK_ATTR_PORT_PCI_PF_NUMBER, attrs->pci_vf.pf) ||
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nla_put_u16(msg, DEVLINK_ATTR_PORT_PCI_VF_NUMBER, attrs->pci_vf.vf))
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return -EMSGSIZE;
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if (nla_put_u8(msg, DEVLINK_ATTR_PORT_EXTERNAL, attrs->pci_vf.external))
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return -EMSGSIZE;
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@@ -7719,10 +7720,12 @@ EXPORT_SYMBOL_GPL(devlink_port_attrs_set);
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* devlink_port_attrs_pci_pf_set - Set PCI PF port attributes
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*
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* @devlink_port: devlink port
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* @controller: associated controller number for the devlink port instance
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* @pf: associated PF for the devlink port instance
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* @external: indicates if the port is for an external controller
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*/
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void devlink_port_attrs_pci_pf_set(struct devlink_port *devlink_port, u16 pf, bool external)
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void devlink_port_attrs_pci_pf_set(struct devlink_port *devlink_port, u32 controller,
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u16 pf, bool external)
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{
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struct devlink_port_attrs *attrs = &devlink_port->attrs;
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int ret;
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@@ -7731,7 +7734,7 @@ void devlink_port_attrs_pci_pf_set(struct devlink_port *devlink_port, u16 pf, bo
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DEVLINK_PORT_FLAVOUR_PCI_PF);
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if (ret)
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return;
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attrs->pci_pf.controller = controller;
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attrs->pci_pf.pf = pf;
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attrs->pci_pf.external = external;
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}
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@@ -7741,11 +7744,12 @@ EXPORT_SYMBOL_GPL(devlink_port_attrs_pci_pf_set);
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* devlink_port_attrs_pci_vf_set - Set PCI VF port attributes
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*
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* @devlink_port: devlink port
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* @controller: associated controller number for the devlink port instance
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* @pf: associated PF for the devlink port instance
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* @vf: associated VF of a PF for the devlink port instance
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* @external: indicates if the port is for an external controller
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*/
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void devlink_port_attrs_pci_vf_set(struct devlink_port *devlink_port,
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void devlink_port_attrs_pci_vf_set(struct devlink_port *devlink_port, u32 controller,
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u16 pf, u16 vf, bool external)
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{
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struct devlink_port_attrs *attrs = &devlink_port->attrs;
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@@ -7755,6 +7759,7 @@ void devlink_port_attrs_pci_vf_set(struct devlink_port *devlink_port,
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DEVLINK_PORT_FLAVOUR_PCI_VF);
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if (ret)
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return;
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attrs->pci_vf.controller = controller;
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attrs->pci_vf.pf = pf;
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attrs->pci_vf.vf = vf;
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attrs->pci_vf.external = external;
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