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arm64: dts: exynos: re-order Slim SSS clocks to match dtschema

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The dtschema expects pclk (APB clock) followed by aclk (AXI/AHB clock):

  arch/arm64/boot/dts/exynos/exynos5433-tm2.dt.yaml:
    slim-sss@11140000: clock-names:0: 'pclk' was expected
  arch/arm64/boot/dts/exynos/exynos5433-tm2.dt.yaml:
    slim-sss@11140000: clock-names:1: 'aclk' was expected

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20210212163729.69882-1-krzk@kernel.org
This commit is contained in:
Krzysztof Kozlowski 2021-02-12 17:37:29 +01:00
parent a38fd87484
commit 396e589a72
1 changed files with 3 additions and 3 deletions
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6
arch/arm64/boot/dts/exynos/exynos5433.dtsi
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@ -564,9 +564,9 @@
compatible = "samsung,exynos5433-slim-sss"; compatible = "samsung,exynos5433-slim-sss";
reg = <0x11140000 0x1000>; reg = <0x11140000 0x1000>;
interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "aclk", "pclk"; clock-names = "pclk", "aclk";
clocks = <&cmu_imem CLK_ACLK_SLIMSSS>, clocks = <&cmu_imem CLK_PCLK_SLIMSSS>,
<&cmu_imem CLK_PCLK_SLIMSSS>; <&cmu_imem CLK_ACLK_SLIMSSS>;
}; };
pd_gscl: power-domain@105c4000 { pd_gscl: power-domain@105c4000 {