forked from Minki/linux
KVM: nVMX: Further fixes for lazy FPU loading
KVM's "Lazy FPU loading" means that sometimes L0 needs to set CR0.TS, even if a guest didn't set it. Moreover, L0 must also trap CR0.TS changes and NM exceptions, even if we have a guest hypervisor (L1) who didn't want these traps. And of course, conversely: If L1 wanted to trap these events, we must let it, even if L0 is not interested in them. This patch fixes some existing KVM code (in update_exception_bitmap(), vmx_fpu_activate(), vmx_fpu_deactivate()) to do the correct merging of L0's and L1's needs. Note that handle_cr() was already fixed in the above patch, and that new code in introduced in previous patches already handles CR0 correctly (see prepare_vmcs02(), prepare_vmcs12(), and nested_vmx_vmexit()). Signed-off-by: Nadav Har'El <nyh@il.ibm.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
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@ -1179,6 +1179,15 @@ static void update_exception_bitmap(struct kvm_vcpu *vcpu)
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eb &= ~(1u << PF_VECTOR); /* bypass_guest_pf = 0 */
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if (vcpu->fpu_active)
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eb &= ~(1u << NM_VECTOR);
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/* When we are running a nested L2 guest and L1 specified for it a
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* certain exception bitmap, we must trap the same exceptions and pass
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* them to L1. When running L2, we will only handle the exceptions
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* specified above if L1 did not want them.
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*/
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if (is_guest_mode(vcpu))
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eb |= get_vmcs12(vcpu)->exception_bitmap;
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vmcs_write32(EXCEPTION_BITMAP, eb);
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}
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@ -1473,6 +1482,9 @@ static void vmx_fpu_activate(struct kvm_vcpu *vcpu)
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vmcs_writel(GUEST_CR0, cr0);
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update_exception_bitmap(vcpu);
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vcpu->arch.cr0_guest_owned_bits = X86_CR0_TS;
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if (is_guest_mode(vcpu))
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vcpu->arch.cr0_guest_owned_bits &=
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~get_vmcs12(vcpu)->cr0_guest_host_mask;
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vmcs_writel(CR0_GUEST_HOST_MASK, ~vcpu->arch.cr0_guest_owned_bits);
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}
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@ -1496,12 +1508,29 @@ static inline unsigned long nested_read_cr4(struct vmcs12 *fields)
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static void vmx_fpu_deactivate(struct kvm_vcpu *vcpu)
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{
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/* Note that there is no vcpu->fpu_active = 0 here. The caller must
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* set this *before* calling this function.
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*/
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vmx_decache_cr0_guest_bits(vcpu);
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vmcs_set_bits(GUEST_CR0, X86_CR0_TS | X86_CR0_MP);
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update_exception_bitmap(vcpu);
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vcpu->arch.cr0_guest_owned_bits = 0;
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vmcs_writel(CR0_GUEST_HOST_MASK, ~vcpu->arch.cr0_guest_owned_bits);
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vmcs_writel(CR0_READ_SHADOW, vcpu->arch.cr0);
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if (is_guest_mode(vcpu)) {
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/*
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* L1's specified read shadow might not contain the TS bit,
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* so now that we turned on shadowing of this bit, we need to
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* set this bit of the shadow. Like in nested_vmx_run we need
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* nested_read_cr0(vmcs12), but vmcs12->guest_cr0 is not yet
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* up-to-date here because we just decached cr0.TS (and we'll
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* only update vmcs12->guest_cr0 on nested exit).
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*/
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struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
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vmcs12->guest_cr0 = (vmcs12->guest_cr0 & ~X86_CR0_TS) |
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(vcpu->arch.cr0 & X86_CR0_TS);
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vmcs_writel(CR0_READ_SHADOW, nested_read_cr0(vmcs12));
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} else
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vmcs_writel(CR0_READ_SHADOW, vcpu->arch.cr0);
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}
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static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
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