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Merge series "ASoC: Clean-up W=1 build warnings​ - part2" from Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>:

Browse Source 
Both Lee Jones and I submitted separate series, this is the second
part of the merged result, for which no feedback was provided.

I picked Lee's patches for rt5659 and ak4458 and added the pxa and
ux500 that I didn't fix. The rest is largely identical between our
respective series, with the exception of the sunxi which I documented
and Lee removed. I don't have any specific preference and will go with
the flow on this.

Changes since v3:
Improved commit subjects from 'fix kernel-doc' as suggested by Lee
Jones. In a couple of cases I just reverted to Lee's patches when the
code was identical.
Added a couple of CC: tags from Lee's patches.
Added Arnaud Pouliquen's Acked-by tag in first patch.

Lee Jones (6):
  ASoC: sunxi: sun4i-spdif: Fix misspelling of 'reg_dac_txdata' in
    kernel-doc
  ASoC: pxa: pxa-ssp: Demote seemingly unintentional kerneldoc header
  ASoC: ux500: ux500_msp_i2s: Remove unused variables 'reg_val_DR' and
    'reg_val_TSTDR'
  ASoC: codecs: rt5659: Remove many unused const variables
  ASoC: codecs: tlv320aic26: Demote seemingly unintentional kerneldoc
    header
  ASoC: codecs: ak4458: Remove set but never checked variable 'ret'

Pierre-Louis Bossart (4):
  ASoC: sti: uniperif: fix 'defined by not used' warning
  ASoC: qcom: qdsp6: q6asm: Provide documentation for 'codec_profile'
  ASoC: sunxi: sun4i-i2s: add missing clock and format arguments in
    kernel-doc
  ASoC: codecs: rt5631: fix spurious kernel-doc start and missing
    arguments

 sound/soc/codecs/ak4458.c       |  6 +++---
 sound/soc/codecs/rt5631.c       |  8 +++++--
 sound/soc/codecs/rt5659.c       | 37 ---------------------------------
 sound/soc/codecs/tlv320aic26.c  |  2 +-
 sound/soc/pxa/pxa-ssp.c         |  2 +-
 sound/soc/qcom/qdsp6/q6asm.c    |  2 +-
 sound/soc/sti/uniperif.h        |  2 +-
 sound/soc/sunxi/sun4i-i2s.c     | 10 ++++++++-
 sound/soc/sunxi/sun4i-spdif.c   |  2 +-
 sound/soc/ux500/ux500_msp_i2s.c |  8 +++----
 10 files changed, 27 insertions(+), 52 deletions(-)

base-commit: 6940701c71
--
2.25.1
This commit is contained in:
Mark Brown 2020-07-10 16:06:45 +01:00
commit 3689eb0bbd
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
10 changed files with 27 additions and 52 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
sound/soc/codecs/ak4458.c
View File

@ -405,7 +405,7 @@ static int ak4458_set_dai_mute(struct snd_soc_dai *dai, int mute)
{
struct snd_soc_component *component = dai->component;
struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
int nfs, ndt, ret, reg;
int nfs, ndt, reg;
int ats;
nfs = ak4458->fs;
@ -416,14 +416,14 @@ static int ak4458_set_dai_mute(struct snd_soc_dai *dai, int mute)
ndt = att_speed[ats] / (nfs / 1000);
if (mute) {
ret = snd_soc_component_update_bits(component, AK4458_01_CONTROL2, 0x01, 1);
snd_soc_component_update_bits(component, AK4458_01_CONTROL2, 0x01, 1);
mdelay(ndt);
if (ak4458->mute_gpiod)
gpiod_set_value_cansleep(ak4458->mute_gpiod, 1);
} else {
if (ak4458->mute_gpiod)
gpiod_set_value_cansleep(ak4458->mute_gpiod, 0);
ret = snd_soc_component_update_bits(component, AK4458_01_CONTROL2, 0x01, 0);
snd_soc_component_update_bits(component, AK4458_01_CONTROL2, 0x01, 0);
mdelay(ndt);
}

8
sound/soc/codecs/rt5631.c
View File

@ -64,7 +64,7 @@ static const struct reg_default rt5631_reg[] = {
{ RT5631_PSEUDO_SPATL_CTRL, 0x0553 },
};
/**
/*
* rt5631_write_index - write index register of 2nd layer
*/
static void rt5631_write_index(struct snd_soc_component *component,
@ -74,7 +74,7 @@ static void rt5631_write_index(struct snd_soc_component *component,
snd_soc_component_write(component, RT5631_INDEX_DATA, value);
}
/**
/*
* rt5631_read_index - read index register of 2nd layer
*/
static unsigned int rt5631_read_index(struct snd_soc_component *component,
@ -359,6 +359,7 @@ static int check_adcr_select(struct snd_soc_dapm_widget *source,
/**
* onebit_depop_power_stage - auto depop in power stage.
* @component: ASoC component
* @enable: power on/off
*
* When power on/off headphone, the depop sequence is done by hardware.
@ -397,6 +398,7 @@ static void onebit_depop_power_stage(struct snd_soc_component *component, int en
/**
* onebit_depop_mute_stage - auto depop in mute stage.
* @component: ASoC component
* @enable: mute/unmute
*
* When mute/unmute headphone, the depop sequence is done by hardware.
@ -435,6 +437,7 @@ static void onebit_depop_mute_stage(struct snd_soc_component *component, int ena
/**
* onebit_depop_power_stage - step by step depop sequence in power stage.
* @component: ASoC component
* @enable: power on/off
*
* When power on/off headphone, the depop sequence is done in step by step.
@ -507,6 +510,7 @@ static void depop_seq_power_stage(struct snd_soc_component *component, int enabl
/**
* depop_seq_mute_stage - step by step depop sequence in mute stage.
* @component: ASoC component
* @enable: mute/unmute
*
* When mute/unmute headphone, the depop sequence is done in step by step.

37
sound/soc/codecs/rt5659.c
View File

@ -1195,43 +1195,6 @@ static const struct snd_kcontrol_new rt5659_if3_dac_swap_mux =
static const struct snd_kcontrol_new rt5659_if3_adc_swap_mux =
SOC_DAPM_ENUM("IF3 ADC Swap Source", rt5659_if3_adc_enum);
static const char * const rt5659_asrc_clk_src[] = {
"clk_sysy_div_out", "clk_i2s1_track", "clk_i2s2_track",
"clk_i2s3_track", "clk_sys2", "clk_sys3"
};
static unsigned int rt5659_asrc_clk_map_values[] = {
0, 1, 2, 3, 5, 6,
};
static SOC_VALUE_ENUM_SINGLE_DECL(
rt5659_da_sto_asrc_enum, RT5659_ASRC_2, RT5659_DA_STO_T_SFT, 0x7,
rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
static SOC_VALUE_ENUM_SINGLE_DECL(
rt5659_da_monol_asrc_enum, RT5659_ASRC_2, RT5659_DA_MONO_L_T_SFT, 0x7,
rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
static SOC_VALUE_ENUM_SINGLE_DECL(
rt5659_da_monor_asrc_enum, RT5659_ASRC_2, RT5659_DA_MONO_R_T_SFT, 0x7,
rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
static SOC_VALUE_ENUM_SINGLE_DECL(
rt5659_ad_sto1_asrc_enum, RT5659_ASRC_2, RT5659_AD_STO1_T_SFT, 0x7,
rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
static SOC_VALUE_ENUM_SINGLE_DECL(
rt5659_ad_sto2_asrc_enum, RT5659_ASRC_3, RT5659_AD_STO2_T_SFT, 0x7,
rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
static SOC_VALUE_ENUM_SINGLE_DECL(
rt5659_ad_monol_asrc_enum, RT5659_ASRC_3, RT5659_AD_MONO_L_T_SFT, 0x7,
rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
static SOC_VALUE_ENUM_SINGLE_DECL(
rt5659_ad_monor_asrc_enum, RT5659_ASRC_3, RT5659_AD_MONO_R_T_SFT, 0x7,
rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
static int rt5659_hp_vol_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{

2
sound/soc/codecs/tlv320aic26.c
View File

@ -131,7 +131,7 @@ static int aic26_hw_params(struct snd_pcm_substream *substream,
return 0;
}
/**
/*
* aic26_mute - Mute control to reduce noise when changing audio format
*/
static int aic26_mute(struct snd_soc_dai *dai, int mute)

2
sound/soc/pxa/pxa-ssp.c
View File

@ -178,7 +178,7 @@ static int pxa_ssp_resume(struct snd_soc_component *component)
#define pxa_ssp_resume NULL
#endif
/**
/*
* ssp_set_clkdiv - set SSP clock divider
* @div: serial clock rate divider
*/

2
sound/soc/qcom/qdsp6/q6asm.c
View File

@ -912,9 +912,9 @@ err:
/**
* q6asm_open_write() - Open audio client for writing
*
* @ac: audio client pointer
* @format: audio sample format
* @codec_profile: compressed format profile
* @bits_per_sample: bits per sample
*
* Return: Will be an negative value on error or zero on success

2
sound/soc/sti/uniperif.h
View File

@ -1348,7 +1348,7 @@ struct sti_uniperiph_data {
struct sti_uniperiph_dai dai_data;
};
static const struct snd_pcm_hardware uni_tdm_hw = {
static __maybe_unused const struct snd_pcm_hardware uni_tdm_hw = {
.info = SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_MMAP_VALID,

10
sound/soc/sunxi/sun4i-i2s.c
View File

@ -128,13 +128,21 @@ struct sun4i_i2s;
/**
* struct sun4i_i2s_quirks - Differences between SoC variants.
*
* @has_reset: SoC needs reset deasserted.
* @reg_offset_txdata: offset of the tx fifo.
* @sun4i_i2s_regmap: regmap config to use.
* @field_clkdiv_mclk_en: regmap field to enable mclk output.
* @field_fmt_wss: regmap field to set word select size.
* @field_fmt_sr: regmap field to set sample resolution.
* @bclk_dividers: bit clock dividers array
* @num_bclk_dividers: number of bit clock dividers
* @mclk_dividers: mclk dividers array
* @num_mclk_dividers: number of mclk dividers
* @get_bclk_parent_rate: callback to get bclk parent rate
* @get_sr: callback to get sample resolution
* @get_wss: callback to get word select size
* @set_chan_cfg: callback to set channel configuration
* @set_fmt: callback to set format
*/
struct sun4i_i2s_quirks {
bool has_reset;

2
sound/soc/sunxi/sun4i-spdif.c
View File

@ -167,7 +167,7 @@
/**
* struct sun4i_spdif_quirks - Differences between SoC variants.
*
* @reg_dac_tx_data: TX FIFO offset for DMA config.
* @reg_dac_txdata: TX FIFO offset for DMA config.
* @has_reset: SoC needs reset deasserted.
* @val_fctl_ftx: TX FIFO flush bitmask.
*/

8
sound/soc/ux500/ux500_msp_i2s.c
View File

@ -395,7 +395,7 @@ static int enable_msp(struct ux500_msp *msp, struct ux500_msp_config *config)
static void flush_fifo_rx(struct ux500_msp *msp)
{
u32 reg_val_DR, reg_val_GCR, reg_val_FLR;
u32 reg_val_GCR, reg_val_FLR;
u32 limit = 32;
reg_val_GCR = readl(msp->registers + MSP_GCR);
@ -403,7 +403,7 @@ static void flush_fifo_rx(struct ux500_msp *msp)
reg_val_FLR = readl(msp->registers + MSP_FLR);
while (!(reg_val_FLR & RX_FIFO_EMPTY) && limit--) {
reg_val_DR = readl(msp->registers + MSP_DR);
readl(msp->registers + MSP_DR);
reg_val_FLR = readl(msp->registers + MSP_FLR);
}
@ -412,7 +412,7 @@ static void flush_fifo_rx(struct ux500_msp *msp)
static void flush_fifo_tx(struct ux500_msp *msp)
{
u32 reg_val_TSTDR, reg_val_GCR, reg_val_FLR;
u32 reg_val_GCR, reg_val_FLR;
u32 limit = 32;
reg_val_GCR = readl(msp->registers + MSP_GCR);
@ -421,7 +421,7 @@ static void flush_fifo_tx(struct ux500_msp *msp)
reg_val_FLR = readl(msp->registers + MSP_FLR);
while (!(reg_val_FLR & TX_FIFO_EMPTY) && limit--) {
reg_val_TSTDR = readl(msp->registers + MSP_TSTDR);
readl(msp->registers + MSP_TSTDR);
reg_val_FLR = readl(msp->registers + MSP_FLR);
}
writel(0x0, msp->registers + MSP_ITCR);