forked from Minki/linux
x86/boot: Detect 5-level paging support
In this initial implementation we force-require 5-level paging support from the hardware, when compiled with CONFIG_X86_5LEVEL=y. (The kernel will panic during boot on CPUs that don't support 5-level paging.) We will implement boot-time switch between 4- and 5-level paging later. Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Andy Lutomirski <luto@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Dave Hansen <dave.hansen@intel.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-arch@vger.kernel.org Cc: linux-mm@kvack.org Link: http://lkml.kernel.org/r/20170330080731.65421-2-kirill.shutemov@linux.intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
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@ -44,6 +44,15 @@ static const u32 req_flags[NCAPINTS] =
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0, /* REQUIRED_MASK5 not implemented in this file */
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REQUIRED_MASK6,
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0, /* REQUIRED_MASK7 not implemented in this file */
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0, /* REQUIRED_MASK8 not implemented in this file */
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0, /* REQUIRED_MASK9 not implemented in this file */
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0, /* REQUIRED_MASK10 not implemented in this file */
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0, /* REQUIRED_MASK11 not implemented in this file */
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0, /* REQUIRED_MASK12 not implemented in this file */
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0, /* REQUIRED_MASK13 not implemented in this file */
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0, /* REQUIRED_MASK14 not implemented in this file */
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0, /* REQUIRED_MASK15 not implemented in this file */
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REQUIRED_MASK16,
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};
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#define A32(a, b, c, d) (((d) << 24)+((c) << 16)+((b) << 8)+(a))
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@ -70,16 +70,19 @@ int has_eflag(unsigned long mask)
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# define EBX_REG "=b"
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#endif
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static inline void cpuid(u32 id, u32 *a, u32 *b, u32 *c, u32 *d)
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static inline void cpuid_count(u32 id, u32 count,
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u32 *a, u32 *b, u32 *c, u32 *d)
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{
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asm volatile(".ifnc %%ebx,%3 ; movl %%ebx,%3 ; .endif \n\t"
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"cpuid \n\t"
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".ifnc %%ebx,%3 ; xchgl %%ebx,%3 ; .endif \n\t"
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: "=a" (*a), "=c" (*c), "=d" (*d), EBX_REG (*b)
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: "a" (id)
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: "a" (id), "c" (count)
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);
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}
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#define cpuid(id, a, b, c, d) cpuid_count(id, 0, a, b, c, d)
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void get_cpuflags(void)
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{
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u32 max_intel_level, max_amd_level;
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@ -108,6 +111,11 @@ void get_cpuflags(void)
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cpu.model += ((tfms >> 16) & 0xf) << 4;
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}
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if (max_intel_level >= 0x00000007) {
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cpuid_count(0x00000007, 0, &ignored, &ignored,
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&cpu.flags[16], &ignored);
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}
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cpuid(0x80000000, &max_amd_level, &ignored, &ignored,
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&ignored);
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@ -36,6 +36,12 @@
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# define DISABLE_OSPKE (1<<(X86_FEATURE_OSPKE & 31))
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#endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */
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#ifdef CONFIG_X86_5LEVEL
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# define DISABLE_LA57 0
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#else
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# define DISABLE_LA57 (1<<(X86_FEATURE_LA57 & 31))
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#endif
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/*
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* Make sure to add features to the correct mask
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*/
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@ -55,7 +61,7 @@
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#define DISABLED_MASK13 0
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#define DISABLED_MASK14 0
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#define DISABLED_MASK15 0
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#define DISABLED_MASK16 (DISABLE_PKU|DISABLE_OSPKE)
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#define DISABLED_MASK16 (DISABLE_PKU|DISABLE_OSPKE|DISABLE_LA57)
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#define DISABLED_MASK17 0
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#define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 18)
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@ -53,6 +53,12 @@
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# define NEED_MOVBE 0
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#endif
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#ifdef CONFIG_X86_5LEVEL
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# define NEED_LA57 (1<<(X86_FEATURE_LA57 & 31))
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#else
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# define NEED_LA57 0
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#endif
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#ifdef CONFIG_X86_64
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#ifdef CONFIG_PARAVIRT
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/* Paravirtualized systems may not have PSE or PGE available */
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@ -98,7 +104,7 @@
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#define REQUIRED_MASK13 0
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#define REQUIRED_MASK14 0
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#define REQUIRED_MASK15 0
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#define REQUIRED_MASK16 0
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#define REQUIRED_MASK16 (NEED_LA57)
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#define REQUIRED_MASK17 0
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#define REQUIRED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 18)
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