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drm/amdgpu: Simplify calculation in *get_sleep_divider_id_from_clock

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a / (1 << b) is equivalent to a >> b for unsigned values

Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Nils Wallménius
2016-05-05 09:07:47 +02:00
committed by Alex Deucher
parent 9887e425f9
commit 354ef928a0
5 changed files with 5 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/amd/amdgpu/ci_dpm.c
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@@ -2560,7 +2560,7 @@ static u8 ci_get_sleep_divider_id_from_clock(struct amdgpu_device *adev,
return 0; return 0;
for (i = CISLAND_MAX_DEEPSLEEP_DIVIDER_ID; ; i--) { for (i = CISLAND_MAX_DEEPSLEEP_DIVIDER_ID; ; i--) {
tmp = sclk / (1 << i); tmp = sclk >> i;
if (tmp >= min || i == 0) if (tmp >= min || i == 0)
break; break;
} }

7
drivers/gpu/drm/amd/amdgpu/kv_dpm.c
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@@ -135,11 +135,6 @@ static void sumo_take_smu_control(struct amdgpu_device *adev, bool enable)
#endif #endif
} }
static u32 sumo_get_sleep_divider_from_id(u32 id)
{
return 1 << id;
}
static void sumo_construct_sclk_voltage_mapping_table(struct amdgpu_device *adev, static void sumo_construct_sclk_voltage_mapping_table(struct amdgpu_device *adev,
struct sumo_sclk_voltage_mapping_table *sclk_voltage_mapping_table, struct sumo_sclk_voltage_mapping_table *sclk_voltage_mapping_table,
ATOM_AVAILABLE_SCLK_LIST *table) ATOM_AVAILABLE_SCLK_LIST *table)
@@ -2185,7 +2180,7 @@ static u8 kv_get_sleep_divider_id_from_clock(struct amdgpu_device *adev,
return 0; return 0;
for (i = KV_MAX_DEEPSLEEP_DIVIDER_ID; i > 0; i--) { for (i = KV_MAX_DEEPSLEEP_DIVIDER_ID; i > 0; i--) {
temp = sclk / sumo_get_sleep_divider_from_id(i); temp = sclk >> i;
if (temp >= min) if (temp >= min)
break; break;
} }

2
drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c
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@@ -1907,7 +1907,7 @@ static uint8_t fiji_get_sleep_divider_id_from_clock(struct pp_hwmgr *hwmgr,
PP_ASSERT_WITH_CODE((clock >= min), "Engine clock can't satisfy stutter requirement!", return 0); PP_ASSERT_WITH_CODE((clock >= min), "Engine clock can't satisfy stutter requirement!", return 0);
for (i = FIJI_MAX_DEEPSLEEP_DIVIDER_ID; ; i--) { for (i = FIJI_MAX_DEEPSLEEP_DIVIDER_ID; ; i--) {
temp = clock / (1UL << i); temp = clock >> i;
if (temp >= min || i == 0) if (temp >= min || i == 0)
break; break;

2
drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c
View File

@@ -1177,7 +1177,7 @@ static int polaris10_populate_single_graphic_level(struct pp_hwmgr *hwmgr,
*/ */
PP_ASSERT_WITH_CODE((clock >= POLARIS10_MINIMUM_ENGINE_CLOCK), "Engine clock can't satisfy stutter requirement!", return 0); PP_ASSERT_WITH_CODE((clock >= POLARIS10_MINIMUM_ENGINE_CLOCK), "Engine clock can't satisfy stutter requirement!", return 0);
for (i = POLARIS10_MAX_DEEPSLEEP_DIVIDER_ID; ; i--) { for (i = POLARIS10_MAX_DEEPSLEEP_DIVIDER_ID; ; i--) {
temp = clock / (1UL << i); temp = clock >> i;
if (temp >= POLARIS10_MINIMUM_ENGINE_CLOCK || i == 0) if (temp >= POLARIS10_MINIMUM_ENGINE_CLOCK || i == 0)
break; break;

2
drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
View File

@@ -2426,7 +2426,7 @@ static uint8_t tonga_get_sleep_divider_id_from_clock(struct pp_hwmgr *hwmgr,
"Engine clock can't satisfy stutter requirement!", return 0); "Engine clock can't satisfy stutter requirement!", return 0);
for (i = TONGA_MAX_DEEPSLEEP_DIVIDER_ID;; i--) { for (i = TONGA_MAX_DEEPSLEEP_DIVIDER_ID;; i--) {
temp = engine_clock / (1 << i); temp = engine_clock >> i;
if(temp >= min || i == 0) if(temp >= min || i == 0)
break; break;