ARM: dts: r8a7794: Fix W=1 dtc warnings
Warning (unit_address_vs_reg): Node /cache-controller@1 has a unit name, but no reg property Move the cache-controller node under the cpus node, and make its unit name and reg property match the MPIDR value. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -55,14 +55,15 @@
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power-domains = <&sysc R8A7794_PD_CA7_CPU1>;
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power-domains = <&sysc R8A7794_PD_CA7_CPU1>;
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next-level-cache = <&L2_CA7>;
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next-level-cache = <&L2_CA7>;
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};
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};
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};
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L2_CA7: cache-controller@1 {
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L2_CA7: cache-controller@0 {
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compatible = "cache";
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compatible = "cache";
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reg = <0>;
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power-domains = <&sysc R8A7794_PD_CA7_SCU>;
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power-domains = <&sysc R8A7794_PD_CA7_SCU>;
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cache-unified;
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cache-unified;
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cache-level = <2>;
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cache-level = <2>;
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};
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};
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};
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gic: interrupt-controller@f1001000 {
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gic: interrupt-controller@f1001000 {
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compatible = "arm,gic-400";
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compatible = "arm,gic-400";
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