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powerpc: Avoid link stack corruption in misc asm functions

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bl;mflr is used at several places to get code position.

Use bcl 20,31,+4 instead of bl in order to preserve link stack.

See commit c974809a26 ("powerpc/vdso: Avoid link stack corruption
in __get_datapage()") for details.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/c6eabb4fb6c156f75d56dcbcc6f243e5ac0fba42.1629791763.git.christophe.leroy@csgroup.eu
This commit is contained in:
Christophe Leroy 2021-08-24 07:56:35 +00:00 committed by Michael Ellerman
parent f5007dbf4d
commit 33e1402435
5 changed files with 10 additions and 10 deletions
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2
arch/powerpc/kernel/misc.S
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@ -29,7 +29,7 @@ _GLOBAL(reloc_offset)
li r3, 0 li r3, 0
_GLOBAL(add_reloc_offset) _GLOBAL(add_reloc_offset)
mflr r0 mflr r0
bl 1f bcl 20,31,$+4
1: mflr r5 1: mflr r5
PPC_LL r4,(2f-1b)(r5) PPC_LL r4,(2f-1b)(r5)
subf r5,r4,r5 subf r5,r4,r5

2
arch/powerpc/kernel/misc_32.S
View File

@ -67,7 +67,7 @@ _GLOBAL(reloc_got2)
srwi. r8,r8,2 srwi. r8,r8,2
beqlr beqlr
mtctr r8 mtctr r8
bl 1f bcl 20,31,$+4
1: mflr r0 1: mflr r0
lis r4,1b@ha lis r4,1b@ha
addi r4,r4,1b@l addi r4,r4,1b@l

2
arch/powerpc/kernel/misc_64.S
View File

@ -255,7 +255,7 @@ _GLOBAL(scom970_write)
* Physical (hardware) cpu id should be in r3. * Physical (hardware) cpu id should be in r3.
*/ */
_GLOBAL(kexec_wait) _GLOBAL(kexec_wait)
bl 1f bcl 20,31,$+4
1: mflr r5 1: mflr r5
addi r5,r5,kexec_flag-1b addi r5,r5,kexec_flag-1b

2
arch/powerpc/kernel/reloc_32.S
View File

@ -30,7 +30,7 @@ R_PPC_RELATIVE = 22
_GLOBAL(relocate) _GLOBAL(relocate)
mflr r0 /* Save our LR */ mflr r0 /* Save our LR */
bl 0f /* Find our current runtime address */ bcl 20,31,$+4 /* Find our current runtime address */
0: mflr r12 /* Make it accessible */ 0: mflr r12 /* Make it accessible */
mtlr r0 mtlr r0

12
arch/powerpc/kexec/relocate_32.S
View File

@ -93,7 +93,7 @@ wmmucr:
* Invalidate all the TLB entries except the current entry * Invalidate all the TLB entries except the current entry
* where we are running from * where we are running from
*/ */
bl 0f /* Find our address */ bcl 20,31,$+4 /* Find our address */
0: mflr r5 /* Make it accessible */ 0: mflr r5 /* Make it accessible */
tlbsx r23,0,r5 /* Find entry we are in */ tlbsx r23,0,r5 /* Find entry we are in */
li r4,0 /* Start at TLB entry 0 */ li r4,0 /* Start at TLB entry 0 */
@ -158,7 +158,7 @@ write_out:
/* Switch to other address space in MSR */ /* Switch to other address space in MSR */
insrwi r9, r7, 1, 26 /* Set MSR[IS] = r7 */ insrwi r9, r7, 1, 26 /* Set MSR[IS] = r7 */
bl 1f bcl 20,31,$+4
1: mflr r8 1: mflr r8
addi r8, r8, (2f-1b) /* Find the target offset */ addi r8, r8, (2f-1b) /* Find the target offset */
@ -202,7 +202,7 @@ next_tlb:
li r9,0 li r9,0
insrwi r9, r7, 1, 26 /* Set MSR[IS] = r7 */ insrwi r9, r7, 1, 26 /* Set MSR[IS] = r7 */
bl 1f bcl 20,31,$+4
1: mflr r8 1: mflr r8
and r8, r8, r11 /* Get our offset within page */ and r8, r8, r11 /* Get our offset within page */
addi r8, r8, (2f-1b) addi r8, r8, (2f-1b)
@ -240,7 +240,7 @@ setup_map_47x:
sync sync
/* Find the entry we are running from */ /* Find the entry we are running from */
bl 2f bcl 20,31,$+4
2: mflr r23 2: mflr r23
tlbsx r23, 0, r23 tlbsx r23, 0, r23
tlbre r24, r23, 0 /* TLB Word 0 */ tlbre r24, r23, 0 /* TLB Word 0 */
@ -296,7 +296,7 @@ clear_utlb_entry:
/* Update the msr to the new TS */ /* Update the msr to the new TS */
insrwi r5, r7, 1, 26 insrwi r5, r7, 1, 26
bl 1f bcl 20,31,$+4
1: mflr r6 1: mflr r6
addi r6, r6, (2f-1b) addi r6, r6, (2f-1b)
@ -355,7 +355,7 @@ write_utlb:
/* Defaults to 256M */ /* Defaults to 256M */
lis r10, 0x1000 lis r10, 0x1000
bl 1f bcl 20,31,$+4
1: mflr r4 1: mflr r4
addi r4, r4, (2f-1b) /* virtual address of 2f */ addi r4, r4, (2f-1b) /* virtual address of 2f */