clk: qcom: gcc-sdm660: Fix up gcc_mss_mnoc_bimc_axi_clk
Add missing halt_check, hwcg_reg and hwcg_bit properties.
These were likely omitted when porting the driver upstream.
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200726111215.22361-9-konradybcio@gmail.com
Fixes: f2a76a2955
("clk: qcom: Add Global Clock controller (GCC) driver for SDM660")
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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@ -1715,6 +1715,9 @@ static struct clk_branch gcc_mss_cfg_ahb_clk = {
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static struct clk_branch gcc_mss_mnoc_bimc_axi_clk = {
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.halt_reg = 0x8a004,
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.halt_check = BRANCH_HALT,
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.hwcg_reg = 0x8a004,
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.hwcg_bit = 1,
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.clkr = {
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.enable_reg = 0x8a004,
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.enable_mask = BIT(0),
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