forked from Minki/linux
KVM: x86 emulator: centralize decoding of one-byte register access insns
Instructions like 'inc reg' that have the register operand encoded in the opcode are currently specially decoded. Extend decode_register_operand() to handle that case, indicated by having DstReg or SrcReg without ModRM. Signed-off-by: Avi Kivity <avi@qumranet.com>
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Avi Kivity
parent
3c118e24af
commit
33615aa956
@ -99,17 +99,13 @@ static u16 opcode_table[256] = {
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ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
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0, 0, 0, 0,
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/* 0x40 - 0x47 */
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ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
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ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
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DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg,
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/* 0x48 - 0x4F */
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ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
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ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
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DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg,
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/* 0x50 - 0x57 */
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ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
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ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
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SrcReg, SrcReg, SrcReg, SrcReg, SrcReg, SrcReg, SrcReg, SrcReg,
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/* 0x58 - 0x5F */
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ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
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ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
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DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg,
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/* 0x60 - 0x67 */
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0, 0, 0, DstReg | SrcMem32 | ModRM | Mov /* movsxd (x86/64) */ ,
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0, 0, 0, 0,
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@ -525,13 +521,17 @@ static void decode_register_operand(struct operand *op,
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int highbyte_regs,
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int inhibit_bytereg)
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{
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unsigned reg = c->modrm_reg;
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if (!(c->d & ModRM))
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reg = (c->b & 7) | ((c->rex_prefix & 1) << 3);
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op->type = OP_REG;
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if ((c->d & ByteOp) && !inhibit_bytereg) {
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op->ptr = decode_register(c->modrm_reg, c->regs, highbyte_regs);
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op->ptr = decode_register(reg, c->regs, highbyte_regs);
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op->val = *(u8 *)op->ptr;
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op->bytes = 1;
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} else {
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op->ptr = decode_register(c->modrm_reg, c->regs, 0);
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op->ptr = decode_register(reg, c->regs, 0);
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op->bytes = c->op_bytes;
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switch (op->bytes) {
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case 2:
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@ -552,7 +552,7 @@ int
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x86_decode_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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{
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struct decode_cache *c = &ctxt->decode;
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u8 sib, rex_prefix = 0;
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u8 sib;
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int rc = 0;
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int mode = ctxt->mode;
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int index_reg = 0, base_reg = 0, scale, rip_relative = 0;
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@ -616,7 +616,7 @@ x86_decode_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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case 0x40 ... 0x4f: /* REX */
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if (mode != X86EMUL_MODE_PROT64)
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goto done_prefixes;
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rex_prefix = c->b;
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c->rex_prefix = c->b;
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continue;
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case 0xf0: /* LOCK */
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c->lock_prefix = 1;
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@ -631,18 +631,18 @@ x86_decode_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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/* Any legacy prefix after a REX prefix nullifies its effect. */
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rex_prefix = 0;
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c->rex_prefix = 0;
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}
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done_prefixes:
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/* REX prefix. */
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if (rex_prefix) {
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if (rex_prefix & 8)
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if (c->rex_prefix) {
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if (c->rex_prefix & 8)
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c->op_bytes = 8; /* REX.W */
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c->modrm_reg = (rex_prefix & 4) << 1; /* REX.R */
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index_reg = (rex_prefix & 2) << 2; /* REX.X */
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c->modrm_rm = base_reg = (rex_prefix & 1) << 3; /* REG.B */
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c->modrm_reg = (c->rex_prefix & 4) << 1; /* REX.R */
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index_reg = (c->rex_prefix & 2) << 2; /* REX.X */
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c->modrm_rm = base_reg = (c->rex_prefix & 1) << 3; /* REG.B */
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}
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/* Opcode byte(s). */
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@ -837,7 +837,7 @@ modrm_done:
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case SrcNone:
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break;
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case SrcReg:
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decode_register_operand(&c->src, c, rex_prefix == 0, 0);
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decode_register_operand(&c->src, c, c->rex_prefix == 0, 0);
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break;
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case SrcMem16:
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c->src.bytes = 2;
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@ -895,7 +895,7 @@ modrm_done:
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/* Special instructions do their own operand decoding. */
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return 0;
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case DstReg:
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decode_register_operand(&c->dst, c, rex_prefix == 0,
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decode_register_operand(&c->dst, c, c->rex_prefix == 0,
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c->twobyte && (c->b == 0xb6 || c->b == 0xb7));
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break;
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case DstMem:
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@ -1258,6 +1258,32 @@ x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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cmp: /* cmp */
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emulate_2op_SrcV("cmp", c->src, c->dst, ctxt->eflags);
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break;
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case 0x40 ... 0x47: /* inc r16/r32 */
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emulate_1op("inc", c->dst, ctxt->eflags);
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break;
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case 0x48 ... 0x4f: /* dec r16/r32 */
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emulate_1op("dec", c->dst, ctxt->eflags);
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break;
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case 0x50 ... 0x57: /* push reg */
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c->dst.type = OP_MEM;
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c->dst.bytes = c->op_bytes;
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c->dst.val = c->src.val;
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register_address_increment(c->regs[VCPU_REGS_RSP],
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-c->op_bytes);
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c->dst.ptr = (void *) register_address(
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ctxt->ss_base, c->regs[VCPU_REGS_RSP]);
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break;
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case 0x58 ... 0x5f: /* pop reg */
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pop_instruction:
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if ((rc = ops->read_std(register_address(ctxt->ss_base,
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c->regs[VCPU_REGS_RSP]), c->dst.ptr,
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c->op_bytes, ctxt->vcpu)) != 0)
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goto done;
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register_address_increment(c->regs[VCPU_REGS_RSP],
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c->op_bytes);
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c->dst.type = OP_NONE; /* Disable writeback. */
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break;
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case 0x63: /* movsxd */
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if (ctxt->mode != X86EMUL_MODE_PROT64)
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goto cannot_emulate;
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@ -1373,43 +1399,6 @@ special_insn:
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if (c->twobyte)
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goto twobyte_special_insn;
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switch (c->b) {
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case 0x40 ... 0x47: /* inc r16/r32 */
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c->dst.bytes = c->op_bytes;
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c->dst.ptr = (unsigned long *)&c->regs[c->b & 0x7];
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c->dst.val = *c->dst.ptr;
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emulate_1op("inc", c->dst, ctxt->eflags);
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break;
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case 0x48 ... 0x4f: /* dec r16/r32 */
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c->dst.bytes = c->op_bytes;
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c->dst.ptr = (unsigned long *)&c->regs[c->b & 0x7];
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c->dst.val = *c->dst.ptr;
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emulate_1op("dec", c->dst, ctxt->eflags);
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break;
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case 0x50 ... 0x57: /* push reg */
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if (c->op_bytes == 2)
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c->src.val = (u16) c->regs[c->b & 0x7];
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else
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c->src.val = (u32) c->regs[c->b & 0x7];
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c->dst.type = OP_MEM;
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c->dst.bytes = c->op_bytes;
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c->dst.val = c->src.val;
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register_address_increment(c->regs[VCPU_REGS_RSP],
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-c->op_bytes);
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c->dst.ptr = (void *) register_address(
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ctxt->ss_base, c->regs[VCPU_REGS_RSP]);
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break;
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case 0x58 ... 0x5f: /* pop reg */
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c->dst.ptr = (unsigned long *)&c->regs[c->b & 0x7];
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pop_instruction:
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if ((rc = ops->read_std(register_address(ctxt->ss_base,
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c->regs[VCPU_REGS_RSP]), c->dst.ptr,
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c->op_bytes, ctxt->vcpu)) != 0)
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goto done;
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register_address_increment(c->regs[VCPU_REGS_RSP],
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c->op_bytes);
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c->dst.type = OP_NONE; /* Disable writeback. */
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break;
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case 0x6a: /* push imm8 */
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c->src.val = 0L;
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c->src.val = insn_fetch(s8, 1, c->eip);
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@ -126,6 +126,7 @@ struct decode_cache {
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u8 rep_prefix;
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u8 op_bytes;
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u8 ad_bytes;
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u8 rex_prefix;
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struct operand src;
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struct operand dst;
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unsigned long *override_base;
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