forked from Minki/linux
ARM: shmobile: r8a7779: Reference clocks
Reference clocks using a "clocks" property in all nodes corresponding to devices that require a clock. Based on work by Laurent Pinchart for the r8a7790 and r8a7791 SoC. Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -158,6 +158,7 @@
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compatible = "renesas,i2c-r8a7779";
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reg = <0xffc70000 0x1000>;
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interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp0_clks R8A7779_CLK_I2C0>;
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status = "disabled";
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};
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@ -167,6 +168,7 @@
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compatible = "renesas,i2c-r8a7779";
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reg = <0xffc71000 0x1000>;
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interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp0_clks R8A7779_CLK_I2C1>;
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status = "disabled";
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};
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@ -176,6 +178,7 @@
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compatible = "renesas,i2c-r8a7779";
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reg = <0xffc72000 0x1000>;
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interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp0_clks R8A7779_CLK_I2C2>;
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status = "disabled";
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};
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@ -185,6 +188,7 @@
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compatible = "renesas,i2c-r8a7779";
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reg = <0xffc73000 0x1000>;
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interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp0_clks R8A7779_CLK_I2C3>;
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status = "disabled";
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};
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@ -202,12 +206,14 @@
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compatible = "renesas,rcar-sata";
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reg = <0xfc600000 0x2000>;
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interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp1_clks R8A7779_CLK_SATA>;
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};
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sdhi0: sd@ffe4c000 {
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compatible = "renesas,sdhi-r8a7779";
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reg = <0xffe4c000 0x100>;
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interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp3_clks R8A7779_CLK_SDHI0>;
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cap-sd-highspeed;
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cap-sdio-irq;
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status = "disabled";
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@ -217,6 +223,7 @@
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compatible = "renesas,sdhi-r8a7779";
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reg = <0xffe4d000 0x100>;
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interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp3_clks R8A7779_CLK_SDHI1>;
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cap-sd-highspeed;
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cap-sdio-irq;
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status = "disabled";
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@ -226,6 +233,7 @@
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compatible = "renesas,sdhi-r8a7779";
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reg = <0xffe4e000 0x100>;
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interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp3_clks R8A7779_CLK_SDHI2>;
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cap-sd-highspeed;
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cap-sdio-irq;
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status = "disabled";
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@ -235,6 +243,7 @@
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compatible = "renesas,sdhi-r8a7779";
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reg = <0xffe4f000 0x100>;
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interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp3_clks R8A7779_CLK_SDHI3>;
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cap-sd-highspeed;
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cap-sdio-irq;
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status = "disabled";
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@ -246,6 +255,7 @@
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interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&mstp0_clks R8A7779_CLK_HSPI>;
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status = "disabled";
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};
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@ -255,6 +265,7 @@
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interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&mstp0_clks R8A7779_CLK_HSPI>;
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status = "disabled";
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};
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@ -264,6 +275,7 @@
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interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&mstp0_clks R8A7779_CLK_HSPI>;
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status = "disabled";
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};
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