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mtd: fsl_elbc_nand: remove unnecessary badblock_pattern

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Since the introduction of nand_create_default_bbt_descr() (now known as
nand_create_badblock_pattern()) in

  commit 58373ff0af

nand_chip.badblock_pattern will be dynamically calculated to the same
1-byte-length pattern that is required by fsl_elbc_nand. This custom
badblock_pattern is no longer needed, then, and its removal may help
facilitate further nand_bbt.c/nand_base.c cleanup in the future (one
down, many to go?)

Anyway, with nand_bbt.c fixed, this effectively reverts:

  commit 452db27243
  [MTD] [NAND] fsl_elbc_nand: fix OOB workability for large page NAND chips

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
This commit is contained in:
Brian Norris 2012-09-26 16:15:27 -07:00 committed by Artem Bityutskiy
parent ecbcbc7b75
commit 30fad64325
1 changed files with 0 additions and 15 deletions
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15
drivers/mtd/nand/fsl_elbc_nand.c
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@ -108,20 +108,6 @@ static struct nand_ecclayout fsl_elbc_oob_lp_eccm1 = {
.oobfree = { {1, 7}, {11, 13}, {27, 13}, {43, 13}, {59, 5} }, .oobfree = { {1, 7}, {11, 13}, {27, 13}, {43, 13}, {59, 5} },
}; };
/*
* fsl_elbc_oob_lp_eccm* specify that LP NAND's OOB free area starts at offset
* 1, so we have to adjust bad block pattern. This pattern should be used for
* x8 chips only. So far hardware does not support x16 chips anyway.
*/
static u8 scan_ff_pattern[] = { 0xff, };
static struct nand_bbt_descr largepage_memorybased = {
.options = 0,
.offs = 0,
.len = 1,
.pattern = scan_ff_pattern,
};
/* /*
* ELBC may use HW ECC, so that OOB offsets, that NAND core uses for bbt, * ELBC may use HW ECC, so that OOB offsets, that NAND core uses for bbt,
* interfere with ECC positions, that's why we implement our own descriptors. * interfere with ECC positions, that's why we implement our own descriptors.
@ -699,7 +685,6 @@ static int fsl_elbc_chip_init_tail(struct mtd_info *mtd)
chip->ecc.layout = (priv->fmr & FMR_ECCM) ? chip->ecc.layout = (priv->fmr & FMR_ECCM) ?
&fsl_elbc_oob_lp_eccm1 : &fsl_elbc_oob_lp_eccm1 :
&fsl_elbc_oob_lp_eccm0; &fsl_elbc_oob_lp_eccm0;
chip->badblock_pattern = &largepage_memorybased;
} }
} else { } else {
dev_err(priv->dev, dev_err(priv->dev,