arm64: elf: use cpuid_feature_extract_field for hwcap detection
cpuid_feature_extract_field takes care of the fiddly ID register field sign-extension, so use that instead of rolling our own version. Signed-off-by: Will Deacon <will.deacon@arm.com>
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2e94da1379
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@ -223,7 +223,8 @@ void __init up_late_init(void)
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static void __init setup_processor(void)
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static void __init setup_processor(void)
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{
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{
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u64 features, block;
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u64 features;
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s64 block;
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u32 cwg;
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u32 cwg;
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int cls;
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int cls;
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@ -253,8 +254,8 @@ static void __init setup_processor(void)
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* for non-negative values. Negative values are reserved.
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* for non-negative values. Negative values are reserved.
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*/
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*/
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features = read_cpuid(ID_AA64ISAR0_EL1);
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features = read_cpuid(ID_AA64ISAR0_EL1);
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block = (features >> 4) & 0xf;
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block = cpuid_feature_extract_field(features, 4);
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if (!(block & 0x8)) {
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if (block > 0) {
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switch (block) {
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switch (block) {
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default:
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default:
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case 2:
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case 2:
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@ -266,20 +267,17 @@ static void __init setup_processor(void)
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}
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}
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}
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}
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block = (features >> 8) & 0xf;
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if (cpuid_feature_extract_field(features, 8) > 0)
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if (block && !(block & 0x8))
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elf_hwcap |= HWCAP_SHA1;
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elf_hwcap |= HWCAP_SHA1;
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block = (features >> 12) & 0xf;
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if (cpuid_feature_extract_field(features, 12) > 0)
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if (block && !(block & 0x8))
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elf_hwcap |= HWCAP_SHA2;
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elf_hwcap |= HWCAP_SHA2;
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block = (features >> 16) & 0xf;
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if (cpuid_feature_extract_field(features, 16) > 0)
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if (block && !(block & 0x8))
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elf_hwcap |= HWCAP_CRC32;
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elf_hwcap |= HWCAP_CRC32;
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block = (features >> 20) & 0xf;
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block = cpuid_feature_extract_field(features, 20);
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if (!(block & 0x8)) {
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if (block > 0) {
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switch (block) {
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switch (block) {
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default:
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default:
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case 2:
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case 2:
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@ -294,11 +292,11 @@ static void __init setup_processor(void)
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#ifdef CONFIG_COMPAT
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#ifdef CONFIG_COMPAT
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/*
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/*
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* ID_ISAR5_EL1 carries similar information as above, but pertaining to
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* ID_ISAR5_EL1 carries similar information as above, but pertaining to
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* the Aarch32 32-bit execution state.
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* the AArch32 32-bit execution state.
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*/
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*/
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features = read_cpuid(ID_ISAR5_EL1);
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features = read_cpuid(ID_ISAR5_EL1);
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block = (features >> 4) & 0xf;
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block = cpuid_feature_extract_field(features, 4);
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if (!(block & 0x8)) {
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if (block > 0) {
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switch (block) {
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switch (block) {
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default:
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default:
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case 2:
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case 2:
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@ -310,16 +308,13 @@ static void __init setup_processor(void)
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}
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}
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}
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}
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block = (features >> 8) & 0xf;
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if (cpuid_feature_extract_field(features, 8) > 0)
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if (block && !(block & 0x8))
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compat_elf_hwcap2 |= COMPAT_HWCAP2_SHA1;
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compat_elf_hwcap2 |= COMPAT_HWCAP2_SHA1;
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block = (features >> 12) & 0xf;
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if (cpuid_feature_extract_field(features, 12) > 0)
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if (block && !(block & 0x8))
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compat_elf_hwcap2 |= COMPAT_HWCAP2_SHA2;
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compat_elf_hwcap2 |= COMPAT_HWCAP2_SHA2;
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block = (features >> 16) & 0xf;
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if (cpuid_feature_extract_field(features, 16) > 0)
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if (block && !(block & 0x8))
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compat_elf_hwcap2 |= COMPAT_HWCAP2_CRC32;
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compat_elf_hwcap2 |= COMPAT_HWCAP2_CRC32;
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#endif
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#endif
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}
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}
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