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tg3: Fix 'scheduling while atomic' errors

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This patch fixes the 'scheduling while atomic' errors introduced by
commit 12dac0756d ("tg3: adapt tg3 to
use reworked PCI PM code").

The first hunk of the patch removes an unnecessary
tg3_set_power_state() call.  The chip will already be in the D0 state
either due to a chip reset or through a previous call to
tg3_set_power_state().

The second hunk of the patch moves the tg3_set_power_state() call
outside the critical section guarded by tg3_full_lock() and
tg3_full_unlock() functions.  The power state of the device is and
should be outside the lock's domain and all other
tg3_set_power_state() calls support this.

Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Matt Carlson 2008-08-04 23:17:34 -07:00 committed by David S. Miller
parent cc6533e98a
commit 2f751b67a8
1 changed files with 4 additions and 16 deletions
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20
drivers/net/tg3.c
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@ -7687,21 +7687,11 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
*/
static int tg3_init_hw(struct tg3 *tp, int reset_phy)
{
int err;
/* Force the chip into D0. */
err = tg3_set_power_state(tp, PCI_D0);
if (err)
goto out;
tg3_switch_clocks(tp);
tw32(TG3PCI_MEM_WIN_BASE_ADDR, 0);
err = tg3_reset_hw(tp, reset_phy);
out:
return err;
return tg3_reset_hw(tp, reset_phy);
}
#define TG3_STAT_ADD32(PSTAT, REG) \
@ -8016,13 +8006,11 @@ static int tg3_open(struct net_device *dev)
netif_carrier_off(tp->dev);
tg3_full_lock(tp, 0);
err = tg3_set_power_state(tp, PCI_D0);
if (err) {
tg3_full_unlock(tp);
if (err)
return err;
}
tg3_full_lock(tp, 0);
tg3_disable_ints(tp);
tp->tg3_flags &= ~TG3_FLAG_INIT_COMPLETE;