ixgbe: Add register wait for slow links
Use a new register to wait for previous register writes to complete before issuing a register read. This is needed when slower links are in use. Signed-off-by: Mark Rustad <mark.d.rustad@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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@ -371,6 +371,27 @@ u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
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if (ixgbe_removed(reg_addr))
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return IXGBE_FAILED_READ_REG;
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if (unlikely(hw->phy.nw_mng_if_sel &
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IXGBE_NW_MNG_IF_SEL_ENABLE_10_100M)) {
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struct ixgbe_adapter *adapter;
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int i;
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for (i = 0; i < 200; ++i) {
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value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
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if (likely(!value))
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goto writes_completed;
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if (value == IXGBE_FAILED_READ_REG) {
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ixgbe_remove_adapter(hw);
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return IXGBE_FAILED_READ_REG;
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}
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udelay(5);
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}
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adapter = hw->back;
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e_warn(hw, "register writes incomplete %08x\n", value);
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}
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writes_completed:
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value = readl(reg_addr + reg);
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if (unlikely(value == IXGBE_FAILED_READ_REG))
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ixgbe_check_remove(hw, reg);
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@ -1131,6 +1131,7 @@ struct ixgbe_thermal_sensor_data {
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#define IXGBE_XPCSS 0x04290
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#define IXGBE_MFLCN 0x04294
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#define IXGBE_SERDESC 0x04298
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#define IXGBE_MAC_SGMII_BUSY 0x04298
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#define IXGBE_MACS 0x0429C
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#define IXGBE_AUTOC 0x042A0
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#define IXGBE_LINKS 0x042A4
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