forked from Minki/linux
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6: (39 commits) gigaset: fix build failure bridge: Make first arg to deliver_clone const. bridge br_multicast: Don't refer to BR_INPUT_SKB_CB(skb)->mrouters_only without IGMP snooping. route: Fix caught BUG_ON during rt_secret_rebuild_oneshot() bridge br_multicast: Fix skb leakage in error path. bridge br_multicast: Fix handling of Max Response Code in IGMPv3 message. NET: netpoll, fix potential NULL ptr dereference tipc: fix lockdep warning on address assignment l2tp: Fix UDP socket reference count bugs in the pppol2tp driver smsc95xx: wait for PHY to complete reset during init l2tp: Fix oops in pppol2tp_xmit smsc75xx: SMSC LAN75xx USB gigabit ethernet adapter driver ne: Do not use slashes in irq name string NET: ksz884x, fix lock imbalance gigaset: correct range checking off by one error bridge: Fix br_forward crash in promiscuous mode bridge: Move NULL mdb check into br_mdb_ip_get ISDN: Add PCI ID for HFC-2S/4S Beronet Card PCIe net-2.6 [Bug-Fix][dccp]: fix oops caused after failed initialisation myri: remove dead code ...
This commit is contained in:
commit
2e0c17d100
@ -6,3 +6,5 @@ hostprogs-y := ifenslave
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# Tell kbuild to always build the programs
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always := $(hostprogs-y)
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obj-m := timestamping/
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|
@ -1,6 +1,13 @@
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CPPFLAGS = -I../../../include
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# kbuild trick to avoid linker error. Can be omitted if a module is built.
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obj- := dummy.o
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timestamping: timestamping.c
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# List of programs to build
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hostprogs-y := timestamping
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# Tell kbuild to always build the programs
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always := $(hostprogs-y)
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HOSTCFLAGS_timestamping.o += -I$(objtree)/usr/include
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clean:
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rm -f timestamping
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|
@ -41,9 +41,9 @@
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#include <arpa/inet.h>
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#include <net/if.h>
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#include "asm/types.h"
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#include "linux/net_tstamp.h"
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#include "linux/errqueue.h"
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#include <asm/types.h>
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#include <linux/net_tstamp.h>
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#include <linux/errqueue.h>
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#ifndef SO_TIMESTAMPING
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# define SO_TIMESTAMPING 37
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@ -164,7 +164,7 @@ static void printpacket(struct msghdr *msg, int res,
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gettimeofday(&now, 0);
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printf("%ld.%06ld: received %s data, %d bytes from %s, %d bytes control messages\n",
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printf("%ld.%06ld: received %s data, %d bytes from %s, %zu bytes control messages\n",
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(long)now.tv_sec, (long)now.tv_usec,
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(recvmsg_flags & MSG_ERRQUEUE) ? "error" : "regular",
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res,
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@ -173,7 +173,7 @@ static void printpacket(struct msghdr *msg, int res,
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for (cmsg = CMSG_FIRSTHDR(msg);
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cmsg;
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cmsg = CMSG_NXTHDR(msg, cmsg)) {
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printf(" cmsg len %d: ", cmsg->cmsg_len);
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printf(" cmsg len %zu: ", cmsg->cmsg_len);
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switch (cmsg->cmsg_level) {
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case SOL_SOCKET:
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printf("SOL_SOCKET ");
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|
@ -306,11 +306,10 @@ static void vci_bitfield_iterate(struct lanai_dev *lanai,
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const unsigned long *lp,
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void (*func)(struct lanai_dev *,vci_t vci))
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{
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vci_t vci = find_first_bit(lp, NUM_VCI);
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while (vci < NUM_VCI) {
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vci_t vci;
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for_each_set_bit(vci, lp, NUM_VCI)
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func(lanai, vci);
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vci = find_next_bit(lp, NUM_VCI, vci + 1);
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}
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}
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/* -------------------- BUFFER UTILITIES: */
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|
@ -1301,7 +1301,7 @@ static void do_connect_req(struct gigaset_capi_ctr *iif,
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}
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/* check parameter: CIP Value */
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if (cmsg->CIPValue > ARRAY_SIZE(cip2bchlc) ||
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if (cmsg->CIPValue >= ARRAY_SIZE(cip2bchlc) ||
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(cmsg->CIPValue > 0 && cip2bchlc[cmsg->CIPValue].bc == NULL)) {
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dev_notice(cs->dev, "%s: unknown CIP value %d\n",
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"CONNECT_REQ", cmsg->CIPValue);
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@ -2191,36 +2191,24 @@ static const struct file_operations gigaset_proc_fops = {
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.release = single_release,
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};
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static struct capi_driver capi_driver_gigaset = {
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.name = "gigaset",
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.revision = "1.0",
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};
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/**
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* gigaset_isdn_register() - register to LL
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* gigaset_isdn_regdev() - register device to LL
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* @cs: device descriptor structure.
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* @isdnid: device name.
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*
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* Called by main module to register the device with the LL.
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*
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* Return value: 1 for success, 0 for failure
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*/
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||||
int gigaset_isdn_register(struct cardstate *cs, const char *isdnid)
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int gigaset_isdn_regdev(struct cardstate *cs, const char *isdnid)
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{
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struct gigaset_capi_ctr *iif;
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int rc;
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pr_info("Kernel CAPI interface\n");
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iif = kmalloc(sizeof(*iif), GFP_KERNEL);
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if (!iif) {
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pr_err("%s: out of memory\n", __func__);
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return 0;
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}
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/* register driver with CAPI (ToDo: what for?) */
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register_capi_driver(&capi_driver_gigaset);
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/* prepare controller structure */
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iif->ctr.owner = THIS_MODULE;
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iif->ctr.driverdata = cs;
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@ -2241,7 +2229,6 @@ int gigaset_isdn_register(struct cardstate *cs, const char *isdnid)
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rc = attach_capi_ctr(&iif->ctr);
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if (rc) {
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pr_err("attach_capi_ctr failed (%d)\n", rc);
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unregister_capi_driver(&capi_driver_gigaset);
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kfree(iif);
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return 0;
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}
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@ -2252,17 +2239,36 @@ int gigaset_isdn_register(struct cardstate *cs, const char *isdnid)
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}
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/**
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* gigaset_isdn_unregister() - unregister from LL
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* gigaset_isdn_unregdev() - unregister device from LL
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* @cs: device descriptor structure.
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*
|
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* Called by main module to unregister the device from the LL.
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*/
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void gigaset_isdn_unregister(struct cardstate *cs)
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void gigaset_isdn_unregdev(struct cardstate *cs)
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{
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struct gigaset_capi_ctr *iif = cs->iif;
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detach_capi_ctr(&iif->ctr);
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kfree(iif);
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cs->iif = NULL;
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}
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static struct capi_driver capi_driver_gigaset = {
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.name = "gigaset",
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.revision = "1.0",
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};
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/**
|
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* gigaset_isdn_regdrv() - register driver to LL
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*/
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void gigaset_isdn_regdrv(void)
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{
|
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pr_info("Kernel CAPI interface\n");
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register_capi_driver(&capi_driver_gigaset);
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}
|
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|
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/**
|
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* gigaset_isdn_unregdrv() - unregister driver from LL
|
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*/
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void gigaset_isdn_unregdrv(void)
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{
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unregister_capi_driver(&capi_driver_gigaset);
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}
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|
@ -507,7 +507,7 @@ void gigaset_freecs(struct cardstate *cs)
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case 2: /* error in initcshw */
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/* Deregister from LL */
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make_invalid(cs, VALID_ID);
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gigaset_isdn_unregister(cs);
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gigaset_isdn_unregdev(cs);
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/* fall through */
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case 1: /* error when registering to LL */
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@ -769,7 +769,7 @@ struct cardstate *gigaset_initcs(struct gigaset_driver *drv, int channels,
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cs->cmdbytes = 0;
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gig_dbg(DEBUG_INIT, "setting up iif");
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if (!gigaset_isdn_register(cs, modulename)) {
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if (!gigaset_isdn_regdev(cs, modulename)) {
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pr_err("error registering ISDN device\n");
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goto error;
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}
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@ -1205,11 +1205,13 @@ static int __init gigaset_init_module(void)
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gigaset_debuglevel = DEBUG_DEFAULT;
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pr_info(DRIVER_DESC DRIVER_DESC_DEBUG "\n");
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gigaset_isdn_regdrv();
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return 0;
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}
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static void __exit gigaset_exit_module(void)
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{
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gigaset_isdn_unregdrv();
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}
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module_init(gigaset_init_module);
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@ -57,12 +57,20 @@ void gigaset_isdn_stop(struct cardstate *cs)
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{
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}
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int gigaset_isdn_register(struct cardstate *cs, const char *isdnid)
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int gigaset_isdn_regdev(struct cardstate *cs, const char *isdnid)
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{
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pr_info("no ISDN subsystem interface\n");
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return 1;
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}
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void gigaset_isdn_unregister(struct cardstate *cs)
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void gigaset_isdn_unregdev(struct cardstate *cs)
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{
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}
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void gigaset_isdn_regdrv(void)
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{
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pr_info("no ISDN subsystem interface\n");
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}
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void gigaset_isdn_unregdrv(void)
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{
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}
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@ -1258,14 +1258,10 @@ static void do_action(int action, struct cardstate *cs,
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* note that bcs may be NULL if no B channel is free
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*/
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at_state2->ConState = 700;
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kfree(at_state2->str_var[STR_NMBR]);
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at_state2->str_var[STR_NMBR] = NULL;
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kfree(at_state2->str_var[STR_ZCPN]);
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at_state2->str_var[STR_ZCPN] = NULL;
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kfree(at_state2->str_var[STR_ZBC]);
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at_state2->str_var[STR_ZBC] = NULL;
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kfree(at_state2->str_var[STR_ZHLC]);
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at_state2->str_var[STR_ZHLC] = NULL;
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for (i = 0; i < STR_NUM; ++i) {
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kfree(at_state2->str_var[i]);
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at_state2->str_var[i] = NULL;
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}
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at_state2->int_var[VAR_ZCTP] = -1;
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spin_lock_irqsave(&cs->lock, flags);
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|
@ -675,8 +675,10 @@ int gigaset_isowbuf_getbytes(struct isowbuf_t *iwb, int size);
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*/
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/* Called from common.c for setting up/shutting down with the ISDN subsystem */
|
||||
int gigaset_isdn_register(struct cardstate *cs, const char *isdnid);
|
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void gigaset_isdn_unregister(struct cardstate *cs);
|
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void gigaset_isdn_regdrv(void);
|
||||
void gigaset_isdn_unregdrv(void);
|
||||
int gigaset_isdn_regdev(struct cardstate *cs, const char *isdnid);
|
||||
void gigaset_isdn_unregdev(struct cardstate *cs);
|
||||
|
||||
/* Called from hardware module to indicate completion of an skb */
|
||||
void gigaset_skb_sent(struct bc_state *bcs, struct sk_buff *skb);
|
||||
|
@ -592,15 +592,13 @@ void gigaset_isdn_stop(struct cardstate *cs)
|
||||
}
|
||||
|
||||
/**
|
||||
* gigaset_isdn_register() - register to LL
|
||||
* gigaset_isdn_regdev() - register to LL
|
||||
* @cs: device descriptor structure.
|
||||
* @isdnid: device name.
|
||||
*
|
||||
* Called by main module to register the device with the LL.
|
||||
*
|
||||
* Return value: 1 for success, 0 for failure
|
||||
*/
|
||||
int gigaset_isdn_register(struct cardstate *cs, const char *isdnid)
|
||||
int gigaset_isdn_regdev(struct cardstate *cs, const char *isdnid)
|
||||
{
|
||||
isdn_if *iif;
|
||||
|
||||
@ -650,15 +648,29 @@ int gigaset_isdn_register(struct cardstate *cs, const char *isdnid)
|
||||
}
|
||||
|
||||
/**
|
||||
* gigaset_isdn_unregister() - unregister from LL
|
||||
* gigaset_isdn_unregdev() - unregister device from LL
|
||||
* @cs: device descriptor structure.
|
||||
*
|
||||
* Called by main module to unregister the device from the LL.
|
||||
*/
|
||||
void gigaset_isdn_unregister(struct cardstate *cs)
|
||||
void gigaset_isdn_unregdev(struct cardstate *cs)
|
||||
{
|
||||
gig_dbg(DEBUG_CMD, "sending UNLOAD");
|
||||
gigaset_i4l_cmd(cs, ISDN_STAT_UNLOAD);
|
||||
kfree(cs->iif);
|
||||
cs->iif = NULL;
|
||||
}
|
||||
|
||||
/**
|
||||
* gigaset_isdn_regdrv() - register driver to LL
|
||||
*/
|
||||
void gigaset_isdn_regdrv(void)
|
||||
{
|
||||
/* nothing to do */
|
||||
}
|
||||
|
||||
/**
|
||||
* gigaset_isdn_unregdrv() - unregister driver from LL
|
||||
*/
|
||||
void gigaset_isdn_unregdrv(void)
|
||||
{
|
||||
/* nothing to do */
|
||||
}
|
||||
|
@ -628,7 +628,6 @@ void gigaset_if_receive(struct cardstate *cs,
|
||||
if (tty == NULL)
|
||||
gig_dbg(DEBUG_IF, "receive on closed device");
|
||||
else {
|
||||
tty_buffer_request_room(tty, len);
|
||||
tty_insert_flip_string(tty, buffer, len);
|
||||
tty_flip_buffer_push(tty);
|
||||
}
|
||||
|
@ -2754,7 +2754,7 @@ static byte connect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
|
||||
for (i = 0; i < w; i++)
|
||||
((T30_INFO *)(plci->fax_connect_info_buffer))->station_id[i] = fax_parms[4].info[1+i];
|
||||
((T30_INFO *)(plci->fax_connect_info_buffer))->head_line_len = 0;
|
||||
len = offsetof(T30_INFO, station_id) + 20;
|
||||
len = offsetof(T30_INFO, station_id) + T30_MAX_STATION_ID_LENGTH;
|
||||
w = fax_parms[5].length;
|
||||
if (w > 20)
|
||||
w = 20;
|
||||
@ -2892,7 +2892,7 @@ static byte connect_b3_res(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
|
||||
&& (plci->nsf_control_bits & T30_NSF_CONTROL_BIT_ENABLE_NSF)
|
||||
&& (plci->nsf_control_bits & T30_NSF_CONTROL_BIT_NEGOTIATE_RESP))
|
||||
{
|
||||
len = offsetof(T30_INFO, station_id) + 20;
|
||||
len = offsetof(T30_INFO, station_id) + T30_MAX_STATION_ID_LENGTH;
|
||||
if (plci->fax_connect_info_length < len)
|
||||
{
|
||||
((T30_INFO *)(plci->fax_connect_info_buffer))->station_id_len = 0;
|
||||
@ -3802,7 +3802,7 @@ static byte manufacturer_res(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
|
||||
break;
|
||||
}
|
||||
ncpi = &m_parms[1];
|
||||
len = offsetof(T30_INFO, station_id) + 20;
|
||||
len = offsetof(T30_INFO, station_id) + T30_MAX_STATION_ID_LENGTH;
|
||||
if (plci->fax_connect_info_length < len)
|
||||
{
|
||||
((T30_INFO *)(plci->fax_connect_info_buffer))->station_id_len = 0;
|
||||
@ -6830,7 +6830,7 @@ static void nl_ind(PLCI *plci)
|
||||
if(((T30_INFO *)plci->NL.RBuffer->P)->station_id_len)
|
||||
{
|
||||
plci->ncpi_buffer[len] = 20;
|
||||
for (i = 0; i < 20; i++)
|
||||
for (i = 0; i < T30_MAX_STATION_ID_LENGTH; i++)
|
||||
plci->ncpi_buffer[++len] = ((T30_INFO *)plci->NL.RBuffer->P)->station_id[i];
|
||||
}
|
||||
if (((plci->NL.Ind & 0x0f) == N_DISC) || ((plci->NL.Ind & 0x0f) == N_DISC_ACK))
|
||||
@ -6844,7 +6844,7 @@ static void nl_ind(PLCI *plci)
|
||||
if ((plci->requested_options_conn | plci->requested_options | a->requested_options_table[plci->appl->Id-1])
|
||||
& ((1L << PRIVATE_FAX_SUB_SEP_PWD) | (1L << PRIVATE_FAX_NONSTANDARD)))
|
||||
{
|
||||
i = offsetof(T30_INFO, station_id) + 20 + ((T30_INFO *)plci->NL.RBuffer->P)->head_line_len;
|
||||
i = offsetof(T30_INFO, station_id) + T30_MAX_STATION_ID_LENGTH + ((T30_INFO *)plci->NL.RBuffer->P)->head_line_len;
|
||||
while (i < plci->NL.RBuffer->length)
|
||||
plci->ncpi_buffer[++len] = plci->NL.RBuffer->P[i++];
|
||||
}
|
||||
@ -8400,7 +8400,7 @@ static word add_b23(PLCI *plci, API_PARSE *bp)
|
||||
}
|
||||
}
|
||||
/* copy station id to NLC */
|
||||
for(i=0; i<20; i++)
|
||||
for(i=0; i < T30_MAX_STATION_ID_LENGTH; i++)
|
||||
{
|
||||
if(i<b3_config_parms[2].length)
|
||||
{
|
||||
@ -8411,29 +8411,29 @@ static word add_b23(PLCI *plci, API_PARSE *bp)
|
||||
((T30_INFO *)&nlc[1])->station_id[i] = ' ';
|
||||
}
|
||||
}
|
||||
((T30_INFO *)&nlc[1])->station_id_len = 20;
|
||||
((T30_INFO *)&nlc[1])->station_id_len = T30_MAX_STATION_ID_LENGTH;
|
||||
/* copy head line to NLC */
|
||||
if(b3_config_parms[3].length)
|
||||
{
|
||||
|
||||
pos = (byte)(fax_head_line_time (&(((T30_INFO *)&nlc[1])->station_id[20])));
|
||||
pos = (byte)(fax_head_line_time (&(((T30_INFO *)&nlc[1])->station_id[T30_MAX_STATION_ID_LENGTH])));
|
||||
if (pos != 0)
|
||||
{
|
||||
if (CAPI_MAX_DATE_TIME_LENGTH + 2 + b3_config_parms[3].length > CAPI_MAX_HEAD_LINE_SPACE)
|
||||
pos = 0;
|
||||
else
|
||||
{
|
||||
((T30_INFO *)&nlc[1])->station_id[20 + pos++] = ' ';
|
||||
((T30_INFO *)&nlc[1])->station_id[20 + pos++] = ' ';
|
||||
nlc[1 + offsetof(T30_INFO, station_id) + T30_MAX_STATION_ID_LENGTH + pos++] = ' ';
|
||||
nlc[1 + offsetof(T30_INFO, station_id) + T30_MAX_STATION_ID_LENGTH + pos++] = ' ';
|
||||
len = (byte)b3_config_parms[2].length;
|
||||
if (len > 20)
|
||||
len = 20;
|
||||
if (CAPI_MAX_DATE_TIME_LENGTH + 2 + len + 2 + b3_config_parms[3].length <= CAPI_MAX_HEAD_LINE_SPACE)
|
||||
{
|
||||
for (i = 0; i < len; i++)
|
||||
((T30_INFO *)&nlc[1])->station_id[20 + pos++] = ((byte *)b3_config_parms[2].info)[1+i];
|
||||
((T30_INFO *)&nlc[1])->station_id[20 + pos++] = ' ';
|
||||
((T30_INFO *)&nlc[1])->station_id[20 + pos++] = ' ';
|
||||
nlc[1 + offsetof(T30_INFO, station_id) + T30_MAX_STATION_ID_LENGTH + pos++] = ((byte *)b3_config_parms[2].info)[1+i];
|
||||
nlc[1 + offsetof(T30_INFO, station_id) + T30_MAX_STATION_ID_LENGTH + pos++] = ' ';
|
||||
nlc[1 + offsetof(T30_INFO, station_id) + T30_MAX_STATION_ID_LENGTH + pos++] = ' ';
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -8444,9 +8444,8 @@ static word add_b23(PLCI *plci, API_PARSE *bp)
|
||||
((T30_INFO *)&nlc[1])->head_line_len = (byte)(pos + len);
|
||||
nlc[0] += (byte)(pos + len);
|
||||
for (i = 0; i < len; i++)
|
||||
((T30_INFO *)&nlc[1])->station_id[20 + pos++] = ((byte *)b3_config_parms[3].info)[1+i];
|
||||
}
|
||||
else
|
||||
nlc[1 + offsetof(T30_INFO, station_id) + T30_MAX_STATION_ID_LENGTH + pos++] = ((byte *)b3_config_parms[3].info)[1+i];
|
||||
} else
|
||||
((T30_INFO *)&nlc[1])->head_line_len = 0;
|
||||
|
||||
plci->nsf_control_bits = 0;
|
||||
@ -8473,7 +8472,7 @@ static word add_b23(PLCI *plci, API_PARSE *bp)
|
||||
fax_control_bits |= T30_CONTROL_BIT_ACCEPT_SEL_POLLING;
|
||||
}
|
||||
len = nlc[0];
|
||||
pos = offsetof(T30_INFO, station_id) + 20;
|
||||
pos = offsetof(T30_INFO, station_id) + T30_MAX_STATION_ID_LENGTH;
|
||||
if (pos < plci->fax_connect_info_length)
|
||||
{
|
||||
for (i = 1 + plci->fax_connect_info_buffer[pos]; i != 0; i--)
|
||||
@ -8525,7 +8524,7 @@ static word add_b23(PLCI *plci, API_PARSE *bp)
|
||||
}
|
||||
|
||||
PUT_WORD(&(((T30_INFO *)&nlc[1])->control_bits_low), fax_control_bits);
|
||||
len = offsetof(T30_INFO, station_id) + 20;
|
||||
len = offsetof(T30_INFO, station_id) + T30_MAX_STATION_ID_LENGTH;
|
||||
for (i = 0; i < len; i++)
|
||||
plci->fax_connect_info_buffer[i] = nlc[1+i];
|
||||
((T30_INFO *) plci->fax_connect_info_buffer)->head_line_len = 0;
|
||||
|
@ -5265,6 +5265,8 @@ static const struct hm_map hfcm_map[] = {
|
||||
/*31*/ {VENDOR_CCD, "XHFC-4S Speech Design", 5, 4, 0, 0, 0, 0,
|
||||
HFC_IO_MODE_EMBSD, XHFC_IRQ},
|
||||
/*32*/ {VENDOR_JH, "HFC-8S (junghanns)", 8, 8, 1, 0, 0, 0, 0, 0},
|
||||
/*33*/ {VENDOR_BN, "HFC-2S Beronet Card PCIe", 4, 2, 1, 3, 0, DIP_4S, 0, 0},
|
||||
/*34*/ {VENDOR_BN, "HFC-4S Beronet Card PCIe", 4, 4, 1, 2, 0, DIP_4S, 0, 0},
|
||||
};
|
||||
|
||||
#undef H
|
||||
@ -5300,6 +5302,10 @@ static struct pci_device_id hfmultipci_ids[] __devinitdata = {
|
||||
PCI_SUBDEVICE_ID_CCD_OV4S, 0, 0, H(28)}, /* OpenVox 4 */
|
||||
{ PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD,
|
||||
PCI_SUBDEVICE_ID_CCD_OV2S, 0, 0, H(29)}, /* OpenVox 2 */
|
||||
{ PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD,
|
||||
0xb761, 0, 0, H(33)}, /* BN2S PCIe */
|
||||
{ PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_VENDOR_ID_CCD,
|
||||
0xb762, 0, 0, H(34)}, /* BN4S PCIe */
|
||||
|
||||
/* Cards with HFC-8S Chip */
|
||||
{ PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC8S, PCI_VENDOR_ID_CCD,
|
||||
|
@ -143,7 +143,7 @@ pof_handle_data(hysdn_card * card, int datlen)
|
||||
(boot->pof_recid == TAG_CABSDATA) ? "CABSDATA" : "ABSDATA",
|
||||
datlen, boot->pof_recoffset);
|
||||
|
||||
if ((boot->last_error = card->writebootseq(card, boot->buf.BootBuf, datlen) < 0))
|
||||
if ((boot->last_error = card->writebootseq(card, boot->buf.BootBuf, datlen)) < 0)
|
||||
return (boot->last_error); /* error writing data */
|
||||
|
||||
if (boot->pof_recoffset + datlen >= boot->pof_reclen)
|
||||
|
@ -673,7 +673,7 @@ int be_cmd_mccq_create(struct be_adapter *adapter,
|
||||
be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
|
||||
OPCODE_COMMON_MCC_CREATE, sizeof(*req));
|
||||
|
||||
req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size);
|
||||
req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
|
||||
|
||||
AMAP_SET_BITS(struct amap_mcc_context, valid, ctxt, 1);
|
||||
AMAP_SET_BITS(struct amap_mcc_context, ring_size, ctxt,
|
||||
|
@ -893,7 +893,6 @@ static inline u16 bnx2x_tx_avail(struct bnx2x_fastpath *fp)
|
||||
u16 prod;
|
||||
u16 cons;
|
||||
|
||||
barrier(); /* Tell compiler that prod and cons can change */
|
||||
prod = fp->tx_bd_prod;
|
||||
cons = fp->tx_bd_cons;
|
||||
|
||||
@ -963,7 +962,7 @@ static int bnx2x_tx_int(struct bnx2x_fastpath *fp)
|
||||
* start_xmit() will miss it and cause the queue to be stopped
|
||||
* forever.
|
||||
*/
|
||||
smp_wmb();
|
||||
smp_mb();
|
||||
|
||||
/* TBD need a thresh? */
|
||||
if (unlikely(netif_tx_queue_stopped(txq))) {
|
||||
@ -11429,9 +11428,12 @@ static netdev_tx_t bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev)
|
||||
|
||||
if (unlikely(bnx2x_tx_avail(fp) < MAX_SKB_FRAGS + 3)) {
|
||||
netif_tx_stop_queue(txq);
|
||||
/* We want bnx2x_tx_int to "see" the updated tx_bd_prod
|
||||
if we put Tx into XOFF state. */
|
||||
|
||||
/* paired memory barrier is in bnx2x_tx_int(), we have to keep
|
||||
* ordering of set_bit() in netif_tx_stop_queue() and read of
|
||||
* fp->bd_tx_cons */
|
||||
smp_mb();
|
||||
|
||||
fp->eth_q_stats.driver_xoff++;
|
||||
if (bnx2x_tx_avail(fp) >= MAX_SKB_FRAGS + 3)
|
||||
netif_tx_wake_queue(txq);
|
||||
|
@ -29,10 +29,6 @@
|
||||
* PHY layer usage
|
||||
*/
|
||||
|
||||
/** Pending Items in this driver:
|
||||
* 1. Use Linux cache infrastcture for DMA'ed memory (dma_xxx functions)
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/sched.h>
|
||||
@ -504,12 +500,6 @@ static unsigned long mdio_max_freq;
|
||||
|
||||
/* Cache macros - Packet buffers would be from skb pool which is cached */
|
||||
#define EMAC_VIRT_NOCACHE(addr) (addr)
|
||||
#define EMAC_CACHE_INVALIDATE(addr, size) \
|
||||
dma_cache_maint((void *)addr, size, DMA_FROM_DEVICE)
|
||||
#define EMAC_CACHE_WRITEBACK(addr, size) \
|
||||
dma_cache_maint((void *)addr, size, DMA_TO_DEVICE)
|
||||
#define EMAC_CACHE_WRITEBACK_INVALIDATE(addr, size) \
|
||||
dma_cache_maint((void *)addr, size, DMA_BIDIRECTIONAL)
|
||||
|
||||
/* DM644x does not have BD's in cached memory - so no cache functions */
|
||||
#define BD_CACHE_INVALIDATE(addr, size)
|
||||
@ -1235,6 +1225,10 @@ static void emac_txch_teardown(struct emac_priv *priv, u32 ch)
|
||||
if (1 == txch->queue_active) {
|
||||
curr_bd = txch->active_queue_head;
|
||||
while (curr_bd != NULL) {
|
||||
dma_unmap_single(emac_dev, curr_bd->buff_ptr,
|
||||
curr_bd->off_b_len & EMAC_RX_BD_BUF_SIZE,
|
||||
DMA_TO_DEVICE);
|
||||
|
||||
emac_net_tx_complete(priv, (void __force *)
|
||||
&curr_bd->buf_token, 1, ch);
|
||||
if (curr_bd != txch->active_queue_tail)
|
||||
@ -1327,6 +1321,11 @@ static int emac_tx_bdproc(struct emac_priv *priv, u32 ch, u32 budget)
|
||||
txch->queue_active = 0; /* end of queue */
|
||||
}
|
||||
}
|
||||
|
||||
dma_unmap_single(emac_dev, curr_bd->buff_ptr,
|
||||
curr_bd->off_b_len & EMAC_RX_BD_BUF_SIZE,
|
||||
DMA_TO_DEVICE);
|
||||
|
||||
*tx_complete_ptr = (u32) curr_bd->buf_token;
|
||||
++tx_complete_ptr;
|
||||
++tx_complete_cnt;
|
||||
@ -1387,8 +1386,8 @@ static int emac_send(struct emac_priv *priv, struct emac_netpktobj *pkt, u32 ch)
|
||||
|
||||
txch->bd_pool_head = curr_bd->next;
|
||||
curr_bd->buf_token = buf_list->buf_token;
|
||||
/* FIXME buff_ptr = dma_map_single(... data_ptr ...) */
|
||||
curr_bd->buff_ptr = virt_to_phys(buf_list->data_ptr);
|
||||
curr_bd->buff_ptr = dma_map_single(&priv->ndev->dev, buf_list->data_ptr,
|
||||
buf_list->length, DMA_TO_DEVICE);
|
||||
curr_bd->off_b_len = buf_list->length;
|
||||
curr_bd->h_next = 0;
|
||||
curr_bd->next = NULL;
|
||||
@ -1468,7 +1467,6 @@ static int emac_dev_xmit(struct sk_buff *skb, struct net_device *ndev)
|
||||
tx_buf.length = skb->len;
|
||||
tx_buf.buf_token = (void *)skb;
|
||||
tx_buf.data_ptr = skb->data;
|
||||
EMAC_CACHE_WRITEBACK((unsigned long)skb->data, skb->len);
|
||||
ndev->trans_start = jiffies;
|
||||
ret_code = emac_send(priv, &tx_packet, EMAC_DEF_TX_CH);
|
||||
if (unlikely(ret_code != 0)) {
|
||||
@ -1543,7 +1541,6 @@ static void *emac_net_alloc_rx_buf(struct emac_priv *priv, int buf_size,
|
||||
p_skb->dev = ndev;
|
||||
skb_reserve(p_skb, NET_IP_ALIGN);
|
||||
*data_token = (void *) p_skb;
|
||||
EMAC_CACHE_WRITEBACK_INVALIDATE((unsigned long)p_skb->data, buf_size);
|
||||
return p_skb->data;
|
||||
}
|
||||
|
||||
@ -1612,8 +1609,8 @@ static int emac_init_rxch(struct emac_priv *priv, u32 ch, char *param)
|
||||
/* populate the hardware descriptor */
|
||||
curr_bd->h_next = emac_virt_to_phys(rxch->active_queue_head,
|
||||
priv);
|
||||
/* FIXME buff_ptr = dma_map_single(... data_ptr ...) */
|
||||
curr_bd->buff_ptr = virt_to_phys(curr_bd->data_ptr);
|
||||
curr_bd->buff_ptr = dma_map_single(emac_dev, curr_bd->data_ptr,
|
||||
rxch->buf_size, DMA_FROM_DEVICE);
|
||||
curr_bd->off_b_len = rxch->buf_size;
|
||||
curr_bd->mode = EMAC_CPPI_OWNERSHIP_BIT;
|
||||
|
||||
@ -1697,6 +1694,12 @@ static void emac_cleanup_rxch(struct emac_priv *priv, u32 ch)
|
||||
curr_bd = rxch->active_queue_head;
|
||||
while (curr_bd) {
|
||||
if (curr_bd->buf_token) {
|
||||
dma_unmap_single(&priv->ndev->dev,
|
||||
curr_bd->buff_ptr,
|
||||
curr_bd->off_b_len
|
||||
& EMAC_RX_BD_BUF_SIZE,
|
||||
DMA_FROM_DEVICE);
|
||||
|
||||
dev_kfree_skb_any((struct sk_buff *)\
|
||||
curr_bd->buf_token);
|
||||
}
|
||||
@ -1871,8 +1874,8 @@ static void emac_addbd_to_rx_queue(struct emac_priv *priv, u32 ch,
|
||||
|
||||
/* populate the hardware descriptor */
|
||||
curr_bd->h_next = 0;
|
||||
/* FIXME buff_ptr = dma_map_single(... buffer ...) */
|
||||
curr_bd->buff_ptr = virt_to_phys(buffer);
|
||||
curr_bd->buff_ptr = dma_map_single(&priv->ndev->dev, buffer,
|
||||
rxch->buf_size, DMA_FROM_DEVICE);
|
||||
curr_bd->off_b_len = rxch->buf_size;
|
||||
curr_bd->mode = EMAC_CPPI_OWNERSHIP_BIT;
|
||||
curr_bd->next = NULL;
|
||||
@ -1927,7 +1930,6 @@ static int emac_net_rx_cb(struct emac_priv *priv,
|
||||
p_skb = (struct sk_buff *)net_pkt_list->pkt_token;
|
||||
/* set length of packet */
|
||||
skb_put(p_skb, net_pkt_list->pkt_length);
|
||||
EMAC_CACHE_INVALIDATE((unsigned long)p_skb->data, p_skb->len);
|
||||
p_skb->protocol = eth_type_trans(p_skb, priv->ndev);
|
||||
netif_receive_skb(p_skb);
|
||||
priv->net_dev_stats.rx_bytes += net_pkt_list->pkt_length;
|
||||
@ -1990,6 +1992,11 @@ static int emac_rx_bdproc(struct emac_priv *priv, u32 ch, u32 budget)
|
||||
rx_buf_obj->data_ptr = (char *)curr_bd->data_ptr;
|
||||
rx_buf_obj->length = curr_bd->off_b_len & EMAC_RX_BD_BUF_SIZE;
|
||||
rx_buf_obj->buf_token = curr_bd->buf_token;
|
||||
|
||||
dma_unmap_single(&priv->ndev->dev, curr_bd->buff_ptr,
|
||||
curr_bd->off_b_len & EMAC_RX_BD_BUF_SIZE,
|
||||
DMA_FROM_DEVICE);
|
||||
|
||||
curr_pkt->pkt_token = curr_pkt->buf_list->buf_token;
|
||||
curr_pkt->num_bufs = 1;
|
||||
curr_pkt->pkt_length =
|
||||
@ -2820,31 +2827,37 @@ static int __devexit davinci_emac_remove(struct platform_device *pdev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static
|
||||
int davinci_emac_suspend(struct platform_device *pdev, pm_message_t state)
|
||||
static int davinci_emac_suspend(struct device *dev)
|
||||
{
|
||||
struct net_device *dev = platform_get_drvdata(pdev);
|
||||
struct platform_device *pdev = to_platform_device(dev);
|
||||
struct net_device *ndev = platform_get_drvdata(pdev);
|
||||
|
||||
if (netif_running(dev))
|
||||
emac_dev_stop(dev);
|
||||
if (netif_running(ndev))
|
||||
emac_dev_stop(ndev);
|
||||
|
||||
clk_disable(emac_clk);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int davinci_emac_resume(struct platform_device *pdev)
|
||||
static int davinci_emac_resume(struct device *dev)
|
||||
{
|
||||
struct net_device *dev = platform_get_drvdata(pdev);
|
||||
struct platform_device *pdev = to_platform_device(dev);
|
||||
struct net_device *ndev = platform_get_drvdata(pdev);
|
||||
|
||||
clk_enable(emac_clk);
|
||||
|
||||
if (netif_running(dev))
|
||||
emac_dev_open(dev);
|
||||
if (netif_running(ndev))
|
||||
emac_dev_open(ndev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct dev_pm_ops davinci_emac_pm_ops = {
|
||||
.suspend = davinci_emac_suspend,
|
||||
.resume = davinci_emac_resume,
|
||||
};
|
||||
|
||||
/**
|
||||
* davinci_emac_driver: EMAC platform driver structure
|
||||
*/
|
||||
@ -2852,11 +2865,10 @@ static struct platform_driver davinci_emac_driver = {
|
||||
.driver = {
|
||||
.name = "davinci_emac",
|
||||
.owner = THIS_MODULE,
|
||||
.pm = &davinci_emac_pm_ops,
|
||||
},
|
||||
.probe = davinci_emac_probe,
|
||||
.remove = __devexit_p(davinci_emac_remove),
|
||||
.suspend = davinci_emac_suspend,
|
||||
.resume = davinci_emac_resume,
|
||||
};
|
||||
|
||||
/**
|
||||
|
@ -2858,7 +2858,7 @@ static int __devinit e100_probe(struct pci_dev *pdev,
|
||||
}
|
||||
nic->cbs_pool = pci_pool_create(netdev->name,
|
||||
nic->pdev,
|
||||
nic->params.cbs.count * sizeof(struct cb),
|
||||
nic->params.cbs.max * sizeof(struct cb),
|
||||
sizeof(u32),
|
||||
0);
|
||||
DPRINTK(PROBE, INFO, "addr 0x%llx, irq %d, MAC addr %pM\n",
|
||||
|
@ -65,7 +65,6 @@
|
||||
#undef CONFIG_NETWINDER_TX_DMA_PROBLEMS /* Not needed */
|
||||
#define CONFIG_NETWINDER_RX_DMA_PROBLEMS /* Must have this one! */
|
||||
#endif
|
||||
#undef CONFIG_USE_INTERNAL_TIMER /* Just cannot make that timer work */
|
||||
#define CONFIG_USE_W977_PNP /* Currently needed */
|
||||
#define PIO_MAX_SPEED 115200
|
||||
|
||||
@ -533,25 +532,6 @@ static netdev_tx_t w83977af_hard_xmit(struct sk_buff *skb,
|
||||
self->tx_buff.len = skb->len;
|
||||
|
||||
mtt = irda_get_mtt(skb);
|
||||
#ifdef CONFIG_USE_INTERNAL_TIMER
|
||||
if (mtt > 50) {
|
||||
/* Adjust for timer resolution */
|
||||
mtt /= 1000+1;
|
||||
|
||||
/* Setup timer */
|
||||
switch_bank(iobase, SET4);
|
||||
outb(mtt & 0xff, iobase+TMRL);
|
||||
outb((mtt >> 8) & 0x0f, iobase+TMRH);
|
||||
|
||||
/* Start timer */
|
||||
outb(IR_MSL_EN_TMR, iobase+IR_MSL);
|
||||
self->io.direction = IO_XMIT;
|
||||
|
||||
/* Enable timer interrupt */
|
||||
switch_bank(iobase, SET0);
|
||||
outb(ICR_ETMRI, iobase+ICR);
|
||||
} else {
|
||||
#endif
|
||||
IRDA_DEBUG(4, "%s(%ld), mtt=%d\n", __func__ , jiffies, mtt);
|
||||
if (mtt)
|
||||
udelay(mtt);
|
||||
@ -560,9 +540,6 @@ static netdev_tx_t w83977af_hard_xmit(struct sk_buff *skb,
|
||||
switch_bank(iobase, SET0);
|
||||
outb(ICR_EDMAI, iobase+ICR);
|
||||
w83977af_dma_write(self, iobase);
|
||||
#ifdef CONFIG_USE_INTERNAL_TIMER
|
||||
}
|
||||
#endif
|
||||
} else {
|
||||
self->tx_buff.data = self->tx_buff.head;
|
||||
self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
|
||||
@ -876,20 +853,7 @@ static int w83977af_dma_receive_complete(struct w83977af_ir *self)
|
||||
/* Check if we have transferred all data to memory */
|
||||
switch_bank(iobase, SET0);
|
||||
if (inb(iobase+USR) & USR_RDR) {
|
||||
#ifdef CONFIG_USE_INTERNAL_TIMER
|
||||
/* Put this entry back in fifo */
|
||||
st_fifo->head--;
|
||||
st_fifo->len++;
|
||||
st_fifo->entries[st_fifo->head].status = status;
|
||||
st_fifo->entries[st_fifo->head].len = len;
|
||||
|
||||
/* Restore set register */
|
||||
outb(set, iobase+SSR);
|
||||
|
||||
return FALSE; /* I'll be back! */
|
||||
#else
|
||||
udelay(80); /* Should be enough!? */
|
||||
#endif
|
||||
}
|
||||
|
||||
skb = dev_alloc_skb(len+1);
|
||||
|
@ -4899,8 +4899,10 @@ static int netdev_tx(struct sk_buff *skb, struct net_device *dev)
|
||||
struct sk_buff *org_skb = skb;
|
||||
|
||||
skb = dev_alloc_skb(org_skb->len);
|
||||
if (!skb)
|
||||
return NETDEV_TX_BUSY;
|
||||
if (!skb) {
|
||||
rc = NETDEV_TX_BUSY;
|
||||
goto unlock;
|
||||
}
|
||||
skb_copy_and_csum_dev(org_skb, skb->data);
|
||||
org_skb->ip_summed = 0;
|
||||
skb->len = org_skb->len;
|
||||
@ -4914,7 +4916,7 @@ static int netdev_tx(struct sk_buff *skb, struct net_device *dev)
|
||||
netif_stop_queue(dev);
|
||||
rc = NETDEV_TX_BUSY;
|
||||
}
|
||||
|
||||
unlock:
|
||||
spin_unlock_irq(&hw_priv->hwlock);
|
||||
|
||||
return rc;
|
||||
|
@ -3687,7 +3687,6 @@ static void myri10ge_probe_slices(struct myri10ge_priv *mgp)
|
||||
if (status != 0) {
|
||||
dev_err(&mgp->pdev->dev, "failed reset\n");
|
||||
goto abort_with_fw;
|
||||
return;
|
||||
}
|
||||
|
||||
mgp->max_intr_slots = cmd.data0 / sizeof(struct mcp_slot);
|
||||
|
@ -142,7 +142,7 @@ bad_clone_list[] __initdata = {
|
||||
{"PCM-4823", "PCM-4823", {0x00, 0xc0, 0x6c}}, /* Broken Advantech MoBo */
|
||||
{"REALTEK", "RTL8019", {0x00, 0x00, 0xe8}}, /* no-name with Realtek chip */
|
||||
#ifdef CONFIG_MACH_TX49XX
|
||||
{"RBHMA4X00-RTL8019", "RBHMA4X00/RTL8019", {0x00, 0x60, 0x0a}}, /* Toshiba built-in */
|
||||
{"RBHMA4X00-RTL8019", "RBHMA4X00-RTL8019", {0x00, 0x60, 0x0a}}, /* Toshiba built-in */
|
||||
#endif
|
||||
{"LCS-8834", "LCS-8836", {0x04, 0x04, 0x37}}, /* ShinyNet (SET) */
|
||||
{NULL,}
|
||||
|
@ -756,6 +756,7 @@ static int pppol2tp_recv_core(struct sock *sock, struct sk_buff *skb)
|
||||
|
||||
/* Try to dequeue as many skbs from reorder_q as we can. */
|
||||
pppol2tp_recv_dequeue(session);
|
||||
sock_put(sock);
|
||||
|
||||
return 0;
|
||||
|
||||
@ -772,6 +773,7 @@ discard_bad_csum:
|
||||
UDP_INC_STATS_USER(&init_net, UDP_MIB_INERRORS, 0);
|
||||
tunnel->stats.rx_errors++;
|
||||
kfree_skb(skb);
|
||||
sock_put(sock);
|
||||
|
||||
return 0;
|
||||
|
||||
@ -1180,7 +1182,8 @@ static int pppol2tp_xmit(struct ppp_channel *chan, struct sk_buff *skb)
|
||||
/* Calculate UDP checksum if configured to do so */
|
||||
if (sk_tun->sk_no_check == UDP_CSUM_NOXMIT)
|
||||
skb->ip_summed = CHECKSUM_NONE;
|
||||
else if (!(skb_dst(skb)->dev->features & NETIF_F_V4_CSUM)) {
|
||||
else if ((skb_dst(skb) && skb_dst(skb)->dev) &&
|
||||
(!(skb_dst(skb)->dev->features & NETIF_F_V4_CSUM))) {
|
||||
skb->ip_summed = CHECKSUM_COMPLETE;
|
||||
csum = skb_checksum(skb, 0, udp_len, 0);
|
||||
uh->check = csum_tcpudp_magic(inet->inet_saddr,
|
||||
@ -1661,6 +1664,7 @@ static int pppol2tp_connect(struct socket *sock, struct sockaddr *uservaddr,
|
||||
if (tunnel_sock == NULL)
|
||||
goto end;
|
||||
|
||||
sock_hold(tunnel_sock);
|
||||
tunnel = tunnel_sock->sk_user_data;
|
||||
} else {
|
||||
tunnel = pppol2tp_tunnel_find(sock_net(sk), sp->pppol2tp.s_tunnel);
|
||||
|
@ -5819,10 +5819,8 @@ static void s2io_vpd_read(struct s2io_nic *nic)
|
||||
}
|
||||
}
|
||||
|
||||
if ((!fail) && (vpd_data[1] < VPD_STRING_LEN)) {
|
||||
memset(nic->product_name, 0, vpd_data[1]);
|
||||
if ((!fail) && (vpd_data[1] < VPD_STRING_LEN))
|
||||
memcpy(nic->product_name, &vpd_data[3], vpd_data[1]);
|
||||
}
|
||||
kfree(vpd_data);
|
||||
swstats->mem_freed += 256;
|
||||
}
|
||||
|
@ -204,6 +204,14 @@ config USB_NET_DM9601
|
||||
This option adds support for Davicom DM9601 based USB 1.1
|
||||
10/100 Ethernet adapters.
|
||||
|
||||
config USB_NET_SMSC75XX
|
||||
tristate "SMSC LAN75XX based USB 2.0 gigabit ethernet devices"
|
||||
depends on USB_USBNET
|
||||
select CRC32
|
||||
help
|
||||
This option adds support for SMSC LAN95XX based USB 2.0
|
||||
Gigabit Ethernet adapters.
|
||||
|
||||
config USB_NET_SMSC95XX
|
||||
tristate "SMSC LAN95XX based USB 2.0 10/100 ethernet devices"
|
||||
depends on USB_USBNET
|
||||
|
@ -11,6 +11,7 @@ obj-$(CONFIG_USB_NET_AX8817X) += asix.o
|
||||
obj-$(CONFIG_USB_NET_CDCETHER) += cdc_ether.o
|
||||
obj-$(CONFIG_USB_NET_CDC_EEM) += cdc_eem.o
|
||||
obj-$(CONFIG_USB_NET_DM9601) += dm9601.o
|
||||
obj-$(CONFIG_USB_NET_SMSC75XX) += smsc75xx.o
|
||||
obj-$(CONFIG_USB_NET_SMSC95XX) += smsc95xx.o
|
||||
obj-$(CONFIG_USB_NET_GL620A) += gl620a.o
|
||||
obj-$(CONFIG_USB_NET_NET1080) += net1080.o
|
||||
|
@ -1155,9 +1155,6 @@ static void _hso_serial_set_termios(struct tty_struct *tty,
|
||||
static void hso_resubmit_rx_bulk_urb(struct hso_serial *serial, struct urb *urb)
|
||||
{
|
||||
int result;
|
||||
#ifdef CONFIG_HSO_AUTOPM
|
||||
usb_mark_last_busy(urb->dev);
|
||||
#endif
|
||||
/* We are done with this URB, resubmit it. Prep the USB to wait for
|
||||
* another frame */
|
||||
usb_fill_bulk_urb(urb, serial->parent->usb,
|
||||
|
1288
drivers/net/usb/smsc75xx.c
Normal file
1288
drivers/net/usb/smsc75xx.c
Normal file
File diff suppressed because it is too large
Load Diff
421
drivers/net/usb/smsc75xx.h
Normal file
421
drivers/net/usb/smsc75xx.h
Normal file
@ -0,0 +1,421 @@
|
||||
/***************************************************************************
|
||||
*
|
||||
* Copyright (C) 2007-2010 SMSC
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#ifndef _SMSC75XX_H
|
||||
#define _SMSC75XX_H
|
||||
|
||||
/* Tx command words */
|
||||
#define TX_CMD_A_LSO (0x08000000)
|
||||
#define TX_CMD_A_IPE (0x04000000)
|
||||
#define TX_CMD_A_TPE (0x02000000)
|
||||
#define TX_CMD_A_IVTG (0x01000000)
|
||||
#define TX_CMD_A_RVTG (0x00800000)
|
||||
#define TX_CMD_A_FCS (0x00400000)
|
||||
#define TX_CMD_A_LEN (0x000FFFFF)
|
||||
|
||||
#define TX_CMD_B_MSS (0x3FFF0000)
|
||||
#define TX_CMD_B_MSS_SHIFT (16)
|
||||
#define TX_MSS_MIN ((u16)8)
|
||||
#define TX_CMD_B_VTAG (0x0000FFFF)
|
||||
|
||||
/* Rx command words */
|
||||
#define RX_CMD_A_ICE (0x80000000)
|
||||
#define RX_CMD_A_TCE (0x40000000)
|
||||
#define RX_CMD_A_IPV (0x20000000)
|
||||
#define RX_CMD_A_PID (0x18000000)
|
||||
#define RX_CMD_A_PID_NIP (0x00000000)
|
||||
#define RX_CMD_A_PID_TCP (0x08000000)
|
||||
#define RX_CMD_A_PID_UDP (0x10000000)
|
||||
#define RX_CMD_A_PID_PP (0x18000000)
|
||||
#define RX_CMD_A_PFF (0x04000000)
|
||||
#define RX_CMD_A_BAM (0x02000000)
|
||||
#define RX_CMD_A_MAM (0x01000000)
|
||||
#define RX_CMD_A_FVTG (0x00800000)
|
||||
#define RX_CMD_A_RED (0x00400000)
|
||||
#define RX_CMD_A_RWT (0x00200000)
|
||||
#define RX_CMD_A_RUNT (0x00100000)
|
||||
#define RX_CMD_A_LONG (0x00080000)
|
||||
#define RX_CMD_A_RXE (0x00040000)
|
||||
#define RX_CMD_A_DRB (0x00020000)
|
||||
#define RX_CMD_A_FCS (0x00010000)
|
||||
#define RX_CMD_A_UAM (0x00008000)
|
||||
#define RX_CMD_A_LCSM (0x00004000)
|
||||
#define RX_CMD_A_LEN (0x00003FFF)
|
||||
|
||||
#define RX_CMD_B_CSUM (0xFFFF0000)
|
||||
#define RX_CMD_B_CSUM_SHIFT (16)
|
||||
#define RX_CMD_B_VTAG (0x0000FFFF)
|
||||
|
||||
/* SCSRs */
|
||||
#define ID_REV (0x0000)
|
||||
|
||||
#define FPGA_REV (0x0004)
|
||||
|
||||
#define BOND_CTL (0x0008)
|
||||
|
||||
#define INT_STS (0x000C)
|
||||
#define INT_STS_RDFO_INT (0x00400000)
|
||||
#define INT_STS_TXE_INT (0x00200000)
|
||||
#define INT_STS_MACRTO_INT (0x00100000)
|
||||
#define INT_STS_TX_DIS_INT (0x00080000)
|
||||
#define INT_STS_RX_DIS_INT (0x00040000)
|
||||
#define INT_STS_PHY_INT_ (0x00020000)
|
||||
#define INT_STS_MAC_ERR_INT (0x00008000)
|
||||
#define INT_STS_TDFU (0x00004000)
|
||||
#define INT_STS_TDFO (0x00002000)
|
||||
#define INT_STS_GPIOS (0x00000FFF)
|
||||
#define INT_STS_CLEAR_ALL (0xFFFFFFFF)
|
||||
|
||||
#define HW_CFG (0x0010)
|
||||
#define HW_CFG_SMDET_STS (0x00008000)
|
||||
#define HW_CFG_SMDET_EN (0x00004000)
|
||||
#define HW_CFG_EEM (0x00002000)
|
||||
#define HW_CFG_RST_PROTECT (0x00001000)
|
||||
#define HW_CFG_PORT_SWAP (0x00000800)
|
||||
#define HW_CFG_PHY_BOOST (0x00000600)
|
||||
#define HW_CFG_PHY_BOOST_NORMAL (0x00000000)
|
||||
#define HW_CFG_PHY_BOOST_4 (0x00002000)
|
||||
#define HW_CFG_PHY_BOOST_8 (0x00004000)
|
||||
#define HW_CFG_PHY_BOOST_12 (0x00006000)
|
||||
#define HW_CFG_LEDB (0x00000100)
|
||||
#define HW_CFG_BIR (0x00000080)
|
||||
#define HW_CFG_SBP (0x00000040)
|
||||
#define HW_CFG_IME (0x00000020)
|
||||
#define HW_CFG_MEF (0x00000010)
|
||||
#define HW_CFG_ETC (0x00000008)
|
||||
#define HW_CFG_BCE (0x00000004)
|
||||
#define HW_CFG_LRST (0x00000002)
|
||||
#define HW_CFG_SRST (0x00000001)
|
||||
|
||||
#define PMT_CTL (0x0014)
|
||||
#define PMT_CTL_PHY_PWRUP (0x00000400)
|
||||
#define PMT_CTL_RES_CLR_WKP_EN (0x00000100)
|
||||
#define PMT_CTL_DEV_RDY (0x00000080)
|
||||
#define PMT_CTL_SUS_MODE (0x00000060)
|
||||
#define PMT_CTL_SUS_MODE_0 (0x00000000)
|
||||
#define PMT_CTL_SUS_MODE_1 (0x00000020)
|
||||
#define PMT_CTL_SUS_MODE_2 (0x00000040)
|
||||
#define PMT_CTL_SUS_MODE_3 (0x00000060)
|
||||
#define PMT_CTL_PHY_RST (0x00000010)
|
||||
#define PMT_CTL_WOL_EN (0x00000008)
|
||||
#define PMT_CTL_ED_EN (0x00000004)
|
||||
#define PMT_CTL_WUPS (0x00000003)
|
||||
#define PMT_CTL_WUPS_NO (0x00000000)
|
||||
#define PMT_CTL_WUPS_ED (0x00000001)
|
||||
#define PMT_CTL_WUPS_WOL (0x00000002)
|
||||
#define PMT_CTL_WUPS_MULTI (0x00000003)
|
||||
|
||||
#define LED_GPIO_CFG (0x0018)
|
||||
#define LED_GPIO_CFG_LED2_FUN_SEL (0x80000000)
|
||||
#define LED_GPIO_CFG_LED10_FUN_SEL (0x40000000)
|
||||
#define LED_GPIO_CFG_LEDGPIO_EN (0x0000F000)
|
||||
#define LED_GPIO_CFG_LEDGPIO_EN_0 (0x00001000)
|
||||
#define LED_GPIO_CFG_LEDGPIO_EN_1 (0x00002000)
|
||||
#define LED_GPIO_CFG_LEDGPIO_EN_2 (0x00004000)
|
||||
#define LED_GPIO_CFG_LEDGPIO_EN_3 (0x00008000)
|
||||
#define LED_GPIO_CFG_GPBUF (0x00000F00)
|
||||
#define LED_GPIO_CFG_GPBUF_0 (0x00000100)
|
||||
#define LED_GPIO_CFG_GPBUF_1 (0x00000200)
|
||||
#define LED_GPIO_CFG_GPBUF_2 (0x00000400)
|
||||
#define LED_GPIO_CFG_GPBUF_3 (0x00000800)
|
||||
#define LED_GPIO_CFG_GPDIR (0x000000F0)
|
||||
#define LED_GPIO_CFG_GPDIR_0 (0x00000010)
|
||||
#define LED_GPIO_CFG_GPDIR_1 (0x00000020)
|
||||
#define LED_GPIO_CFG_GPDIR_2 (0x00000040)
|
||||
#define LED_GPIO_CFG_GPDIR_3 (0x00000080)
|
||||
#define LED_GPIO_CFG_GPDATA (0x0000000F)
|
||||
#define LED_GPIO_CFG_GPDATA_0 (0x00000001)
|
||||
#define LED_GPIO_CFG_GPDATA_1 (0x00000002)
|
||||
#define LED_GPIO_CFG_GPDATA_2 (0x00000004)
|
||||
#define LED_GPIO_CFG_GPDATA_3 (0x00000008)
|
||||
|
||||
#define GPIO_CFG (0x001C)
|
||||
#define GPIO_CFG_SHIFT (24)
|
||||
#define GPIO_CFG_GPEN (0xFF000000)
|
||||
#define GPIO_CFG_GPBUF (0x00FF0000)
|
||||
#define GPIO_CFG_GPDIR (0x0000FF00)
|
||||
#define GPIO_CFG_GPDATA (0x000000FF)
|
||||
|
||||
#define GPIO_WAKE (0x0020)
|
||||
#define GPIO_WAKE_PHY_LINKUP_EN (0x80000000)
|
||||
#define GPIO_WAKE_POL (0x0FFF0000)
|
||||
#define GPIO_WAKE_POL_SHIFT (16)
|
||||
#define GPIO_WAKE_WK (0x00000FFF)
|
||||
|
||||
#define DP_SEL (0x0024)
|
||||
#define DP_SEL_DPRDY (0x80000000)
|
||||
#define DP_SEL_RSEL (0x0000000F)
|
||||
#define DP_SEL_URX (0x00000000)
|
||||
#define DP_SEL_VHF (0x00000001)
|
||||
#define DP_SEL_VHF_HASH_LEN (16)
|
||||
#define DP_SEL_VHF_VLAN_LEN (128)
|
||||
#define DP_SEL_LSO_HEAD (0x00000002)
|
||||
#define DP_SEL_FCT_RX (0x00000003)
|
||||
#define DP_SEL_FCT_TX (0x00000004)
|
||||
#define DP_SEL_DESCRIPTOR (0x00000005)
|
||||
#define DP_SEL_WOL (0x00000006)
|
||||
|
||||
#define DP_CMD (0x0028)
|
||||
#define DP_CMD_WRITE (0x01)
|
||||
#define DP_CMD_READ (0x00)
|
||||
|
||||
#define DP_ADDR (0x002C)
|
||||
|
||||
#define DP_DATA (0x0030)
|
||||
|
||||
#define BURST_CAP (0x0034)
|
||||
#define BURST_CAP_MASK (0x0000000F)
|
||||
|
||||
#define INT_EP_CTL (0x0038)
|
||||
#define INT_EP_CTL_INTEP_ON (0x80000000)
|
||||
#define INT_EP_CTL_RDFO_EN (0x00400000)
|
||||
#define INT_EP_CTL_TXE_EN (0x00200000)
|
||||
#define INT_EP_CTL_MACROTO_EN (0x00100000)
|
||||
#define INT_EP_CTL_TX_DIS_EN (0x00080000)
|
||||
#define INT_EP_CTL_RX_DIS_EN (0x00040000)
|
||||
#define INT_EP_CTL_PHY_EN_ (0x00020000)
|
||||
#define INT_EP_CTL_MAC_ERR_EN (0x00008000)
|
||||
#define INT_EP_CTL_TDFU_EN (0x00004000)
|
||||
#define INT_EP_CTL_TDFO_EN (0x00002000)
|
||||
#define INT_EP_CTL_RX_FIFO_EN (0x00001000)
|
||||
#define INT_EP_CTL_GPIOX_EN (0x00000FFF)
|
||||
|
||||
#define BULK_IN_DLY (0x003C)
|
||||
#define BULK_IN_DLY_MASK (0xFFFF)
|
||||
|
||||
#define E2P_CMD (0x0040)
|
||||
#define E2P_CMD_BUSY (0x80000000)
|
||||
#define E2P_CMD_MASK (0x70000000)
|
||||
#define E2P_CMD_READ (0x00000000)
|
||||
#define E2P_CMD_EWDS (0x10000000)
|
||||
#define E2P_CMD_EWEN (0x20000000)
|
||||
#define E2P_CMD_WRITE (0x30000000)
|
||||
#define E2P_CMD_WRAL (0x40000000)
|
||||
#define E2P_CMD_ERASE (0x50000000)
|
||||
#define E2P_CMD_ERAL (0x60000000)
|
||||
#define E2P_CMD_RELOAD (0x70000000)
|
||||
#define E2P_CMD_TIMEOUT (0x00000400)
|
||||
#define E2P_CMD_LOADED (0x00000200)
|
||||
#define E2P_CMD_ADDR (0x000001FF)
|
||||
|
||||
#define MAX_EEPROM_SIZE (512)
|
||||
|
||||
#define E2P_DATA (0x0044)
|
||||
#define E2P_DATA_MASK_ (0x000000FF)
|
||||
|
||||
#define RFE_CTL (0x0060)
|
||||
#define RFE_CTL_TCPUDP_CKM (0x00001000)
|
||||
#define RFE_CTL_IP_CKM (0x00000800)
|
||||
#define RFE_CTL_AB (0x00000400)
|
||||
#define RFE_CTL_AM (0x00000200)
|
||||
#define RFE_CTL_AU (0x00000100)
|
||||
#define RFE_CTL_VS (0x00000080)
|
||||
#define RFE_CTL_UF (0x00000040)
|
||||
#define RFE_CTL_VF (0x00000020)
|
||||
#define RFE_CTL_SPF (0x00000010)
|
||||
#define RFE_CTL_MHF (0x00000008)
|
||||
#define RFE_CTL_DHF (0x00000004)
|
||||
#define RFE_CTL_DPF (0x00000002)
|
||||
#define RFE_CTL_RST_RF (0x00000001)
|
||||
|
||||
#define VLAN_TYPE (0x0064)
|
||||
#define VLAN_TYPE_MASK (0x0000FFFF)
|
||||
|
||||
#define FCT_RX_CTL (0x0090)
|
||||
#define FCT_RX_CTL_EN (0x80000000)
|
||||
#define FCT_RX_CTL_RST (0x40000000)
|
||||
#define FCT_RX_CTL_SBF (0x02000000)
|
||||
#define FCT_RX_CTL_OVERFLOW (0x01000000)
|
||||
#define FCT_RX_CTL_FRM_DROP (0x00800000)
|
||||
#define FCT_RX_CTL_RX_NOT_EMPTY (0x00400000)
|
||||
#define FCT_RX_CTL_RX_EMPTY (0x00200000)
|
||||
#define FCT_RX_CTL_RX_DISABLED (0x00100000)
|
||||
#define FCT_RX_CTL_RXUSED (0x0000FFFF)
|
||||
|
||||
#define FCT_TX_CTL (0x0094)
|
||||
#define FCT_TX_CTL_EN (0x80000000)
|
||||
#define FCT_TX_CTL_RST (0x40000000)
|
||||
#define FCT_TX_CTL_TX_NOT_EMPTY (0x00400000)
|
||||
#define FCT_TX_CTL_TX_EMPTY (0x00200000)
|
||||
#define FCT_TX_CTL_TX_DISABLED (0x00100000)
|
||||
#define FCT_TX_CTL_TXUSED (0x0000FFFF)
|
||||
|
||||
#define FCT_RX_FIFO_END (0x0098)
|
||||
#define FCT_RX_FIFO_END_MASK (0x0000007F)
|
||||
|
||||
#define FCT_TX_FIFO_END (0x009C)
|
||||
#define FCT_TX_FIFO_END_MASK (0x0000003F)
|
||||
|
||||
#define FCT_FLOW (0x00A0)
|
||||
#define FCT_FLOW_THRESHOLD_OFF (0x00007F00)
|
||||
#define FCT_FLOW_THRESHOLD_OFF_SHIFT (8)
|
||||
#define FCT_FLOW_THRESHOLD_ON (0x0000007F)
|
||||
|
||||
/* MAC CSRs */
|
||||
#define MAC_CR (0x100)
|
||||
#define MAC_CR_ADP (0x00002000)
|
||||
#define MAC_CR_ADD (0x00001000)
|
||||
#define MAC_CR_ASD (0x00000800)
|
||||
#define MAC_CR_INT_LOOP (0x00000400)
|
||||
#define MAC_CR_BOLMT (0x000000C0)
|
||||
#define MAC_CR_FDPX (0x00000008)
|
||||
#define MAC_CR_CFG (0x00000006)
|
||||
#define MAC_CR_CFG_10 (0x00000000)
|
||||
#define MAC_CR_CFG_100 (0x00000002)
|
||||
#define MAC_CR_CFG_1000 (0x00000004)
|
||||
#define MAC_CR_RST (0x00000001)
|
||||
|
||||
#define MAC_RX (0x104)
|
||||
#define MAC_RX_MAX_SIZE (0x3FFF0000)
|
||||
#define MAC_RX_MAX_SIZE_SHIFT (16)
|
||||
#define MAC_RX_FCS_STRIP (0x00000010)
|
||||
#define MAC_RX_FSE (0x00000004)
|
||||
#define MAC_RX_RXD (0x00000002)
|
||||
#define MAC_RX_RXEN (0x00000001)
|
||||
|
||||
#define MAC_TX (0x108)
|
||||
#define MAC_TX_BFCS (0x00000004)
|
||||
#define MAC_TX_TXD (0x00000002)
|
||||
#define MAC_TX_TXEN (0x00000001)
|
||||
|
||||
#define FLOW (0x10C)
|
||||
#define FLOW_FORCE_FC (0x80000000)
|
||||
#define FLOW_TX_FCEN (0x40000000)
|
||||
#define FLOW_RX_FCEN (0x20000000)
|
||||
#define FLOW_FPF (0x10000000)
|
||||
#define FLOW_PAUSE_TIME (0x0000FFFF)
|
||||
|
||||
#define RAND_SEED (0x110)
|
||||
#define RAND_SEED_MASK (0x0000FFFF)
|
||||
|
||||
#define ERR_STS (0x114)
|
||||
#define ERR_STS_FCS_ERR (0x00000100)
|
||||
#define ERR_STS_LFRM_ERR (0x00000080)
|
||||
#define ERR_STS_RUNT_ERR (0x00000040)
|
||||
#define ERR_STS_COLLISION_ERR (0x00000010)
|
||||
#define ERR_STS_ALIGN_ERR (0x00000008)
|
||||
#define ERR_STS_URUN_ERR (0x00000004)
|
||||
|
||||
#define RX_ADDRH (0x118)
|
||||
#define RX_ADDRH_MASK (0x0000FFFF)
|
||||
|
||||
#define RX_ADDRL (0x11C)
|
||||
|
||||
#define MII_ACCESS (0x120)
|
||||
#define MII_ACCESS_PHY_ADDR (0x0000F800)
|
||||
#define MII_ACCESS_PHY_ADDR_SHIFT (11)
|
||||
#define MII_ACCESS_REG_ADDR (0x000007C0)
|
||||
#define MII_ACCESS_REG_ADDR_SHIFT (6)
|
||||
#define MII_ACCESS_READ (0x00000000)
|
||||
#define MII_ACCESS_WRITE (0x00000002)
|
||||
#define MII_ACCESS_BUSY (0x00000001)
|
||||
|
||||
#define MII_DATA (0x124)
|
||||
#define MII_DATA_MASK (0x0000FFFF)
|
||||
|
||||
#define WUCSR (0x140)
|
||||
#define WUCSR_PFDA_FR (0x00000080)
|
||||
#define WUCSR_WUFR (0x00000040)
|
||||
#define WUCSR_MPR (0x00000020)
|
||||
#define WUCSR_BCAST_FR (0x00000010)
|
||||
#define WUCSR_PFDA_EN (0x00000008)
|
||||
#define WUCSR_WUEN (0x00000004)
|
||||
#define WUCSR_MPEN (0x00000002)
|
||||
#define WUCSR_BCST_EN (0x00000001)
|
||||
|
||||
#define WUF_CFGX (0x144)
|
||||
#define WUF_CFGX_EN (0x80000000)
|
||||
#define WUF_CFGX_ATYPE (0x03000000)
|
||||
#define WUF_CFGX_ATYPE_UNICAST (0x00000000)
|
||||
#define WUF_CFGX_ATYPE_MULTICAST (0x02000000)
|
||||
#define WUF_CFGX_ATYPE_ALL (0x03000000)
|
||||
#define WUF_CFGX_PATTERN_OFFSET (0x007F0000)
|
||||
#define WUF_CFGX_PATTERN_OFFSET_SHIFT (16)
|
||||
#define WUF_CFGX_CRC16 (0x0000FFFF)
|
||||
#define WUF_NUM (8)
|
||||
|
||||
#define WUF_MASKX (0x170)
|
||||
#define WUF_MASKX_AVALID (0x80000000)
|
||||
#define WUF_MASKX_ATYPE (0x40000000)
|
||||
|
||||
#define ADDR_FILTX (0x300)
|
||||
#define ADDR_FILTX_FB_VALID (0x80000000)
|
||||
#define ADDR_FILTX_FB_TYPE (0x40000000)
|
||||
#define ADDR_FILTX_FB_ADDRHI (0x0000FFFF)
|
||||
#define ADDR_FILTX_SB_ADDRLO (0xFFFFFFFF)
|
||||
|
||||
#define WUCSR2 (0x500)
|
||||
#define WUCSR2_NS_RCD (0x00000040)
|
||||
#define WUCSR2_ARP_RCD (0x00000020)
|
||||
#define WUCSR2_TCPSYN_RCD (0x00000010)
|
||||
#define WUCSR2_NS_OFFLOAD (0x00000004)
|
||||
#define WUCSR2_ARP_OFFLOAD (0x00000002)
|
||||
#define WUCSR2_TCPSYN_OFFLOAD (0x00000001)
|
||||
|
||||
#define WOL_FIFO_STS (0x504)
|
||||
|
||||
#define IPV6_ADDRX (0x510)
|
||||
|
||||
#define IPV4_ADDRX (0x590)
|
||||
|
||||
|
||||
/* Vendor-specific PHY Definitions */
|
||||
|
||||
/* Mode Control/Status Register */
|
||||
#define PHY_MODE_CTRL_STS (17)
|
||||
#define MODE_CTRL_STS_EDPWRDOWN ((u16)0x2000)
|
||||
#define MODE_CTRL_STS_ENERGYON ((u16)0x0002)
|
||||
|
||||
#define PHY_INT_SRC (29)
|
||||
#define PHY_INT_SRC_ENERGY_ON ((u16)0x0080)
|
||||
#define PHY_INT_SRC_ANEG_COMP ((u16)0x0040)
|
||||
#define PHY_INT_SRC_REMOTE_FAULT ((u16)0x0020)
|
||||
#define PHY_INT_SRC_LINK_DOWN ((u16)0x0010)
|
||||
|
||||
#define PHY_INT_MASK (30)
|
||||
#define PHY_INT_MASK_ENERGY_ON ((u16)0x0080)
|
||||
#define PHY_INT_MASK_ANEG_COMP ((u16)0x0040)
|
||||
#define PHY_INT_MASK_REMOTE_FAULT ((u16)0x0020)
|
||||
#define PHY_INT_MASK_LINK_DOWN ((u16)0x0010)
|
||||
#define PHY_INT_MASK_DEFAULT (PHY_INT_MASK_ANEG_COMP | \
|
||||
PHY_INT_MASK_LINK_DOWN)
|
||||
|
||||
#define PHY_SPECIAL (31)
|
||||
#define PHY_SPECIAL_SPD ((u16)0x001C)
|
||||
#define PHY_SPECIAL_SPD_10HALF ((u16)0x0004)
|
||||
#define PHY_SPECIAL_SPD_10FULL ((u16)0x0014)
|
||||
#define PHY_SPECIAL_SPD_100HALF ((u16)0x0008)
|
||||
#define PHY_SPECIAL_SPD_100FULL ((u16)0x0018)
|
||||
|
||||
/* USB Vendor Requests */
|
||||
#define USB_VENDOR_REQUEST_WRITE_REGISTER 0xA0
|
||||
#define USB_VENDOR_REQUEST_READ_REGISTER 0xA1
|
||||
#define USB_VENDOR_REQUEST_GET_STATS 0xA2
|
||||
|
||||
/* Interrupt Endpoint status word bitfields */
|
||||
#define INT_ENP_RDFO_INT ((u32)BIT(22))
|
||||
#define INT_ENP_TXE_INT ((u32)BIT(21))
|
||||
#define INT_ENP_TX_DIS_INT ((u32)BIT(19))
|
||||
#define INT_ENP_RX_DIS_INT ((u32)BIT(18))
|
||||
#define INT_ENP_PHY_INT ((u32)BIT(17))
|
||||
#define INT_ENP_MAC_ERR_INT ((u32)BIT(15))
|
||||
#define INT_ENP_RX_FIFO_DATA_INT ((u32)BIT(12))
|
||||
|
||||
#endif /* _SMSC75XX_H */
|
@ -709,6 +709,8 @@ static void smsc95xx_start_rx_path(struct usbnet *dev)
|
||||
|
||||
static int smsc95xx_phy_initialize(struct usbnet *dev)
|
||||
{
|
||||
int bmcr, timeout = 0;
|
||||
|
||||
/* Initialize MII structure */
|
||||
dev->mii.dev = dev->net;
|
||||
dev->mii.mdio_read = smsc95xx_mdio_read;
|
||||
@ -717,7 +719,20 @@ static int smsc95xx_phy_initialize(struct usbnet *dev)
|
||||
dev->mii.reg_num_mask = 0x1f;
|
||||
dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID;
|
||||
|
||||
/* reset phy and wait for reset to complete */
|
||||
smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
|
||||
|
||||
do {
|
||||
msleep(10);
|
||||
bmcr = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR);
|
||||
timeout++;
|
||||
} while ((bmcr & MII_BMCR) && (timeout < 100));
|
||||
|
||||
if (timeout >= 100) {
|
||||
netdev_warn(dev->net, "timeout on PHY Reset");
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
|
||||
ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
|
||||
ADVERTISE_PAUSE_ASYM);
|
||||
|
@ -40,7 +40,7 @@ netdev_tx_t br_dev_xmit(struct sk_buff *skb, struct net_device *dev)
|
||||
goto out;
|
||||
|
||||
mdst = br_mdb_get(br, skb);
|
||||
if (mdst || BR_INPUT_SKB_CB(skb)->mrouters_only)
|
||||
if (mdst || BR_INPUT_SKB_CB_MROUTERS_ONLY(skb))
|
||||
br_multicast_deliver(mdst, skb);
|
||||
else
|
||||
br_flood_deliver(br, skb);
|
||||
|
@ -19,6 +19,11 @@
|
||||
#include <linux/netfilter_bridge.h>
|
||||
#include "br_private.h"
|
||||
|
||||
static int deliver_clone(const struct net_bridge_port *prev,
|
||||
struct sk_buff *skb,
|
||||
void (*__packet_hook)(const struct net_bridge_port *p,
|
||||
struct sk_buff *skb));
|
||||
|
||||
/* Don't forward packets to originating port or forwarding diasabled */
|
||||
static inline int should_deliver(const struct net_bridge_port *p,
|
||||
const struct sk_buff *skb)
|
||||
@ -94,17 +99,22 @@ void br_deliver(const struct net_bridge_port *to, struct sk_buff *skb)
|
||||
}
|
||||
|
||||
/* called with rcu_read_lock */
|
||||
void br_forward(const struct net_bridge_port *to, struct sk_buff *skb)
|
||||
void br_forward(const struct net_bridge_port *to, struct sk_buff *skb, struct sk_buff *skb0)
|
||||
{
|
||||
if (should_deliver(to, skb)) {
|
||||
__br_forward(to, skb);
|
||||
if (skb0)
|
||||
deliver_clone(to, skb, __br_forward);
|
||||
else
|
||||
__br_forward(to, skb);
|
||||
return;
|
||||
}
|
||||
|
||||
kfree_skb(skb);
|
||||
if (!skb0)
|
||||
kfree_skb(skb);
|
||||
}
|
||||
|
||||
static int deliver_clone(struct net_bridge_port *prev, struct sk_buff *skb,
|
||||
static int deliver_clone(const struct net_bridge_port *prev,
|
||||
struct sk_buff *skb,
|
||||
void (*__packet_hook)(const struct net_bridge_port *p,
|
||||
struct sk_buff *skb))
|
||||
{
|
||||
|
@ -70,7 +70,7 @@ int br_handle_frame_finish(struct sk_buff *skb)
|
||||
|
||||
if (is_multicast_ether_addr(dest)) {
|
||||
mdst = br_mdb_get(br, skb);
|
||||
if (mdst || BR_INPUT_SKB_CB(skb)->mrouters_only) {
|
||||
if (mdst || BR_INPUT_SKB_CB_MROUTERS_ONLY(skb)) {
|
||||
if ((mdst && !hlist_unhashed(&mdst->mglist)) ||
|
||||
br_multicast_is_router(br))
|
||||
skb2 = skb;
|
||||
@ -90,7 +90,7 @@ int br_handle_frame_finish(struct sk_buff *skb)
|
||||
|
||||
if (skb) {
|
||||
if (dst)
|
||||
br_forward(dst->dst, skb);
|
||||
br_forward(dst->dst, skb, skb2);
|
||||
else
|
||||
br_flood_forward(br, skb, skb2);
|
||||
}
|
||||
|
@ -49,22 +49,23 @@ static struct net_bridge_mdb_entry *__br_mdb_ip_get(
|
||||
static struct net_bridge_mdb_entry *br_mdb_ip_get(
|
||||
struct net_bridge_mdb_htable *mdb, __be32 dst)
|
||||
{
|
||||
if (!mdb)
|
||||
return NULL;
|
||||
|
||||
return __br_mdb_ip_get(mdb, dst, br_ip_hash(mdb, dst));
|
||||
}
|
||||
|
||||
struct net_bridge_mdb_entry *br_mdb_get(struct net_bridge *br,
|
||||
struct sk_buff *skb)
|
||||
{
|
||||
struct net_bridge_mdb_htable *mdb = br->mdb;
|
||||
|
||||
if (!mdb || br->multicast_disabled)
|
||||
if (br->multicast_disabled)
|
||||
return NULL;
|
||||
|
||||
switch (skb->protocol) {
|
||||
case htons(ETH_P_IP):
|
||||
if (BR_INPUT_SKB_CB(skb)->igmp)
|
||||
break;
|
||||
return br_mdb_ip_get(mdb, ip_hdr(skb)->daddr);
|
||||
return br_mdb_ip_get(br->mdb, ip_hdr(skb)->daddr);
|
||||
}
|
||||
|
||||
return NULL;
|
||||
@ -851,8 +852,8 @@ static int br_multicast_query(struct net_bridge *br,
|
||||
if (ih3->nsrcs)
|
||||
goto out;
|
||||
|
||||
max_delay = ih3->code ? 1 :
|
||||
IGMPV3_MRC(ih3->code) * (HZ / IGMP_TIMER_SCALE);
|
||||
max_delay = ih3->code ?
|
||||
IGMPV3_MRC(ih3->code) * (HZ / IGMP_TIMER_SCALE) : 1;
|
||||
}
|
||||
|
||||
if (!group)
|
||||
@ -990,7 +991,7 @@ static int br_multicast_ipv4_rcv(struct net_bridge *br,
|
||||
|
||||
err = pskb_trim_rcsum(skb2, len);
|
||||
if (err)
|
||||
return err;
|
||||
goto err_out;
|
||||
}
|
||||
|
||||
len -= ip_hdrlen(skb2);
|
||||
@ -1012,7 +1013,7 @@ static int br_multicast_ipv4_rcv(struct net_bridge *br,
|
||||
case CHECKSUM_NONE:
|
||||
skb2->csum = 0;
|
||||
if (skb_checksum_complete(skb2))
|
||||
return -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
err = 0;
|
||||
@ -1039,6 +1040,7 @@ static int br_multicast_ipv4_rcv(struct net_bridge *br,
|
||||
|
||||
out:
|
||||
__skb_push(skb2, offset);
|
||||
err_out:
|
||||
if (skb2 != skb)
|
||||
kfree_skb(skb2);
|
||||
return err;
|
||||
|
@ -206,12 +206,20 @@ struct net_bridge
|
||||
|
||||
struct br_input_skb_cb {
|
||||
struct net_device *brdev;
|
||||
#ifdef CONFIG_BRIDGE_IGMP_SNOOPING
|
||||
int igmp;
|
||||
int mrouters_only;
|
||||
#endif
|
||||
};
|
||||
|
||||
#define BR_INPUT_SKB_CB(__skb) ((struct br_input_skb_cb *)(__skb)->cb)
|
||||
|
||||
#ifdef CONFIG_BRIDGE_IGMP_SNOOPING
|
||||
# define BR_INPUT_SKB_CB_MROUTERS_ONLY(__skb) (BR_INPUT_SKB_CB(__skb)->mrouters_only)
|
||||
#else
|
||||
# define BR_INPUT_SKB_CB_MROUTERS_ONLY(__skb) (0)
|
||||
#endif
|
||||
|
||||
extern struct notifier_block br_device_notifier;
|
||||
extern const u8 br_group_address[ETH_ALEN];
|
||||
|
||||
@ -252,7 +260,7 @@ extern void br_deliver(const struct net_bridge_port *to,
|
||||
struct sk_buff *skb);
|
||||
extern int br_dev_queue_push_xmit(struct sk_buff *skb);
|
||||
extern void br_forward(const struct net_bridge_port *to,
|
||||
struct sk_buff *skb);
|
||||
struct sk_buff *skb, struct sk_buff *skb0);
|
||||
extern int br_forward_finish(struct sk_buff *skb);
|
||||
extern void br_flood_deliver(struct net_bridge *br, struct sk_buff *skb);
|
||||
extern void br_flood_forward(struct net_bridge *br, struct sk_buff *skb,
|
||||
|
@ -735,7 +735,7 @@ int netpoll_setup(struct netpoll *np)
|
||||
npinfo = kmalloc(sizeof(*npinfo), GFP_KERNEL);
|
||||
if (!npinfo) {
|
||||
err = -ENOMEM;
|
||||
goto release;
|
||||
goto put;
|
||||
}
|
||||
|
||||
npinfo->rx_flags = 0;
|
||||
@ -845,7 +845,7 @@ int netpoll_setup(struct netpoll *np)
|
||||
|
||||
kfree(npinfo);
|
||||
}
|
||||
|
||||
put:
|
||||
dev_put(ndev);
|
||||
return err;
|
||||
}
|
||||
|
@ -998,11 +998,11 @@ static struct inet_protosw dccp_v4_protosw = {
|
||||
|
||||
static int __net_init dccp_v4_init_net(struct net *net)
|
||||
{
|
||||
int err;
|
||||
if (dccp_hashinfo.bhash == NULL)
|
||||
return -ESOCKTNOSUPPORT;
|
||||
|
||||
err = inet_ctl_sock_create(&net->dccp.v4_ctl_sk, PF_INET,
|
||||
SOCK_DCCP, IPPROTO_DCCP, net);
|
||||
return err;
|
||||
return inet_ctl_sock_create(&net->dccp.v4_ctl_sk, PF_INET,
|
||||
SOCK_DCCP, IPPROTO_DCCP, net);
|
||||
}
|
||||
|
||||
static void __net_exit dccp_v4_exit_net(struct net *net)
|
||||
|
@ -1191,11 +1191,11 @@ static struct inet_protosw dccp_v6_protosw = {
|
||||
|
||||
static int __net_init dccp_v6_init_net(struct net *net)
|
||||
{
|
||||
int err;
|
||||
if (dccp_hashinfo.bhash == NULL)
|
||||
return -ESOCKTNOSUPPORT;
|
||||
|
||||
err = inet_ctl_sock_create(&net->dccp.v6_ctl_sk, PF_INET6,
|
||||
SOCK_DCCP, IPPROTO_DCCP, net);
|
||||
return err;
|
||||
return inet_ctl_sock_create(&net->dccp.v6_ctl_sk, PF_INET6,
|
||||
SOCK_DCCP, IPPROTO_DCCP, net);
|
||||
}
|
||||
|
||||
static void __net_exit dccp_v6_exit_net(struct net *net)
|
||||
|
@ -1036,7 +1036,7 @@ static int __init dccp_init(void)
|
||||
FIELD_SIZEOF(struct sk_buff, cb));
|
||||
rc = percpu_counter_init(&dccp_orphan_count, 0);
|
||||
if (rc)
|
||||
goto out;
|
||||
goto out_fail;
|
||||
rc = -ENOBUFS;
|
||||
inet_hashinfo_init(&dccp_hashinfo);
|
||||
dccp_hashinfo.bind_bucket_cachep =
|
||||
@ -1125,8 +1125,9 @@ static int __init dccp_init(void)
|
||||
goto out_sysctl_exit;
|
||||
|
||||
dccp_timestamping_init();
|
||||
out:
|
||||
return rc;
|
||||
|
||||
return 0;
|
||||
|
||||
out_sysctl_exit:
|
||||
dccp_sysctl_exit();
|
||||
out_ackvec_exit:
|
||||
@ -1135,18 +1136,19 @@ out_free_dccp_mib:
|
||||
dccp_mib_exit();
|
||||
out_free_dccp_bhash:
|
||||
free_pages((unsigned long)dccp_hashinfo.bhash, bhash_order);
|
||||
dccp_hashinfo.bhash = NULL;
|
||||
out_free_dccp_locks:
|
||||
inet_ehash_locks_free(&dccp_hashinfo);
|
||||
out_free_dccp_ehash:
|
||||
free_pages((unsigned long)dccp_hashinfo.ehash, ehash_order);
|
||||
dccp_hashinfo.ehash = NULL;
|
||||
out_free_bind_bucket_cachep:
|
||||
kmem_cache_destroy(dccp_hashinfo.bind_bucket_cachep);
|
||||
dccp_hashinfo.bind_bucket_cachep = NULL;
|
||||
out_free_percpu:
|
||||
percpu_counter_destroy(&dccp_orphan_count);
|
||||
goto out;
|
||||
out_fail:
|
||||
dccp_hashinfo.bhash = NULL;
|
||||
dccp_hashinfo.ehash = NULL;
|
||||
dccp_hashinfo.bind_bucket_cachep = NULL;
|
||||
return rc;
|
||||
}
|
||||
|
||||
static void __exit dccp_fini(void)
|
||||
|
@ -932,10 +932,8 @@ static void rt_secret_rebuild_oneshot(struct net *net)
|
||||
{
|
||||
del_timer_sync(&net->ipv4.rt_secret_timer);
|
||||
rt_cache_invalidate(net);
|
||||
if (ip_rt_secret_interval) {
|
||||
net->ipv4.rt_secret_timer.expires += ip_rt_secret_interval;
|
||||
add_timer(&net->ipv4.rt_secret_timer);
|
||||
}
|
||||
if (ip_rt_secret_interval)
|
||||
mod_timer(&net->ipv4.rt_secret_timer, jiffies + ip_rt_secret_interval);
|
||||
}
|
||||
|
||||
static void rt_emergency_hash_rebuild(struct net *net)
|
||||
@ -3103,22 +3101,20 @@ static void rt_secret_reschedule(int old)
|
||||
rtnl_lock();
|
||||
for_each_net(net) {
|
||||
int deleted = del_timer_sync(&net->ipv4.rt_secret_timer);
|
||||
long time;
|
||||
|
||||
if (!new)
|
||||
continue;
|
||||
|
||||
if (deleted) {
|
||||
long time = net->ipv4.rt_secret_timer.expires - jiffies;
|
||||
time = net->ipv4.rt_secret_timer.expires - jiffies;
|
||||
|
||||
if (time <= 0 || (time += diff) <= 0)
|
||||
time = 0;
|
||||
|
||||
net->ipv4.rt_secret_timer.expires = time;
|
||||
} else
|
||||
net->ipv4.rt_secret_timer.expires = new;
|
||||
time = new;
|
||||
|
||||
net->ipv4.rt_secret_timer.expires += jiffies;
|
||||
add_timer(&net->ipv4.rt_secret_timer);
|
||||
mod_timer(&net->ipv4.rt_secret_timer, jiffies + time);
|
||||
}
|
||||
rtnl_unlock();
|
||||
}
|
||||
|
@ -107,8 +107,7 @@ static void phonet_device_destroy(struct net_device *dev)
|
||||
if (pnd) {
|
||||
u8 addr;
|
||||
|
||||
for (addr = find_first_bit(pnd->addrs, 64); addr < 64;
|
||||
addr = find_next_bit(pnd->addrs, 64, 1+addr))
|
||||
for_each_set_bit(addr, pnd->addrs, 64)
|
||||
phonet_address_notify(RTM_DELADDR, dev, addr);
|
||||
kfree(pnd);
|
||||
}
|
||||
|
@ -141,8 +141,7 @@ static int getaddr_dumpit(struct sk_buff *skb, struct netlink_callback *cb)
|
||||
continue;
|
||||
|
||||
addr_idx = 0;
|
||||
for (addr = find_first_bit(pnd->addrs, 64); addr < 64;
|
||||
addr = find_next_bit(pnd->addrs, 64, 1+addr)) {
|
||||
for_each_set_bit(addr, pnd->addrs, 64) {
|
||||
if (addr_idx++ < addr_start_idx)
|
||||
continue;
|
||||
|
||||
|
@ -153,11 +153,11 @@ void tipc_ref_table_stop(void)
|
||||
|
||||
u32 tipc_ref_acquire(void *object, spinlock_t **lock)
|
||||
{
|
||||
struct reference *entry;
|
||||
u32 index;
|
||||
u32 index_mask;
|
||||
u32 next_plus_upper;
|
||||
u32 ref;
|
||||
struct reference *entry = NULL;
|
||||
|
||||
if (!object) {
|
||||
err("Attempt to acquire reference to non-existent object\n");
|
||||
@ -175,30 +175,36 @@ u32 tipc_ref_acquire(void *object, spinlock_t **lock)
|
||||
index = tipc_ref_table.first_free;
|
||||
entry = &(tipc_ref_table.entries[index]);
|
||||
index_mask = tipc_ref_table.index_mask;
|
||||
/* take lock in case a previous user of entry still holds it */
|
||||
spin_lock_bh(&entry->lock);
|
||||
next_plus_upper = entry->ref;
|
||||
tipc_ref_table.first_free = next_plus_upper & index_mask;
|
||||
ref = (next_plus_upper & ~index_mask) + index;
|
||||
entry->ref = ref;
|
||||
entry->object = object;
|
||||
*lock = &entry->lock;
|
||||
}
|
||||
else if (tipc_ref_table.init_point < tipc_ref_table.capacity) {
|
||||
index = tipc_ref_table.init_point++;
|
||||
entry = &(tipc_ref_table.entries[index]);
|
||||
spin_lock_init(&entry->lock);
|
||||
spin_lock_bh(&entry->lock);
|
||||
ref = tipc_ref_table.start_mask + index;
|
||||
entry->ref = ref;
|
||||
entry->object = object;
|
||||
*lock = &entry->lock;
|
||||
}
|
||||
else {
|
||||
ref = 0;
|
||||
}
|
||||
write_unlock_bh(&ref_table_lock);
|
||||
|
||||
/*
|
||||
* Grab the lock so no one else can modify this entry
|
||||
* While we assign its ref value & object pointer
|
||||
*/
|
||||
if (entry) {
|
||||
spin_lock_bh(&entry->lock);
|
||||
entry->ref = ref;
|
||||
entry->object = object;
|
||||
*lock = &entry->lock;
|
||||
/*
|
||||
* keep it locked, the caller is responsible
|
||||
* for unlocking this when they're done with it
|
||||
*/
|
||||
}
|
||||
|
||||
return ref;
|
||||
}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user