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Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus

Browse Source 
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  [MIPS] MTX1: clear PCI errors
  [MIPS] MTX1: add idsel cardbus ressources
  [MIPS] MTX1: remove unneeded settings
  [MIPS] dma_sync_sg_for_cpu is a no-op except for non-coherent R10000s.
  [MIPS] Cobalt: update reserved resources
  [MIPS] SN: PCI fixup needs to include <irq.h>.
  [MIPS] DMA: Fix a bunch of warnings due to missing inline keywords.
  [MIPS] RM: It should be #ifdef CONFIG_FOO not #if CONFIG_FOO ...
  [MIPS] Fix and cleanup the mess that a dozen prom_printf variants are.
  [MIPS] DEC: Remove redeclarations of mips_machgroup and mips_machtype.
  [MIPS] No need to write c0_compare in plat_timer_setup
  [MIPS] Convert to RTC-class ds1742 driver
  [MIPS] Oprofile: Add missing break statements.
  [MIPS] jmr3927: build fix
  [MIPS] SNI: Fix mc146818_decode_year
  [MIPS] Replace sys32_timer_create with the generic compat_sys_timer_create.
  [MIPS] Replace sys32_socketcall with the generic compat_sys_socketcall.
  [MIPS] N32 waitid is the same as o32.
This commit is contained in:
Linus Torvalds 2007-03-04 13:15:00 -08:00
commit 2c89a8d09f
73 changed files with 430 additions and 1022 deletions
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35
arch/mips/Kconfig
View File

@ -176,7 +176,7 @@ config MACH_DECSTATION
bool "DECstations"
select BOOT_ELF32
select DMA_NONCOHERENT
select EARLY_PRINTK
select SYS_HAS_EARLY_PRINTK
select IRQ_CPU
select SYS_HAS_CPU_R3000
select SYS_HAS_CPU_R4X00
@ -242,6 +242,7 @@ config MACH_JAZZ
config LASAT
bool "LASAT Networks platforms"
select DMA_NONCOHERENT
select SYS_HAS_EARLY_PRINTK
select HW_HAS_PCI
select MIPS_GT64120
select MIPS_NILE4
@ -256,6 +257,7 @@ config MIPS_ATLAS
bool "MIPS Atlas board"
select BOOT_ELF32
select DMA_NONCOHERENT
select SYS_HAS_EARLY_PRINTK
select IRQ_CPU
select HW_HAS_PCI
select MIPS_BOARDS_GEN
@ -301,6 +303,7 @@ config MIPS_MALTA
select SYS_HAS_CPU_MIPS64_R1
select SYS_HAS_CPU_NEVADA
select SYS_HAS_CPU_RM7000
select SYS_HAS_EARLY_PRINTK
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
@ -316,6 +319,7 @@ config MIPS_SEAD
depends on EXPERIMENTAL
select IRQ_CPU
select DMA_NONCOHERENT
select SYS_HAS_EARLY_PRINTK
select MIPS_BOARDS_GEN
select SYS_HAS_CPU_MIPS32_R1
select SYS_HAS_CPU_MIPS32_R2
@ -353,9 +357,11 @@ config WR_PPMC
config MIPS_SIM
bool 'MIPS simulator (MIPSsim)'
select DMA_NONCOHERENT
select SYS_HAS_EARLY_PRINTK
select IRQ_CPU
select SYS_HAS_CPU_MIPS32_R1
select SYS_HAS_CPU_MIPS32_R2
select SYS_HAS_EARLY_PRINTK
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_LITTLE_ENDIAN
@ -376,6 +382,7 @@ config MOMENCO_JAGUAR_ATX
select RM7000_CPU_SCACHE
select SWAP_IO_SPACE
select SYS_HAS_CPU_RM9000
select SYS_HAS_EARLY_PRINTK
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
@ -513,6 +520,7 @@ config PMC_YOSEMITE
select IRQ_CPU_RM9K
select SWAP_IO_SPACE
select SYS_HAS_CPU_RM9000
select SYS_HAS_EARLY_PRINTK
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
@ -573,6 +581,7 @@ config SGI_IP22
select SWAP_IO_SPACE
select SYS_HAS_CPU_R4X00
select SYS_HAS_CPU_R5000
select SYS_HAS_EARLY_PRINTK
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
@ -587,7 +596,7 @@ config SGI_IP27
select ARC64
select BOOT_ELF64
select DMA_IP27
select EARLY_PRINTK
select SYS_HAS_EARLY_PRINTK
select HW_HAS_PCI
select NR_CPUS_DEFAULT_64
select PCI_DOMAINS
@ -749,6 +758,7 @@ config SNI_RM
select SYS_HAS_CPU_R5000
select SYS_HAS_CPU_R10000
select R5000_CPU_SCACHE
select SYS_HAS_EARLY_PRINTK
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
select SYS_SUPPORTS_BIG_ENDIAN
@ -897,6 +907,20 @@ config DMA_NEED_PCI_MAP_STATE
bool
config EARLY_PRINTK
bool "Early printk" if EMBEDDED && DEBUG_KERNEL
depends on SYS_HAS_EARLY_PRINTK
default y
help
This option enables special console drivers which allow the kernel
to print messages very early in the bootup process.
This is useful for kernel debugging when your machine crashes very
early before the console code is initialized. For normal operation
it is not recommended because it looks on some machines ugly and
oesn't cooperate with an X server. You should normally N here,
unless you want to debug such a crash.
config SYS_HAS_EARLY_PRINTK
bool
config GENERIC_ISA_DMA
@ -1033,6 +1057,7 @@ config SOC_PNX8550
select DMA_NONCOHERENT
select HW_HAS_PCI
select SYS_HAS_CPU_MIPS32_R1
select SYS_HAS_EARLY_PRINTK
select SYS_SUPPORTS_32BIT_KERNEL
select GENERIC_HARDIRQS_NO__DO_IRQ
select SYS_SUPPORTS_KGDB
@ -1093,7 +1118,7 @@ config HAVE_STD_PC_SERIAL_PORT
config ARC_CONSOLE
bool "ARC console support"
depends on SGI_IP22 || SNI_RM
depends on SGI_IP22 || (SNI_RM && CPU_LITTLE_ENDIAN)
config ARC_MEMORY
bool
@ -1895,10 +1920,6 @@ config HZ
source "kernel/Kconfig.preempt"
config RTC_DS1742
bool "DS1742 BRAM/RTC support"
depends on TOSHIBA_JMR3927 || TOSHIBA_RBTX4927
config MIPS_INSANE_LARGE
bool "Support for large 64-bit configurations"
depends on CPU_R10000 && 64BIT

32
arch/mips/arc/console.c
View File

@ -29,35 +29,3 @@ void prom_putchar(char c)
ArcWrite(1, &it, 1, &cnt);
bc_enable();
}
char prom_getchar(void)
{
ULONG cnt;
CHAR c;
bc_disable();
ArcRead(0, &c, 1, &cnt);
bc_enable();
return c;
}
void prom_printf(char *fmt, ...)
{
va_list args;
char ppbuf[1024];
char *bptr;
va_start(args, fmt);
vsprintf(ppbuf, fmt, args);
bptr = ppbuf;
while (*bptr != 0) {
if (*bptr == '\n')
prom_putchar('\r');
prom_putchar(*bptr++);
}
va_end(args);
}

9
arch/mips/arc/init.c
View File

@ -24,12 +24,15 @@ void __init prom_init(void)
{
PSYSTEM_PARAMETER_BLOCK pb = PROMBLOCK;
romvec = ROMVECTOR;
ULONG cnt;
CHAR c;
prom_argc = fw_arg0;
_prom_argv = (LONG *) fw_arg1;
_prom_envp = (LONG *) fw_arg2;
if (pb->magic != 0x53435241) {
prom_printf("Aieee, bad prom vector magic %08lx\n", pb->magic);
printk(KERN_CRIT "Aieee, bad prom vector magic %08lx\n", pb->magic);
while(1)
;
}
@ -41,8 +44,8 @@ void __init prom_init(void)
prom_meminit();
#ifdef DEBUG_PROM_INIT
prom_printf("Press a key to reboot\n");
prom_getchar();
pr_info("Press a key to reboot\n");
ArcRead(0, &c, 1, &cnt);
ArcEnterInteractiveMode();
#endif
}

6
arch/mips/arc/memory.c
View File

@ -118,11 +118,11 @@ void __init prom_meminit(void)
#ifdef DEBUG
int i = 0;
prom_printf("ARCS MEMORY DESCRIPTOR dump:\n");
printk("ARCS MEMORY DESCRIPTOR dump:\n");
p = ArcGetMemoryDescriptor(PROM_NULL_MDESC);
while(p) {
prom_printf("[%d,%p]: base<%08lx> pages<%08lx> type<%s>\n",
i, p, p->base, p->pages, mtypes(p->type));
printk("[%d,%p]: base<%08lx> pages<%08lx> type<%s>\n",
i, p, p->base, p->pages, mtypes(p->type));
p = ArcGetMemoryDescriptor(p);
i++;
}

10
arch/mips/arc/tree.c
View File

@ -93,11 +93,11 @@ static char *iflags[] = {
static void __init
dump_component(pcomponent *p)
{
prom_printf("[%p]:class<%s>type<%s>flags<%s>ver<%d>rev<%d>",
p, classes[p->class], types[p->type],
iflags[p->iflags], p->vers, p->rev);
prom_printf("key<%08lx>\n\tamask<%08lx>cdsize<%d>ilen<%d>iname<%s>\n",
p->key, p->amask, (int)p->cdsize, (int)p->ilen, p->iname);
printk("[%p]:class<%s>type<%s>flags<%s>ver<%d>rev<%d>",
p, classes[p->class], types[p->type],
iflags[p->iflags], p->vers, p->rev);
printk("key<%08lx>\n\tamask<%08lx>cdsize<%d>ilen<%d>iname<%s>\n",
p->key, p->amask, (int)p->cdsize, (int)p->ilen, p->iname);
}
static void __init

33
arch/mips/au1000/mtx-1/board_setup.c
View File

@ -43,6 +43,9 @@
#include <asm/pgtable.h>
#include <asm/mach-au1x00/au1000.h>
extern int (*board_pci_idsel)(unsigned int devsel, int assert);
int mtx1_pci_idsel(unsigned int devsel, int assert);
void board_reset (void)
{
/* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
@ -66,19 +69,43 @@ void __init board_setup(void)
#endif
// initialize sys_pinfunc:
// disable second ethernet port (SYS_PF_NI2)
// set U3/GPIO23 to GPIO23 (SYS_PF_U3)
au_writel( SYS_PF_NI2 | SYS_PF_U3, SYS_PINFUNC );
au_writel( SYS_PF_NI2, SYS_PINFUNC );
// initialize GPIO
au_writel( 0xFFFFFFFF, SYS_TRIOUTCLR );
au_writel( 0x00000001, SYS_OUTPUTCLR ); // set M66EN (PCI 66MHz) to OFF
au_writel( 0x00000008, SYS_OUTPUTSET ); // set PCI CLKRUN# to OFF
au_writel( 0x00000002, SYS_OUTPUTSET ); // set EXT_IO3 ON
au_writel( 0x00000020, SYS_OUTPUTCLR ); // set eth PHY TX_ER to OFF
// enable LED and set it to green
au_writel( au_readl(GPIO2_DIR) | 0x1800, GPIO2_DIR );
au_writel( 0x18000800, GPIO2_OUTPUT );
board_pci_idsel = mtx1_pci_idsel;
printk("4G Systems MTX-1 Board\n");
}
int
mtx1_pci_idsel(unsigned int devsel, int assert)
{
#define MTX_IDSEL_ONLY_0_AND_3 0
#if MTX_IDSEL_ONLY_0_AND_3
if (devsel != 0 && devsel != 3) {
printk("*** not 0 or 3\n");
return 0;
}
#endif
if (assert && devsel != 0) {
// supress signal to cardbus
au_writel( 0x00000002, SYS_OUTPUTCLR ); // set EXT_IO3 OFF
}
else {
au_writel( 0x00000002, SYS_OUTPUTSET ); // set EXT_IO3 ON
}
au_sync_udelay(1);
return 1;
}

2
arch/mips/au1000/mtx-1/irqmap.c
View File

@ -48,7 +48,7 @@
#include <asm/mach-au1x00/au1000.h>
char irq_tab_alchemy[][5] __initdata = {
[0] = { -1, INTA, INTB, INTX, INTX}, /* IDSEL 00 - AdapterA-Slot0 (top) */
[0] = { -1, INTA, INTA, INTX, INTX}, /* IDSEL 00 - AdapterA-Slot0 (top) */
[1] = { -1, INTB, INTA, INTX, INTX}, /* IDSEL 01 - AdapterA-Slot1 (bottom) */
[2] = { -1, INTC, INTD, INTX, INTX}, /* IDSEL 02 - AdapterB-Slot0 (top) */
[3] = { -1, INTD, INTC, INTX, INTX}, /* IDSEL 03 - AdapterB-Slot1 (bottom) */

26
arch/mips/cobalt/console.c
View File

@ -19,29 +19,3 @@ static void putchar(int c)
COBALT_UART[UART_TX] = c;
}
static void cons_write(struct console *c, const char *s, unsigned n)
{
while(n-- && *s)
putchar(*s++);
}
static struct console cons_info =
{
.name = "uart",
.write = cons_write,
.flags = CON_PRINTBUFFER | CON_BOOT,
.index = -1,
};
void __init cobalt_early_console(void)
{
register_console(&cons_info);
printk("Cobalt: early console registered\n");
}
void __init disable_early_printk(void)
{
unregister_console(&cons_info);
}

51
arch/mips/cobalt/setup.c
View File

@ -79,37 +79,38 @@ static struct resource cobalt_io_resource = {
.flags = IORESOURCE_IO
};
static struct resource cobalt_io_resources[] = {
{
/*
* Cobalt doesn't have PS/2 keyboard/mouse interfaces,
* keyboard conntroller is never used.
* Also PCI-ISA bridge DMA contoroller is never used.
*/
static struct resource cobalt_reserved_resources[] = {
{ /* dma1 */
.start = 0x00,
.end = 0x1f,
.name = "dma1",
.flags = IORESOURCE_BUSY
}, {
.start = 0x40,
.end = 0x5f,
.name = "timer",
.flags = IORESOURCE_BUSY
}, {
.name = "reserved",
.flags = IORESOURCE_BUSY | IORESOURCE_IO,
},
{ /* keyboard */
.start = 0x60,
.end = 0x6f,
.name = "keyboard",
.flags = IORESOURCE_BUSY
}, {
.name = "reserved",
.flags = IORESOURCE_BUSY | IORESOURCE_IO,
},
{ /* dma page reg */
.start = 0x80,
.end = 0x8f,
.name = "dma page reg",
.flags = IORESOURCE_BUSY
}, {
.name = "reserved",
.flags = IORESOURCE_BUSY | IORESOURCE_IO,
},
{ /* dma2 */
.start = 0xc0,
.end = 0xdf,
.name = "dma2",
.flags = IORESOURCE_BUSY
.name = "reserved",
.flags = IORESOURCE_BUSY | IORESOURCE_IO,
},
};
#define COBALT_IO_RESOURCES (sizeof(cobalt_io_resources)/sizeof(struct resource))
static struct pci_controller cobalt_pci_controller = {
.pci_ops = &gt64111_pci_ops,
.mem_resource = &cobalt_mem_resource,
@ -133,9 +134,9 @@ void __init plat_mem_setup(void)
/* I/O port resource must include LCD/buttons */
ioport_resource.end = 0x0fffffff;
/* request I/O space for devices used on all i[345]86 PCs */
for (i = 0; i < COBALT_IO_RESOURCES; i++)
request_resource(&ioport_resource, cobalt_io_resources + i);
/* These resources have been reserved by VIA SuperI/O chip. */
for (i = 0; i < ARRAY_SIZE(cobalt_reserved_resources); i++)
request_resource(&ioport_resource, cobalt_reserved_resources + i);
/* Read the cobalt id register out of the PCI config space */
PCI_CFG_SET(devfn, (VIA_COBALT_BRD_ID_REG & ~0x3));
@ -150,10 +151,6 @@ void __init plat_mem_setup(void)
#endif
if (cobalt_board_id > COBALT_BRD_ID_RAQ1) {
#ifdef CONFIG_EARLY_PRINTK
cobalt_early_console();
#endif
#ifdef CONFIG_SERIAL_8250
uart.line = 0;
uart.type = PORT_UNKNOWN;

24
arch/mips/configs/jmr3927_defconfig
View File

@ -148,7 +148,6 @@ CONFIG_HZ=1000
CONFIG_PREEMPT_NONE=y
# CONFIG_PREEMPT_VOLUNTARY is not set
# CONFIG_PREEMPT is not set
CONFIG_RTC_DS1742=y
# CONFIG_KEXEC is not set
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_STACKTRACE_SUPPORT=y
@ -802,7 +801,28 @@ CONFIG_USB_ARCH_HAS_EHCI=y
#
# Real Time Clock
#
# CONFIG_RTC_CLASS is not set
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_HCTOSYS=y
CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
# CONFIG_RTC_DEBUG is not set
#
# RTC interfaces
#
CONFIG_RTC_INTF_SYSFS=y
CONFIG_RTC_INTF_PROC=y
CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
#
# RTC drivers
#
# CONFIG_RTC_DRV_DS1553 is not set
CONFIG_RTC_DRV_DS1742=y
# CONFIG_RTC_DRV_M48T86 is not set
# CONFIG_RTC_DRV_TEST is not set
# CONFIG_RTC_DRV_V3020 is not set
#
# DMA Engine support

40
arch/mips/dec/prom/console.c
View File

@ -16,40 +16,12 @@
#include <asm/dec/prom.h>
static void __init prom_console_write(struct console *con, const char *s,
unsigned int c)
void prom_putchar(char c)
{
static char sfmt[] __initdata = "%%%us";
char fmt[13];
char s[2];
snprintf(fmt, sizeof(fmt), sfmt, c);
prom_printf(fmt, s);
s[0] = c;
s[1] = '\0';
prom_printf( s);
}
static struct console promcons __initdata = {
.name = "prom",
.write = prom_console_write,
.flags = CON_PRINTBUFFER,
.index = -1,
};
static int promcons_output __initdata = 0;
void __init register_prom_console(void)
{
if (!promcons_output) {
promcons_output = 1;
register_console(&promcons);
}
}
void __init unregister_prom_console(void)
{
if (promcons_output) {
unregister_console(&promcons);
promcons_output = 0;
}
}
void disable_early_printk(void)
__attribute__((alias("unregister_prom_console")));

3
arch/mips/dec/prom/identify.c
View File

@ -26,9 +26,6 @@
#include "dectypes.h"
extern unsigned long mips_machgroup;
extern unsigned long mips_machtype;
static const char *dec_system_strings[] = {
[MACH_DSUNKNOWN] "unknown DECstation",
[MACH_DS23100] "DECstation 2100/3100",

5
arch/mips/gt64120/ev64120/promcon.c
View File

@ -24,11 +24,6 @@ static void prom_console_write(struct console *co, const char *s,
}
}
int prom_getchar(void)
{
return 0;
}
static struct console sercons = {
.name = "ttyS",
.write = prom_console_write,

2
arch/mips/jmr3927/common/Makefile
View File

@ -2,4 +2,4 @@
# Makefile for the common code of TOSHIBA JMR-TX3927 board
#
obj-y += prom.o puts.o rtc_ds1742.o
obj-y += prom.o puts.o

171
arch/mips/jmr3927/common/rtc_ds1742.c
View File

@ -1,171 +0,0 @@
/*
* Copyright 2001 MontaVista Software Inc.
* Author: MontaVista Software, Inc.
* ahennessy@mvista.com
*
* arch/mips/jmr3927/common/rtc_ds1742.c
* Based on arch/mips/ddb5xxx/common/rtc_ds1386.c
* low-level RTC hookups for s for Dallas 1742 chip.
*
* Copyright (C) 2000-2001 Toshiba Corporation
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
/*
* This file exports a function, rtc_ds1386_init(), which expects an
* uncached base address as the argument. It will set the two function
* pointers expected by the MIPS generic timer code.
*/
#include <linux/bcd.h>
#include <linux/types.h>
#include <linux/time.h>
#include <linux/rtc.h>
#include <linux/ds1742rtc.h>
#include <asm/time.h>
#include <asm/addrspace.h>
#include <asm/debug.h>
#define EPOCH 2000
static unsigned long rtc_base;
static unsigned long
rtc_ds1742_get_time(void)
{
unsigned int year, month, day, hour, minute, second;
unsigned int century;
unsigned long flags;
spin_lock_irqsave(&rtc_lock, flags);
rtc_write(RTC_READ, RTC_CONTROL);
second = BCD2BIN(rtc_read(RTC_SECONDS) & RTC_SECONDS_MASK);
minute = BCD2BIN(rtc_read(RTC_MINUTES));
hour = BCD2BIN(rtc_read(RTC_HOURS));
day = BCD2BIN(rtc_read(RTC_DATE));
month = BCD2BIN(rtc_read(RTC_MONTH));
year = BCD2BIN(rtc_read(RTC_YEAR));
century = BCD2BIN(rtc_read(RTC_CENTURY) & RTC_CENTURY_MASK);
rtc_write(0, RTC_CONTROL);
spin_unlock_irqrestore(&rtc_lock, flags);
year += century * 100;
return mktime(year, month, day, hour, minute, second);
}
extern void to_tm(unsigned long tim, struct rtc_time * tm);
static int
rtc_ds1742_set_time(unsigned long t)
{
struct rtc_time tm;
u8 year, month, day, hour, minute, second;
u8 cmos_year, cmos_month, cmos_day, cmos_hour, cmos_minute, cmos_second;
int cmos_century;
unsigned long flags;
spin_lock_irqsave(&rtc_lock, flags);
rtc_write(RTC_READ, RTC_CONTROL);
cmos_second = (u8)(rtc_read(RTC_SECONDS) & RTC_SECONDS_MASK);
cmos_minute = (u8)rtc_read(RTC_MINUTES);
cmos_hour = (u8)rtc_read(RTC_HOURS);
cmos_day = (u8)rtc_read(RTC_DATE);
cmos_month = (u8)rtc_read(RTC_MONTH);
cmos_year = (u8)rtc_read(RTC_YEAR);
cmos_century = rtc_read(RTC_CENTURY) & RTC_CENTURY_MASK;
rtc_write(RTC_WRITE, RTC_CONTROL);
/* convert */
to_tm(t, &tm);
/* check each field one by one */
year = BIN2BCD(tm.tm_year - EPOCH);
if (year != cmos_year) {
rtc_write(year,RTC_YEAR);
}
month = BIN2BCD(tm.tm_mon);
if (month != (cmos_month & 0x1f)) {
rtc_write((month & 0x1f) | (cmos_month & ~0x1f),RTC_MONTH);
}
day = BIN2BCD(tm.tm_mday);
if (day != cmos_day) {
rtc_write(day, RTC_DATE);
}
if (cmos_hour & 0x40) {
/* 12 hour format */
hour = 0x40;
if (tm.tm_hour > 12) {
hour |= 0x20 | (BIN2BCD(hour-12) & 0x1f);
} else {
hour |= BIN2BCD(tm.tm_hour);
}
} else {
/* 24 hour format */
hour = BIN2BCD(tm.tm_hour) & 0x3f;
}
if (hour != cmos_hour) rtc_write(hour, RTC_HOURS);
minute = BIN2BCD(tm.tm_min);
if (minute != cmos_minute) {
rtc_write(minute, RTC_MINUTES);
}
second = BIN2BCD(tm.tm_sec);
if (second != cmos_second) {
rtc_write(second & RTC_SECONDS_MASK,RTC_SECONDS);
}
/* RTC_CENTURY and RTC_CONTROL share same address... */
rtc_write(cmos_century, RTC_CONTROL);
spin_unlock_irqrestore(&rtc_lock, flags);
return 0;
}
void
rtc_ds1742_init(unsigned long base)
{
u8 cmos_second;
/* remember the base */
rtc_base = base;
db_assert((rtc_base & 0xe0000000) == KSEG1);
/* set the function pointers */
rtc_mips_get_time = rtc_ds1742_get_time;
rtc_mips_set_time = rtc_ds1742_set_time;
/* clear oscillator stop bit */
rtc_write(RTC_READ, RTC_CONTROL);
cmos_second = (u8)(rtc_read(RTC_SECONDS) & RTC_SECONDS_MASK);
rtc_write(RTC_WRITE, RTC_CONTROL);
rtc_write(cmos_second, RTC_SECONDS); /* clear msb */
rtc_write(0, RTC_CONTROL);
}

39
arch/mips/jmr3927/rbhma3100/setup.c
View File

@ -45,6 +45,7 @@
#include <linux/param.h> /* for HZ */
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/platform_device.h>
#ifdef CONFIG_SERIAL_TXX9
#include <linux/tty.h>
#include <linux/serial.h>
@ -172,19 +173,10 @@ static cycle_t jmr3927_hpt_read(void)
return jiffies * (JMR3927_TIMER_CLK / HZ) + jmr3927_tmrptr->trr;
}
#define USE_RTC_DS1742
#ifdef USE_RTC_DS1742
extern void rtc_ds1742_init(unsigned long base);
#endif
static void __init jmr3927_time_init(void)
{
clocksource_mips.read = jmr3927_hpt_read;
mips_hpt_frequency = JMR3927_TIMER_CLK;
#ifdef USE_RTC_DS1742
if (jmr3927_have_nvram()) {
rtc_ds1742_init(JMR3927_IOC_NVRAMB_ADDR);
}
#endif
}
void __init plat_timer_setup(struct irqaction *irq)
@ -540,3 +532,32 @@ void __init tx3927_setup(void)
printk("TX3927 D-Cache WriteBack (CWF) .\n");
}
}
/* This trick makes rtc-ds1742 driver usable as is. */
unsigned long __swizzle_addr_b(unsigned long port)
{
if ((port & 0xffff0000) != JMR3927_IOC_NVRAMB_ADDR)
return port;
port = (port & 0xffff0000) | (port & 0x7fff << 1);
#ifdef __BIG_ENDIAN
return port;
#else
return port | 1;
#endif
}
EXPORT_SYMBOL(__swizzle_addr_b);
static int __init jmr3927_rtc_init(void)
{
struct resource res = {
.start = JMR3927_IOC_NVRAMB_ADDR - IO_BASE,
.end = JMR3927_IOC_NVRAMB_ADDR - IO_BASE + 0x800 - 1,
.flags = IORESOURCE_MEM,
};
struct platform_device *dev;
if (!jmr3927_have_nvram())
return -ENODEV;
dev = platform_device_register_simple("ds1742", -1, &res, 1);
return IS_ERR(dev) ? PTR_ERR(dev) : 0;
}
device_initcall(jmr3927_rtc_init);

1
arch/mips/kernel/Makefile
View File

@ -65,5 +65,6 @@ obj-$(CONFIG_64BIT) += cpu-bugs64.o
obj-$(CONFIG_I8253) += i8253.o
obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
CFLAGS_cpu-bugs64.o = $(shell if $(CC) $(CFLAGS) -Wa,-mdaddi -c -o /dev/null -xc /dev/null >/dev/null 2>&1; then echo "-DHAVE_AS_SET_DADDI"; fi)

40
arch/mips/kernel/early_printk.c Normal file
View File

@ -0,0 +1,40 @@
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2002, 2003, 06, 07 Ralf Baechle (ralf@linux-mips.org)
* Copyright (C) 2007 MIPS Technologies, Inc.
* written by Ralf Baechle (ralf@linux-mips.org)
*/
#include <linux/console.h>
#include <linux/init.h>
extern void prom_putchar(char);
static void early_console_write(struct console *con, const char *s, unsigned n)
{
while (n-- && *s) {
if (*s == '\n')
prom_putchar('\r');
prom_putchar(*s);
s++;
}
}
static struct console early_console = {
.name = "early",
.write = early_console_write,
.flags = CON_PRINTBUFFER | CON_BOOT,
.index = -1
};
void __init setup_early_printk(void)
{
register_console(&early_console);
}
void __init disable_early_printk(void)
{
unregister_console(&early_console);
}

173
arch/mips/kernel/linux32.c
View File

@ -166,34 +166,6 @@ out:
return error;
}
asmlinkage long
sysn32_waitid(int which, compat_pid_t pid,
siginfo_t __user *uinfo, int options,
struct compat_rusage __user *uru)
{
struct rusage ru;
long ret;
mm_segment_t old_fs = get_fs();
int si_signo;
if (!access_ok(VERIFY_WRITE, uinfo, sizeof(*uinfo)))
return -EFAULT;
set_fs (KERNEL_DS);
ret = sys_waitid(which, pid, uinfo, options,
uru ? (struct rusage __user *) &ru : NULL);
set_fs (old_fs);
if (__get_user(si_signo, &uinfo->si_signo))
return -EFAULT;
if (ret < 0 || si_signo == 0)
return ret;
if (uru)
ret = put_compat_rusage(&ru, uru);
return ret;
}
#define RLIM_INFINITY32 0x7fffffff
#define RESOURCE32(x) ((x > RLIM_INFINITY32) ? RLIM_INFINITY32 : x)
@ -572,151 +544,6 @@ asmlinkage long sys32_sync_file_range(int fd, int __pad,
flags);
}
/* Argument list sizes for sys_socketcall */
#define AL(x) ((x) * sizeof(unsigned int))
static unsigned char socketcall_nargs[18]={AL(0),AL(3),AL(3),AL(3),AL(2),AL(3),
AL(3),AL(3),AL(4),AL(4),AL(4),AL(6),
AL(6),AL(2),AL(5),AL(5),AL(3),AL(3)};
#undef AL
/*
* System call vectors.
*
* Argument checking cleaned up. Saved 20% in size.
* This function doesn't need to set the kernel lock because
* it is set by the callees.
*/
asmlinkage long sys32_socketcall(int call, unsigned int __user *args32)
{
unsigned int a[6];
unsigned int a0,a1;
int err;
extern asmlinkage long sys_socket(int family, int type, int protocol);
extern asmlinkage long sys_bind(int fd, struct sockaddr __user *umyaddr, int addrlen);
extern asmlinkage long sys_connect(int fd, struct sockaddr __user *uservaddr, int addrlen);
extern asmlinkage long sys_listen(int fd, int backlog);
extern asmlinkage long sys_accept(int fd, struct sockaddr __user *upeer_sockaddr, int __user *upeer_addrlen);
extern asmlinkage long sys_getsockname(int fd, struct sockaddr __user *usockaddr, int __user *usockaddr_len);
extern asmlinkage long sys_getpeername(int fd, struct sockaddr __user *usockaddr, int __user *usockaddr_len);
extern asmlinkage long sys_socketpair(int family, int type, int protocol, int __user *usockvec);
extern asmlinkage long sys_send(int fd, void __user * buff, size_t len, unsigned flags);
extern asmlinkage long sys_sendto(int fd, void __user * buff, size_t len, unsigned flags,
struct sockaddr __user *addr, int addr_len);
extern asmlinkage long sys_recv(int fd, void __user * ubuf, size_t size, unsigned flags);
extern asmlinkage long sys_recvfrom(int fd, void __user * ubuf, size_t size, unsigned flags,
struct sockaddr __user *addr, int __user *addr_len);
extern asmlinkage long sys_shutdown(int fd, int how);
extern asmlinkage long sys_setsockopt(int fd, int level, int optname, char __user *optval, int optlen);
extern asmlinkage long sys_getsockopt(int fd, int level, int optname, char __user *optval, int __user *optlen);
extern asmlinkage long sys_sendmsg(int fd, struct msghdr __user *msg, unsigned flags);
extern asmlinkage long sys_recvmsg(int fd, struct msghdr __user *msg, unsigned int flags);
if(call<1||call>SYS_RECVMSG)
return -EINVAL;
/* copy_from_user should be SMP safe. */
if (copy_from_user(a, args32, socketcall_nargs[call]))
return -EFAULT;
a0=a[0];
a1=a[1];
switch(call)
{
case SYS_SOCKET:
err = sys_socket(a0,a1,a[2]);
break;
case SYS_BIND:
err = sys_bind(a0,(struct sockaddr __user *)A(a1), a[2]);
break;
case SYS_CONNECT:
err = sys_connect(a0, (struct sockaddr __user *)A(a1), a[2]);
break;
case SYS_LISTEN:
err = sys_listen(a0,a1);
break;
case SYS_ACCEPT:
err = sys_accept(a0,(struct sockaddr __user *)A(a1), (int __user *)A(a[2]));
break;
case SYS_GETSOCKNAME:
err = sys_getsockname(a0,(struct sockaddr __user *)A(a1), (int __user *)A(a[2]));
break;
case SYS_GETPEERNAME:
err = sys_getpeername(a0, (struct sockaddr __user *)A(a1), (int __user *)A(a[2]));
break;
case SYS_SOCKETPAIR:
err = sys_socketpair(a0,a1, a[2], (int __user *)A(a[3]));
break;
case SYS_SEND:
err = sys_send(a0, (void __user *)A(a1), a[2], a[3]);
break;
case SYS_SENDTO:
err = sys_sendto(a0,(void __user *)A(a1), a[2], a[3],
(struct sockaddr __user *)A(a[4]), a[5]);
break;
case SYS_RECV:
err = sys_recv(a0, (void __user *)A(a1), a[2], a[3]);
break;
case SYS_RECVFROM:
err = sys_recvfrom(a0, (void __user *)A(a1), a[2], a[3],
(struct sockaddr __user *)A(a[4]), (int __user *)A(a[5]));
break;
case SYS_SHUTDOWN:
err = sys_shutdown(a0,a1);
break;
case SYS_SETSOCKOPT:
err = sys_setsockopt(a0, a1, a[2], (char __user *)A(a[3]), a[4]);
break;
case SYS_GETSOCKOPT:
err = sys_getsockopt(a0, a1, a[2], (char __user *)A(a[3]), (int __user *)A(a[4]));
break;
case SYS_SENDMSG:
err = sys_sendmsg(a0, (struct msghdr __user *) A(a1), a[2]);
break;
case SYS_RECVMSG:
err = sys_recvmsg(a0, (struct msghdr __user *) A(a1), a[2]);
break;
default:
err = -EINVAL;
break;
}
return err;
}
struct sigevent32 {
u32 sigev_value;
u32 sigev_signo;
u32 sigev_notify;
u32 payload[(64 / 4) - 3];
};
extern asmlinkage long
sys_timer_create(clockid_t which_clock,
struct sigevent __user *timer_event_spec,
timer_t __user * created_timer_id);
long
sys32_timer_create(u32 clock, struct sigevent32 __user *se32, timer_t __user *timer_id)
{
struct sigevent __user *p = NULL;
if (se32) {
struct sigevent se;
p = compat_alloc_user_space(sizeof(struct sigevent));
memset(&se, 0, sizeof(struct sigevent));
if (get_user(se.sigev_value.sival_int, &se32->sigev_value) ||
__get_user(se.sigev_signo, &se32->sigev_signo) ||
__get_user(se.sigev_notify, &se32->sigev_notify) ||
__copy_from_user(&se._sigev_un._pad, &se32->payload,
sizeof(se32->payload)) ||
copy_to_user(p, &se, sizeof(se)))
return -EFAULT;
}
return sys_timer_create(clock, p, timer_id);
}
save_static_function(sys32_clone);
__attribute_used__ noinline static int
_sys32_clone(nabi_no_regargs struct pt_regs regs)

4
arch/mips/kernel/scall64-n32.S
View File

@ -340,7 +340,7 @@ EXPORT(sysn32_call_table)
PTR compat_sys_statfs64
PTR compat_sys_fstatfs64
PTR sys_sendfile64
PTR sys32_timer_create /* 6220 */
PTR compat_sys_timer_create /* 6220 */
PTR compat_sys_timer_settime
PTR compat_sys_timer_gettime
PTR sys_timer_getoverrun
@ -361,7 +361,7 @@ EXPORT(sysn32_call_table)
PTR compat_sys_mq_notify
PTR compat_sys_mq_getsetattr
PTR sys_ni_syscall /* 6240, sys_vserver */
PTR sysn32_waitid
PTR compat_sys_waitid
PTR sys_ni_syscall /* available, was setaltroot */
PTR sys_add_key
PTR sys_request_key

4
arch/mips/kernel/scall64-o32.S
View File

@ -307,7 +307,7 @@ sys_call_table:
PTR compat_sys_statfs
PTR compat_sys_fstatfs /* 4100 */
PTR sys_ni_syscall /* sys_ioperm */
PTR sys32_socketcall
PTR compat_sys_socketcall
PTR sys_syslog
PTR compat_sys_setitimer
PTR compat_sys_getitimer /* 4105 */
@ -462,7 +462,7 @@ sys_call_table:
PTR sys_fadvise64_64
PTR compat_sys_statfs64 /* 4255 */
PTR compat_sys_fstatfs64
PTR sys32_timer_create
PTR compat_sys_timer_create
PTR compat_sys_timer_settime
PTR compat_sys_timer_gettime
PTR sys_timer_getoverrun /* 4260 */

8
arch/mips/kernel/setup.c
View File

@ -525,6 +525,14 @@ void __init setup_arch(char **cmdline_p)
{
cpu_probe();
prom_init();
#ifdef CONFIG_EARLY_PRINTK
{
extern void setup_early_printk(void);
setup_early_printk();
}
#endif
cpu_report();
#if defined(CONFIG_VT)

13
arch/mips/lasat/lasat_board.c
View File

@ -110,12 +110,13 @@ int lasat_init_board_info(void)
sizeof(struct lasat_eeprom_struct) - 4);
if (crc != lasat_board_info.li_eeprom_info.crc32) {
prom_printf("WARNING...\nWARNING...\nEEPROM CRC does not match calculated, attempting to soldier on...\n");
printk(KERN_WARNING "WARNING...\nWARNING...\nEEPROM CRC does "
"not match calculated, attempting to soldier on...\n");
}
if (lasat_board_info.li_eeprom_info.version != LASAT_EEPROM_VERSION)
{
prom_printf("WARNING...\nWARNING...\nEEPROM version %d, wanted version %d, attempting to soldier on...\n",
if (lasat_board_info.li_eeprom_info.version != LASAT_EEPROM_VERSION) {
printk(KERN_WARNING "WARNING...\nWARNING...\nEEPROM version "
"%d, wanted version %d, attempting to soldier on...\n",
(unsigned int)lasat_board_info.li_eeprom_info.version,
LASAT_EEPROM_VERSION);
}
@ -124,7 +125,9 @@ int lasat_init_board_info(void)
cfg1 = lasat_board_info.li_eeprom_info.cfg[1];
if ( LASAT_W0_DSCTYPE(cfg0) != 1) {
prom_printf("WARNING...\nWARNING...\nInvalid configuration read from EEPROM, attempting to soldier on...");
printk(KERN_WARNING "WARNING...\nWARNING...\n"
"Invalid configuration read from EEPROM, attempting to "
"soldier on...");
}
/* We have a valid configuration */

47
arch/mips/lasat/prom.c
View File

@ -23,10 +23,6 @@
#define PROM_PUTC_ADDR PROM_JUMP_TABLE_ENTRY(1)
#define PROM_MONITOR_ADDR PROM_JUMP_TABLE_ENTRY(2)
static void null_prom_printf(const char * fmt, ...)
{
}
static void null_prom_display(const char *string, int pos, int clear)
{
}
@ -40,50 +36,29 @@ static void null_prom_putc(char c)
}
/* these are functions provided by the bootloader */
static void (* prom_putc)(char c) = null_prom_putc;
void (* prom_printf)(const char * fmt, ...) = null_prom_printf;
static void (* __prom_putc)(char c) = null_prom_putc;
void prom_putchar(char c)
{
__prom_putc(c);
}
void (* prom_display)(const char *string, int pos, int clear) =
null_prom_display;
void (* prom_monitor)(void) = null_prom_monitor;
unsigned int lasat_ndelay_divider;
#define PROM_PRINTFBUF_SIZE 256
static char prom_printfbuf[PROM_PRINTFBUF_SIZE];
static void real_prom_printf(const char * fmt, ...)
{
va_list ap;
int len;
char *c = prom_printfbuf;
int i;
va_start(ap, fmt);
len = vsnprintf(prom_printfbuf, PROM_PRINTFBUF_SIZE, fmt, ap);
va_end(ap);
/* output overflowed the buffer */
if (len < 0 || len > PROM_PRINTFBUF_SIZE)
len = PROM_PRINTFBUF_SIZE;
for (i=0; i < len; i++) {
if (*c == '\n')
prom_putc('\r');
prom_putc(*c++);
}
}
static void setup_prom_vectors(void)
{
u32 version = *(u32 *)(RESET_VECTOR + 0x90);
if (version >= 307) {
prom_display = (void *)PROM_DISPLAY_ADDR;
prom_putc = (void *)PROM_PUTC_ADDR;
prom_printf = real_prom_printf;
__prom_putc = (void *)PROM_PUTC_ADDR;
prom_monitor = (void *)PROM_MONITOR_ADDR;
}
prom_printf("prom vectors set up\n");
printk("prom vectors set up\n");
}
static struct at93c_defs at93c_defs[N_MACHTYPES] = {
@ -101,11 +76,11 @@ void __init prom_init(void)
setup_prom_vectors();
if (current_cpu_data.cputype == CPU_R5000) {
prom_printf("LASAT 200 board\n");
printk("LASAT 200 board\n");
mips_machtype = MACH_LASAT_200;
lasat_ndelay_divider = LASAT_200_DIVIDER;
} else {
prom_printf("LASAT 100 board\n");
printk("LASAT 100 board\n");
mips_machtype = MACH_LASAT_100;
lasat_ndelay_divider = LASAT_100_DIVIDER;
}

1
arch/mips/lasat/prom.h
View File

@ -2,5 +2,4 @@
#define PROM_H
extern void (* prom_display)(const char *string, int pos, int clear);
extern void (* prom_monitor)(void);
extern void (* prom_printf)(const char * fmt, ...);
#endif

3
arch/mips/lasat/setup.c
View File

@ -116,7 +116,6 @@ static void lasat_time_init(void)
void __init plat_timer_setup(struct irqaction *irq)
{
write_c0_compare( read_c0_count() + mips_hpt_frequency / HZ);
change_c0_status(ST0_IM, IE_IRQ0 | IE_IRQ5);
}
@ -179,5 +178,5 @@ void __init plat_mem_setup(void)
/* Switch from prom exception handler to normal mode */
change_c0_status(ST0_BEV,0);
prom_printf("Lasat specific initialization complete\n");
pr_info("Lasat specific initialization complete\n");
}

4
arch/mips/lib/Makefile
View File

@ -2,8 +2,8 @@
# Makefile for MIPS-specific library files..
#
lib-y += csum_partial.o memcpy.o memcpy-inatomic.o memset.o promlib.o \
strlen_user.o strncpy_user.o strnlen_user.o uncached.o
lib-y += csum_partial.o memcpy.o memcpy-inatomic.o memset.o strlen_user.o \
strncpy_user.o strnlen_user.o uncached.o
obj-y += iomap.o
obj-$(CONFIG_PCI) += iomap-pci.o

24
arch/mips/lib/promlib.c
View File

@ -1,24 +0,0 @@
#include <stdarg.h>
#include <linux/kernel.h>
extern void prom_putchar(char);
void prom_printf(char *fmt, ...)
{
va_list args;
char ppbuf[1024];
char *bptr;
va_start(args, fmt);
vsprintf(ppbuf, fmt, args);
bptr = ppbuf;
while (*bptr != 0) {
if (*bptr == '\n')
prom_putchar('\r');
prom_putchar(*bptr++);
}
va_end(args);
}

4
arch/mips/mips-boards/generic/Makefile
View File

@ -18,7 +18,9 @@
# Makefile for the MIPS boards generic routines under Linux.
#
obj-y := reset.o display.o init.o memory.o printf.o \
obj-y := reset.o display.o init.o memory.o \
cmdline.o time.o
obj-$(CONFIG_EARLY_PRINTK) += console.o
obj-$(CONFIG_PCI) += pci.o
obj-$(CONFIG_KGDB) += gdb_hook.o

12
arch/mips/mips-boards/generic/printf.c → arch/mips/mips-boards/generic/console.c
View File

@ -17,10 +17,9 @@
*
* Putting things on the screen/serial line using YAMONs facilities.
*/
#include <linux/console.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/serial_reg.h>
#include <linux/spinlock.h>
#include <asm/io.h>
#ifdef CONFIG_MIPS_ATLAS
@ -67,12 +66,3 @@ int prom_putchar(char c)
return 1;
}
char prom_getchar(void)
{
while (!(serial_in(UART_LSR) & UART_LSR_DR))
;
return serial_in(UART_RX);
}

9
arch/mips/mips-boards/generic/init.c
View File

@ -167,7 +167,7 @@ static void __init console_config(void)
flow = 'r';
sprintf (console_string, " console=ttyS0,%d%c%c%c", baud, parity, bits, flow);
strcat (prom_getcmdline(), console_string);
prom_printf("Config serial console:%s\n", console_string);
pr_info("Config serial console:%s\n", console_string);
}
}
#endif
@ -210,8 +210,9 @@ void __init kgdb_config (void)
generic_getDebugChar = rs_getDebugChar;
}
prom_printf("KGDB: Using serial line /dev/ttyS%d at %d for session, "
"please connect your debugger\n", line ? 1 : 0, speed);
pr_info("KGDB: Using serial line /dev/ttyS%d at %d for "
"session, please connect your debugger\n",
line ? 1 : 0, speed);
{
char *s;
@ -382,7 +383,7 @@ void __init prom_init(void)
board_nmi_handler_setup = mips_nmi_setup;
board_ejtag_handler_setup = mips_ejtag_setup;
prom_printf("\nLINUX started...\n");
pr_info("\nLINUX started...\n");
prom_init_cmdline();
prom_meminit();
#ifdef CONFIG_SERIAL_8250_CONSOLE

11
arch/mips/mips-boards/generic/memory.c
View File

@ -59,11 +59,12 @@ struct prom_pmemblock * __init prom_getmdesc(void)
/* otherwise look in the environment */
memsize_str = prom_getenv("memsize");
if (!memsize_str) {
prom_printf("memsize not set in boot prom, set to default (32Mb)\n");
printk(KERN_WARNING
"memsize not set in boot prom, set to default (32Mb)\n");
physical_memsize = 0x02000000;
} else {
#ifdef DEBUG
prom_printf("prom_memsize = %s\n", memsize_str);
pr_debug("prom_memsize = %s\n", memsize_str);
#endif
physical_memsize = simple_strtol(memsize_str, NULL, 0);
}
@ -141,12 +142,12 @@ void __init prom_meminit(void)
struct prom_pmemblock *p;
#ifdef DEBUG
prom_printf("YAMON MEMORY DESCRIPTOR dump:\n");
pr_debug("YAMON MEMORY DESCRIPTOR dump:\n");
p = prom_getmdesc();
while (p->size) {
int i = 0;
prom_printf("[%d,%p]: base<%08lx> size<%08lx> type<%s>\n",
i, p, p->base, p->size, mtypes[p->type]);
pr_debug("[%d,%p]: base<%08lx> size<%08lx> type<%s>\n",
i, p, p->base, p->size, mtypes[p->type]);
p++;
i++;
}

3
arch/mips/mips-boards/generic/time.c
View File

@ -295,7 +295,4 @@ void __init plat_timer_setup(struct irqaction *irq)
irq_desc[mips_cpu_timer_irq].status |= IRQ_PER_CPU;
set_irq_handler(mips_cpu_timer_irq, handle_percpu_irq);
#endif
/* to generate the first timer interrupt */
write_c0_compare (read_c0_count() + mips_hpt_frequency/HZ);
}

6
arch/mips/mips-boards/sim/Makefile
View File

@ -1,5 +1,7 @@
#
# Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
# Copyright (C) 2007 MIPS Technologies, Inc.
# written by Ralf Baechle (ralf@linux-mips.org)
#
# This program is free software; you can distribute it and/or modify it
# under the terms of the GNU General Public License (Version 2) as
@ -15,5 +17,7 @@
# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
#
obj-y := sim_setup.o sim_mem.o sim_time.o sim_printf.o sim_int.o sim_cmdline.o
obj-y := sim_setup.o sim_mem.o sim_time.o sim_int.o sim_cmdline.o
obj-$(CONFIG_EARLY_PRINTK) += sim_console.o
obj-$(CONFIG_SMP) += sim_smp.o

44
arch/mips/mips-boards/sim/sim_printf.c → arch/mips/mips-boards/sim/sim_console.c
View File

@ -1,7 +1,4 @@
/*
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
@ -15,14 +12,14 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
* Putting things on the screen/serial line using YAMONs facilities.
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
* Copyright (C) 2007 MIPS Technologies, Inc.
* written by Ralf Baechle
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/serial_reg.h>
#include <linux/spinlock.h>
#include <asm/io.h>
#include <asm/system.h>
static inline unsigned int serial_in(int offset)
{
@ -34,41 +31,10 @@ static inline void serial_out(int offset, int value)
outb(value, 0x3f8 + offset);
}
int putPromChar(char c)
void __init prom_putchar(char c)
{
while ((serial_in(UART_LSR) & UART_LSR_THRE) == 0)
;
serial_out(UART_TX, c);
return 1;
}
char getPromChar(void)
{
while (!(serial_in(UART_LSR) & 1))
;
return serial_in(UART_RX);
}
void prom_printf(char *fmt, ...)
{
va_list args;
int l;
char *p, *buf_end;
char buf[1024];
va_start(args, fmt);
l = vsprintf(buf, fmt, args); /* hopefully i < sizeof(buf) */
va_end(args);
buf_end = buf + l;
for (p = buf; p < buf_end; p++) {
/* Crude cr/nl handling is better than none */
if (*p == '\n')
putPromChar('\r');
putPromChar(*p);
}
}

2
arch/mips/mips-boards/sim/sim_mem.c
View File

@ -46,7 +46,7 @@ struct prom_pmemblock * __init prom_getmdesc(void)
unsigned int memsize;
memsize = 0x02000000;
prom_printf("Setting default memory size 0x%08x\n", memsize);
pr_info("Setting default memory size 0x%08x\n", memsize);
memset(mdesc, 0, sizeof(mdesc));

6
arch/mips/mips-boards/sim/sim_setup.c
View File

@ -55,7 +55,7 @@ void __init plat_mem_setup(void)
serial_init();
board_time_init = sim_time_init;
prom_printf("Linux started...\n");
pr_info("Linux started...\n");
#ifdef CONFIG_MIPS_MT_SMP
sanitize_tlb_entries();
@ -66,7 +66,7 @@ void prom_init(void)
{
set_io_port_base(0xbfd00000);
prom_printf("\nLINUX started...\n");
pr_info("\nLINUX started...\n");
prom_init_cmdline();
prom_meminit();
}
@ -91,7 +91,7 @@ static void __init serial_init(void)
s.timeout = 4;
if (early_serial_setup(&s) != 0) {
prom_printf(KERN_ERR "Serial setup failed!\n");
printk(KERN_ERR "Serial setup failed!\n");
}
#endif

3
arch/mips/mips-boards/sim/sim_time.c
View File

@ -199,7 +199,4 @@ void __init plat_timer_setup(struct irqaction *irq)
irq_desc[mips_cpu_timer_irq].flags |= IRQ_PER_CPU;
set_irq_handler(mips_cpu_timer_irq, handle_percpu_irq);
#endif
/* to generate the first timer interrupt */
write_c0_compare(read_c0_count() + (mips_hpt_frequency/HZ));
}

124
arch/mips/mm/cerr-sb1.c
View File

@ -77,66 +77,66 @@ static uint32_t extract_dc(unsigned short addr, int data);
static inline void breakout_errctl(unsigned int val)
{
if (val & CP0_ERRCTL_RECOVERABLE)
prom_printf(" recoverable");
printk(" recoverable");
if (val & CP0_ERRCTL_DCACHE)
prom_printf(" dcache");
printk(" dcache");
if (val & CP0_ERRCTL_ICACHE)
prom_printf(" icache");
printk(" icache");
if (val & CP0_ERRCTL_MULTIBUS)
prom_printf(" multiple-buserr");
prom_printf("\n");
printk(" multiple-buserr");
printk("\n");
}
static inline void breakout_cerri(unsigned int val)
{
if (val & CP0_CERRI_TAG_PARITY)
prom_printf(" tag-parity");
printk(" tag-parity");
if (val & CP0_CERRI_DATA_PARITY)
prom_printf(" data-parity");
printk(" data-parity");
if (val & CP0_CERRI_EXTERNAL)
prom_printf(" external");
prom_printf("\n");
printk(" external");
printk("\n");
}
static inline void breakout_cerrd(unsigned int val)
{
switch (val & CP0_CERRD_CAUSES) {
case CP0_CERRD_LOAD:
prom_printf(" load,");
printk(" load,");
break;
case CP0_CERRD_STORE:
prom_printf(" store,");
printk(" store,");
break;
case CP0_CERRD_FILLWB:
prom_printf(" fill/wb,");
printk(" fill/wb,");
break;
case CP0_CERRD_COHERENCY:
prom_printf(" coherency,");
printk(" coherency,");
break;
case CP0_CERRD_DUPTAG:
prom_printf(" duptags,");
printk(" duptags,");
break;
default:
prom_printf(" NO CAUSE,");
printk(" NO CAUSE,");
break;
}
if (!(val & CP0_CERRD_TYPES))
prom_printf(" NO TYPE");
printk(" NO TYPE");
else {
if (val & CP0_CERRD_MULTIPLE)
prom_printf(" multi-err");
printk(" multi-err");
if (val & CP0_CERRD_TAG_STATE)
prom_printf(" tag-state");
printk(" tag-state");
if (val & CP0_CERRD_TAG_ADDRESS)
prom_printf(" tag-address");
printk(" tag-address");
if (val & CP0_CERRD_DATA_SBE)
prom_printf(" data-SBE");
printk(" data-SBE");
if (val & CP0_CERRD_DATA_DBE)
prom_printf(" data-DBE");
printk(" data-DBE");
if (val & CP0_CERRD_EXTERNAL)
prom_printf(" external");
printk(" external");
}
prom_printf("\n");
printk("\n");
}
#ifndef CONFIG_SIBYTE_BUS_WATCHER
@ -157,18 +157,18 @@ static void check_bus_watcher(void)
l2_tag = in64(IO_SPACE_BASE | A_L2_ECC_TAG);
#endif
memio_err = csr_in32(IOADDR(A_BUS_MEM_IO_ERRORS));
prom_printf("Bus watcher error counters: %08x %08x\n", l2_err, memio_err);
prom_printf("\nLast recorded signature:\n");
prom_printf("Request %02x from %d, answered by %d with Dcode %d\n",
printk("Bus watcher error counters: %08x %08x\n", l2_err, memio_err);
printk("\nLast recorded signature:\n");
printk("Request %02x from %d, answered by %d with Dcode %d\n",
(unsigned int)(G_SCD_BERR_TID(status) & 0x3f),
(int)(G_SCD_BERR_TID(status) >> 6),
(int)G_SCD_BERR_RID(status),
(int)G_SCD_BERR_DCODE(status));
#ifdef DUMP_L2_ECC_TAG_ON_ERROR
prom_printf("Last L2 tag w/ bad ECC: %016llx\n", l2_tag);
printk("Last L2 tag w/ bad ECC: %016llx\n", l2_tag);
#endif
} else {
prom_printf("Bus watcher indicates no error\n");
printk("Bus watcher indicates no error\n");
}
}
#else
@ -187,11 +187,11 @@ asmlinkage void sb1_cache_error(void)
#else
csr_out32(M_SCD_TRACE_CFG_FREEZE, IO_SPACE_BASE | A_SCD_TRACE_CFG);
#endif
prom_printf("Trace buffer frozen\n");
printk("Trace buffer frozen\n");
#endif
prom_printf("Cache error exception on CPU %x:\n",
(read_c0_prid() >> 25) & 0x7);
printk("Cache error exception on CPU %x:\n",
(read_c0_prid() >> 25) & 0x7);
__asm__ __volatile__ (
" .set push\n\t"
@ -209,43 +209,43 @@ asmlinkage void sb1_cache_error(void)
"=r" (dpahi), "=r" (dpalo), "=r" (eepc));
cerr_dpa = (((uint64_t)dpahi) << 32) | dpalo;
prom_printf(" c0_errorepc == %08x\n", eepc);
prom_printf(" c0_errctl == %08x", errctl);
printk(" c0_errorepc == %08x\n", eepc);
printk(" c0_errctl == %08x", errctl);
breakout_errctl(errctl);
if (errctl & CP0_ERRCTL_ICACHE) {
prom_printf(" c0_cerr_i == %08x", cerr_i);
printk(" c0_cerr_i == %08x", cerr_i);
breakout_cerri(cerr_i);
if (CP0_CERRI_IDX_VALID(cerr_i)) {
/* Check index of EPC, allowing for delay slot */
if (((eepc & SB1_CACHE_INDEX_MASK) != (cerr_i & SB1_CACHE_INDEX_MASK)) &&
((eepc & SB1_CACHE_INDEX_MASK) != ((cerr_i & SB1_CACHE_INDEX_MASK) - 4)))
prom_printf(" cerr_i idx doesn't match eepc\n");
printk(" cerr_i idx doesn't match eepc\n");
else {
res = extract_ic(cerr_i & SB1_CACHE_INDEX_MASK,
(cerr_i & CP0_CERRI_DATA) != 0);
if (!(res & cerr_i))
prom_printf("...didn't see indicated icache problem\n");
printk("...didn't see indicated icache problem\n");
}
}
}
if (errctl & CP0_ERRCTL_DCACHE) {
prom_printf(" c0_cerr_d == %08x", cerr_d);
printk(" c0_cerr_d == %08x", cerr_d);
breakout_cerrd(cerr_d);
if (CP0_CERRD_DPA_VALID(cerr_d)) {
prom_printf(" c0_cerr_dpa == %010llx\n", cerr_dpa);
printk(" c0_cerr_dpa == %010llx\n", cerr_dpa);
if (!CP0_CERRD_IDX_VALID(cerr_d)) {
res = extract_dc(cerr_dpa & SB1_CACHE_INDEX_MASK,
(cerr_d & CP0_CERRD_DATA) != 0);
if (!(res & cerr_d))
prom_printf("...didn't see indicated dcache problem\n");
printk("...didn't see indicated dcache problem\n");
} else {
if ((cerr_dpa & SB1_CACHE_INDEX_MASK) != (cerr_d & SB1_CACHE_INDEX_MASK))
prom_printf(" cerr_d idx doesn't match cerr_dpa\n");
printk(" cerr_d idx doesn't match cerr_dpa\n");
else {
res = extract_dc(cerr_d & SB1_CACHE_INDEX_MASK,
(cerr_d & CP0_CERRD_DATA) != 0);
if (!(res & cerr_d))
prom_printf("...didn't see indicated problem\n");
printk("...didn't see indicated problem\n");
}
}
}
@ -334,7 +334,7 @@ static uint32_t extract_ic(unsigned short addr, int data)
uint8_t lru;
int res = 0;
prom_printf("Icache index 0x%04x ", addr);
printk("Icache index 0x%04x ", addr);
for (way = 0; way < 4; way++) {
/* Index-load-tag-I */
__asm__ __volatile__ (
@ -354,7 +354,7 @@ static uint32_t extract_ic(unsigned short addr, int data)
taglo = ((unsigned long long)taglohi << 32) | taglolo;
if (way == 0) {
lru = (taghi >> 14) & 0xff;
prom_printf("[Bank %d Set 0x%02x] LRU > %d %d %d %d > MRU\n",
printk("[Bank %d Set 0x%02x] LRU > %d %d %d %d > MRU\n",
((addr >> 5) & 0x3), /* bank */
((addr >> 7) & 0x3f), /* index */
(lru & 0x3),
@ -369,19 +369,19 @@ static uint32_t extract_ic(unsigned short addr, int data)
if (valid) {
tlo_tmp = taglo & 0xfff3ff;
if (((taglo >> 10) & 1) ^ range_parity(tlo_tmp, 23, 0)) {
prom_printf(" ** bad parity in VTag0/G/ASID\n");
printk(" ** bad parity in VTag0/G/ASID\n");
res |= CP0_CERRI_TAG_PARITY;
}
if (((taglo >> 11) & 1) ^ range_parity(taglo, 63, 24)) {
prom_printf(" ** bad parity in R/VTag1\n");
printk(" ** bad parity in R/VTag1\n");
res |= CP0_CERRI_TAG_PARITY;
}
}
if (valid ^ ((taghi >> 27) & 1)) {
prom_printf(" ** bad parity for valid bit\n");
printk(" ** bad parity for valid bit\n");
res |= CP0_CERRI_TAG_PARITY;
}
prom_printf(" %d [VA %016llx] [Vld? %d] raw tags: %08X-%016llX\n",
printk(" %d [VA %016llx] [Vld? %d] raw tags: %08X-%016llX\n",
way, va, valid, taghi, taglo);
if (data) {
@ -407,21 +407,21 @@ static uint32_t extract_ic(unsigned short addr, int data)
: "r" ((way << 13) | addr | (offset << 3)));
predecode = (datahi >> 8) & 0xff;
if (((datahi >> 16) & 1) != (uint32_t)range_parity(predecode, 7, 0)) {
prom_printf(" ** bad parity in predecode\n");
printk(" ** bad parity in predecode\n");
res |= CP0_CERRI_DATA_PARITY;
}
/* XXXKW should/could check predecode bits themselves */
if (((datahi >> 4) & 0xf) ^ inst_parity(insta)) {
prom_printf(" ** bad parity in instruction a\n");
printk(" ** bad parity in instruction a\n");
res |= CP0_CERRI_DATA_PARITY;
}
if ((datahi & 0xf) ^ inst_parity(instb)) {
prom_printf(" ** bad parity in instruction b\n");
printk(" ** bad parity in instruction b\n");
res |= CP0_CERRI_DATA_PARITY;
}
prom_printf(" %05X-%08X%08X", datahi, insta, instb);
printk(" %05X-%08X%08X", datahi, insta, instb);
}
prom_printf("\n");
printk("\n");
}
}
return res;
@ -489,7 +489,7 @@ static uint32_t extract_dc(unsigned short addr, int data)
uint8_t ecc, lru;
int res = 0;
prom_printf("Dcache index 0x%04x ", addr);
printk("Dcache index 0x%04x ", addr);
for (way = 0; way < 4; way++) {
__asm__ __volatile__ (
" .set push\n\t"
@ -509,7 +509,7 @@ static uint32_t extract_dc(unsigned short addr, int data)
pa = (taglo & 0xFFFFFFE000ULL) | addr;
if (way == 0) {
lru = (taghi >> 14) & 0xff;
prom_printf("[Bank %d Set 0x%02x] LRU > %d %d %d %d > MRU\n",
printk("[Bank %d Set 0x%02x] LRU > %d %d %d %d > MRU\n",
((addr >> 11) & 0x2) | ((addr >> 5) & 1), /* bank */
((addr >> 6) & 0x3f), /* index */
(lru & 0x3),
@ -519,15 +519,15 @@ static uint32_t extract_dc(unsigned short addr, int data)
}
state = (taghi >> 25) & 0x1f;
valid = DC_TAG_VALID(state);
prom_printf(" %d [PA %010llx] [state %s (%02x)] raw tags: %08X-%016llX\n",
printk(" %d [PA %010llx] [state %s (%02x)] raw tags: %08X-%016llX\n",
way, pa, dc_state_str(state), state, taghi, taglo);
if (valid) {
if (((taglo >> 11) & 1) ^ range_parity(taglo, 39, 26)) {
prom_printf(" ** bad parity in PTag1\n");
printk(" ** bad parity in PTag1\n");
res |= CP0_CERRD_TAG_ADDRESS;
}
if (((taglo >> 10) & 1) ^ range_parity(taglo, 25, 13)) {
prom_printf(" ** bad parity in PTag0\n");
printk(" ** bad parity in PTag0\n");
res |= CP0_CERRD_TAG_ADDRESS;
}
} else {
@ -567,13 +567,13 @@ static uint32_t extract_dc(unsigned short addr, int data)
}
res |= (bits == 1) ? CP0_CERRD_DATA_SBE : CP0_CERRD_DATA_DBE;
}
prom_printf(" %02X-%016llX", datahi, datalo);
printk(" %02X-%016llX", datahi, datalo);
}
prom_printf("\n");
printk("\n");
if (bad_ecc)
prom_printf(" dwords w/ bad ECC: %d %d %d %d\n",
!!(bad_ecc & 8), !!(bad_ecc & 4),
!!(bad_ecc & 2), !!(bad_ecc & 1));
printk(" dwords w/ bad ECC: %d %d %d %d\n",
!!(bad_ecc & 8), !!(bad_ecc & 4),
!!(bad_ecc & 2), !!(bad_ecc & 1));
}
}
return res;

2
arch/mips/mm/dma-default.c
View File

@ -295,7 +295,7 @@ void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
/* Make sure that gcc doesn't leave the empty loop body. */
for (i = 0; i < nelems; i++, sg++) {
if (!plat_device_is_coherent(dev))
if (cpu_is_noncoherent_r10000(dev))
__dma_sync((unsigned long)page_address(sg->page),
sg->length, direction);
plat_unmap_dma_mem(sg->dma_address);

5
arch/mips/momentum/jaguar_atx/ja-console.c
View File

@ -74,11 +74,6 @@ void prom_putchar(char c)
uart->iu_thr = c;
}
char __init prom_getchar(void)
{
return 0;
}
static void inline ja_console_probe(void)
{
struct uart_port up;

2
arch/mips/oprofile/op_model_mipsxx.c
View File

@ -223,10 +223,12 @@ static inline int n_counters(void)
switch (current_cpu_data.cputype) {
case CPU_R10000:
counters = 2;
break;
case CPU_R12000:
case CPU_R14000:
counters = 4;
break;
default:
counters = __n_counters();

14
arch/mips/pci/fixup-jmr3927.c
View File

@ -38,6 +38,10 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
unsigned char irq = pin;
/* SMSC SLC90E66 IDE uses irq 14, 15 (default) */
if (dev->vendor == PCI_VENDOR_ID_EFAR &&
dev->device == PCI_DEVICE_ID_EFAR_SLC90E66_1)
return irq;
/* IRQ rotation (PICMG) */
irq--; /* 0-3 */
if (dev->bus->parent == NULL &&
@ -93,13 +97,3 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
{
return 0;
}
int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
/* SMSC SLC90E66 IDE uses irq 14, 15 (default) */
if (!(dev->vendor == PCI_VENDOR_ID_EFAR &&
dev->device == PCI_DEVICE_ID_EFAR_SLC90E66_1))
return pci_get_irq(dev, pin);
dev->irq = irq;
}

2
arch/mips/pci/fixup-sni.c
View File

@ -14,6 +14,8 @@
#include <asm/mipsregs.h>
#include <asm/sni.h>
#include <irq.h>
/*
* PCIMT Shortcuts ...
*/

6
arch/mips/pci/ops-au1000.c
View File

@ -172,7 +172,11 @@ static int config_access(unsigned char access_type, struct pci_bus *bus,
error = -1;
DBG("Au1x Master Abort\n");
} else if ((status >> 28) & 0xf) {
DBG("PCI ERR detected: status %x\n", status);
DBG("PCI ERR detected: device %d, status %x\n", device, ((status >> 28) & 0xf));
/* clear errors */
au_writel(status & 0xf000ffff, Au1500_PCI_STATCMD);
*data = 0xffffffff;
error = -1;
}

2
arch/mips/philips/pnx8550/common/prom.c
View File

@ -112,7 +112,7 @@ void __init prom_free_prom_memory(void)
extern int pnx8550_console_port;
/* used by prom_printf */
/* used by early printk */
void prom_putchar(char c)
{
if (pnx8550_console_port != -1) {

9
arch/mips/philips/pnx8550/common/setup.c
View File

@ -41,8 +41,6 @@
#include <uart.h>
#include <nand.h>
extern void prom_printf(char *fmt, ...);
extern void __init board_setup(void);
extern void pnx8550_machine_restart(char *);
extern void pnx8550_machine_halt(void);
@ -51,7 +49,6 @@ extern struct resource ioport_resource;
extern struct resource iomem_resource;
extern void pnx8550_time_init(void);
extern void rs_kgdb_hook(int tty_no);
extern void prom_printf(char *fmt, ...);
extern char *prom_getcmdline(void);
struct resource standard_io_resources[] = {
@ -141,7 +138,7 @@ void __init plat_mem_setup(void)
argptr += strlen("console=ttyS");
pnx8550_console_port = *argptr == '0' ? 0 : 1;
/* We must initialize the UART (console) before prom_printf */
/* We must initialize the UART (console) before early printk */
/* Set LCR to 8-bit and BAUD to 38400 (no 5) */
ip3106_lcr(UART_BASE, pnx8550_console_port) =
PNX8XXX_UART_LCR_8BIT;
@ -155,8 +152,8 @@ void __init plat_mem_setup(void)
argptr += strlen("kgdb=ttyS");
line = *argptr == '0' ? 0 : 1;
rs_kgdb_hook(line);
prom_printf("KGDB: Using ttyS%i for session, "
"please connect your debugger\n", line ? 1 : 0);
pr_info("KGDB: Using ttyS%i for session, "
"please connect your debugger\n", line ? 1 : 0);
}
#endif
return;

5
arch/mips/pmc-sierra/yosemite/py-console.c
View File

@ -107,8 +107,3 @@ void prom_putchar(char c)
while ((readb_outer_space(lsr) & 0x20) == 0);
writeb_outer_space(thr, c);
}
char __init prom_getchar(void)
{
return 0;
}

35
arch/mips/sgi-ip27/ip27-console.c
View File

@ -6,12 +6,6 @@
* Copyright (C) 2001, 2002 Ralf Baechle
*/
#include <linux/init.h>
#include <linux/console.h>
#include <linux/kdev_t.h>
#include <linux/major.h>
#include <linux/termios.h>
#include <linux/sched.h>
#include <linux/tty.h>
#include <asm/page.h>
#include <asm/semaphore.h>
@ -38,37 +32,10 @@ static inline struct ioc3_uartregs *console_uart(void)
return &ioc3->sregs.uarta;
}
void prom_putchar(char c)
void __init prom_putchar(char c)
{
struct ioc3_uartregs *uart = console_uart();
while ((uart->iu_lsr & 0x20) == 0);
uart->iu_thr = c;
}
static void ioc3_console_write(struct console *con, const char *s, unsigned n)
{
while (n-- && *s) {
if (*s == '\n')
prom_putchar('\r');
prom_putchar(*s);
s++;
}
}
static struct console ioc3_console = {
.name = "ioc3",
.write = ioc3_console_write,
.flags = CON_PRINTBUFFER | CON_BOOT,
.index = -1
};
__init void ip27_setup_console(void)
{
register_console(&ioc3_console);
}
void __init disable_early_printk(void)
{
unregister_console(&ioc3_console);
}

2
arch/mips/sibyte/Kconfig
View File

@ -116,6 +116,7 @@ config SB1_CERR_STALL
config SIBYTE_CFE
bool "Booting from CFE"
depends on SIBYTE_SB1xxx_SOC
select SYS_HAS_EARLY_PRINTK
help
Make use of the CFE API for enumerating available memory,
controlling secondary CPUs, and possibly console output.
@ -131,6 +132,7 @@ config SIBYTE_CFE_CONSOLE
config SIBYTE_STANDALONE
bool
depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE
select SYS_HAS_EARLY_PRINTK
default y
config SIBYTE_STANDALONE_RAM_SIZE

2
arch/mips/sibyte/bcm1480/irq.c
View File

@ -420,7 +420,7 @@ void __init arch_init_irq(void)
#ifdef CONFIG_GDB_CONSOLE
register_gdb_console();
#endif
prom_printf("Waiting for GDB on UART port %d\n", kgdb_port);
printk("Waiting for GDB on UART port %d\n", kgdb_port);
set_debug_traps();
breakpoint();
}

10
arch/mips/sibyte/bcm1480/setup.c
View File

@ -69,7 +69,7 @@ static inline int sys_rev_decode(void)
break;
default:
prom_printf("Unknown part type %x\n", part_type);
printk("Unknown part type %x\n", part_type);
ret = 1;
break;
}
@ -102,7 +102,7 @@ static inline int setup_bcm1x80_bcm1x55(void)
pass_str = "B0 (pass2)";
break;
default:
prom_printf("Unknown %s rev %x\n", soc_str, soc_pass);
printk("Unknown %s rev %x\n", soc_str, soc_pass);
periph_rev = 1;
pass_str = "Unknown Revision";
break;
@ -122,14 +122,14 @@ void bcm1480_setup(void)
soc_pass = G_SYS_REVISION(sys_rev);
if (sys_rev_decode()) {
prom_printf("Restart after failure to identify SiByte chip\n");
printk("Restart after failure to identify SiByte chip\n");
machine_restart(NULL);
}
plldiv = G_BCM1480_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG)));
zbbus_mhz = ((plldiv >> 1) * 50) + ((plldiv & 1) * 25);
prom_printf("Broadcom SiByte %s %s @ %d MHz (SB-1A rev %d)\n",
printk("Broadcom SiByte %s %s @ %d MHz (SB-1A rev %d)\n",
soc_str, pass_str, zbbus_mhz * 2, sb1_pass);
prom_printf("Board type: %s\n", get_system_type());
printk("Board type: %s\n", get_system_type());
}

8
arch/mips/sibyte/cfe/setup.c
View File

@ -221,10 +221,10 @@ static int __init initrd_setup(char *str)
goto fail;
}
initrd_end = initrd_start + initrd_size;
prom_printf("Found initrd of %lx@%lx\n", initrd_size, initrd_start);
printk("Found initrd of %lx@%lx\n", initrd_size, initrd_start);
return 1;
fail:
prom_printf("Bad initrd argument. Disabling initrd\n");
printk("Bad initrd argument. Disabling initrd\n");
initrd_start = 0;
initrd_end = 0;
return 1;
@ -281,7 +281,7 @@ void __init prom_init(void)
}
if (cfe_eptseal != CFE_EPTSEAL) {
/* too early for panic to do any good */
prom_printf("CFE's entrypoint seal doesn't match. Spinning.");
printk("CFE's entrypoint seal doesn't match. Spinning.");
while (1) ;
}
cfe_init(cfe_handle, cfe_ept);
@ -303,7 +303,7 @@ void __init prom_init(void)
} else {
/* The loader should have set the command line */
/* too early for panic to do any good */
prom_printf("LINUX_CMDLINE not defined in cfe.");
printk("LINUX_CMDLINE not defined in cfe.");
while (1) ;
}
}

24
arch/mips/sibyte/sb1250/setup.c
View File

@ -67,7 +67,7 @@ static int __init sys_rev_decode(void)
ret = setup_bcm112x();
break;
default:
prom_printf("Unknown SOC type %x\n", soc_type);
printk("Unknown SOC type %x\n", soc_type);
ret = 1;
break;
}
@ -112,7 +112,7 @@ static int __init setup_bcm1250(void)
pass_str = "A0-A6";
war_pass = K_SYS_REVISION_BCM1250_PASS2;
} else {
prom_printf("Unknown BCM1250 rev %x\n", soc_pass);
printk("Unknown BCM1250 rev %x\n", soc_pass);
ret = 1;
}
break;
@ -140,7 +140,7 @@ static int __init setup_bcm112x(void)
pass_str = "A2";
break;
default:
prom_printf("Unknown %s rev %x\n", soc_str, soc_pass);
printk("Unknown %s rev %x\n", soc_str, soc_pass);
ret = 1;
}
return ret;
@ -158,21 +158,21 @@ void __init sb1250_setup(void)
soc_pass = G_SYS_REVISION(sys_rev);
if (sys_rev_decode()) {
prom_printf("Restart after failure to identify SiByte chip\n");
printk("Restart after failure to identify SiByte chip\n");
machine_restart(NULL);
}
plldiv = G_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG)));
zbbus_mhz = ((plldiv >> 1) * 50) + ((plldiv & 1) * 25);
prom_printf("Broadcom SiByte %s %s @ %d MHz (SB1 rev %d)\n",
printk("Broadcom SiByte %s %s @ %d MHz (SB1 rev %d)\n",
soc_str, pass_str, zbbus_mhz * 2, sb1_pass);
prom_printf("Board type: %s\n", get_system_type());
printk("Board type: %s\n", get_system_type());
switch (war_pass) {
case K_SYS_REVISION_BCM1250_PASS1:
#ifndef CONFIG_SB1_PASS_1_WORKAROUNDS
prom_printf("@@@@ This is a BCM1250 A0-A2 (Pass 1) board, "
printk("@@@@ This is a BCM1250 A0-A2 (Pass 1) board, "
"and the kernel doesn't have the proper "
"workarounds compiled in. @@@@\n");
bad_config = 1;
@ -182,27 +182,27 @@ void __init sb1250_setup(void)
/* Pass 2 - easiest as default for now - so many numbers */
#if !defined(CONFIG_SB1_PASS_2_WORKAROUNDS) || \
!defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS)
prom_printf("@@@@ This is a BCM1250 A3-A10 board, and the "
printk("@@@@ This is a BCM1250 A3-A10 board, and the "
"kernel doesn't have the proper workarounds "
"compiled in. @@@@\n");
bad_config = 1;
#endif
#ifdef CONFIG_CPU_HAS_PREFETCH
prom_printf("@@@@ Prefetches may be enabled in this kernel, "
printk("@@@@ Prefetches may be enabled in this kernel, "
"but are buggy on this board. @@@@\n");
bad_config = 1;
#endif
break;
case K_SYS_REVISION_BCM1250_PASS2_2:
#ifndef CONFIG_SB1_PASS_2_WORKAROUNDS
prom_printf("@@@@ This is a BCM1250 B1/B2. board, and the "
printk("@@@@ This is a BCM1250 B1/B2. board, and the "
"kernel doesn't have the proper workarounds "
"compiled in. @@@@\n");
bad_config = 1;
#endif
#if defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS) || \
!defined(CONFIG_CPU_HAS_PREFETCH)
prom_printf("@@@@ This is a BCM1250 B1/B2, but the kernel is "
printk("@@@@ This is a BCM1250 B1/B2, but the kernel is "
"conservatively configured for an 'A' stepping. "
"@@@@\n");
#endif
@ -211,7 +211,7 @@ void __init sb1250_setup(void)
break;
}
if (bad_config) {
prom_printf("Invalid configuration for this chip.\n");
printk("Invalid configuration for this chip.\n");
machine_restart(NULL);
}
}

51
arch/mips/sni/sniprom.c
View File

@ -9,6 +9,8 @@
* Copyright (C) 2005-2006 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
*/
#define DEBUG
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/string.h>
@ -32,14 +34,13 @@
#define PROM_ENTRY(x) (PROM_VEC + (x))
#define DEBUG
#ifdef DEBUG
#define DBG_PRINTF(x...) prom_printf(x)
#else
#define DBG_PRINTF(x...)
#endif
static int *(*__prom_putchar)(int) = (int *(*)(int))PROM_ENTRY(PROM_PUTCHAR);
void prom_putchar(char c)
{
__prom_putchar(c);
}
static char *(*__prom_getenv)(char *) = (char *(*)(char *))PROM_ENTRY(PROM_GETENV);
static void (*__prom_get_memconf)(void *) = (void (*)(void *))PROM_ENTRY(PROM_GET_MEMCONF);
@ -48,26 +49,6 @@ char *prom_getenv (char *s)
return __prom_getenv(s);
}
void prom_printf(char *fmt, ...)
{
va_list args;
char ppbuf[1024];
char *bptr;
va_start(args, fmt);
vsprintf(ppbuf, fmt, args);
bptr = ppbuf;
while (*bptr != 0) {
if (*bptr == '\n')
__prom_putchar('\r');
__prom_putchar(*bptr++);
}
va_end(args);
}
void __init prom_free_prom_memory(void)
{
}
@ -94,15 +75,15 @@ static void sni_idprom_dump(void)
{
int i;
prom_printf("SNI IDProm dump:\n");
pr_debug("SNI IDProm dump:\n");
for (i = 0; i < 256; i++) {
if (i%16 == 0)
prom_printf("%04x ", i);
pr_debug("%04x ", i);
prom_printf("%02x ", *(unsigned char *) (SNI_IDPROM_BASE + i));
printk("%02x ", *(unsigned char *) (SNI_IDPROM_BASE + i));
if (i % 16 == 15)
prom_printf("\n");
printk("\n");
}
}
#endif
@ -121,12 +102,12 @@ static void sni_mem_init(void )
/* MemSIZE from prom in 16MByte chunks */
memsize = *((unsigned char *) SNI_IDPROM_MEMSIZE) * 16;
DBG_PRINTF("IDProm memsize: %lu MByte\n", memsize);
pr_debug("IDProm memsize: %lu MByte\n", memsize);
/* get memory bank layout from prom */
__prom_get_memconf(&memconf);
DBG_PRINTF("prom_get_mem_conf memory configuration:\n");
pr_debug("prom_get_mem_conf memory configuration:\n");
for (i = 0;i < 8 && memconf[i].size; i++) {
if (sni_brd_type == SNI_BRD_PCI_TOWER ||
sni_brd_type == SNI_BRD_PCI_TOWER_CPLUS) {
@ -135,7 +116,7 @@ static void sni_mem_init(void )
memconf[i].base -= 0x20000000;
}
}
DBG_PRINTF("Bank%d: %08x @ %08x\n", i,
pr_debug("Bank%d: %08x @ %08x\n", i,
memconf[i].size, memconf[i].base);
add_memory_region(memconf[i].base, memconf[i].size, BOOT_MEM_RAM);
}
@ -248,7 +229,7 @@ void __init prom_init(void)
systype = "RM300-Exx";
break;
}
DBG_PRINTF("Found SNI brdtype %02x name %s\n", sni_brd_type,systype);
pr_debug("Found SNI brdtype %02x name %s\n", sni_brd_type,systype);
#ifdef DEBUG
sni_idprom_dump();

10
arch/mips/tx4927/common/tx4927_setup.c
View File

@ -81,18 +81,8 @@ void __init tx4927_time_init(void)
void __init plat_timer_setup(struct irqaction *irq)
{
u32 count;
u32 c1;
u32 c2;
setup_irq(TX4927_IRQ_CPU_TIMER, irq);
/* to generate the first timer interrupt */
c1 = read_c0_count();
count = c1 + (mips_hpt_frequency / HZ);
write_c0_compare(count);
c2 = read_c0_count();
#ifdef CONFIG_TOSHIBA_RBTX4927
{
extern void toshiba_rbtx4927_timer_setup(struct irqaction

3
arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
View File

@ -132,9 +132,6 @@ JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthB
#include <asm/wbflush.h>
#include <linux/bootmem.h>
#include <linux/blkdev.h>
#ifdef CONFIG_RTC_DS1742
#include <linux/ds1742rtc.h>
#endif
#ifdef CONFIG_TOSHIBA_FPCIB0
#include <asm/tx4927/smsc_fdc37m81x.h>
#endif

76
arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
View File

@ -53,6 +53,7 @@
#include <linux/pci.h>
#include <linux/timex.h>
#include <linux/pm.h>
#include <linux/platform_device.h>
#include <asm/bootinfo.h>
#include <asm/page.h>
@ -64,9 +65,6 @@
#include <asm/time.h>
#include <linux/bootmem.h>
#include <linux/blkdev.h>
#ifdef CONFIG_RTC_DS1742
#include <linux/ds1742rtc.h>
#endif
#ifdef CONFIG_TOSHIBA_FPCIB0
#include <asm/tx4927/smsc_fdc37m81x.h>
#endif
@ -1020,69 +1018,12 @@ void __init toshiba_rbtx4927_setup(void)
"+\n");
}
#ifdef CONFIG_RTC_DS1742
extern unsigned long rtc_ds1742_get_time(void);
extern int rtc_ds1742_set_time(unsigned long);
extern void rtc_ds1742_wait(void);
#endif
void __init
toshiba_rbtx4927_time_init(void)
{
u32 c1;
u32 c2;
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT, "-\n");
#ifdef CONFIG_RTC_DS1742
rtc_mips_get_time = rtc_ds1742_get_time;
rtc_mips_set_time = rtc_ds1742_set_time;
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT,
":rtc_ds1742_init()-\n");
rtc_ds1742_init(0xbc010000);
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT,
":rtc_ds1742_init()+\n");
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT,
":Calibrate mips_hpt_frequency-\n");
rtc_ds1742_wait();
/* get the count */
c1 = read_c0_count();
/* wait for the seconds to change again */
rtc_ds1742_wait();
/* get the count again */
c2 = read_c0_count();
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT,
":Calibrate mips_hpt_frequency+\n");
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT,
":c1=%12u\n", c1);
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT,
":c2=%12u\n", c2);
/* this diff is as close as we are going to get to counter ticks per sec */
mips_hpt_frequency = abs(c2 - c1);
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT,
":f1=%12u\n", mips_hpt_frequency);
/* round to 1/10th of a MHz */
mips_hpt_frequency /= (100 * 1000);
mips_hpt_frequency *= (100 * 1000);
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT,
":f2=%12u\n", mips_hpt_frequency);
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_INFO,
":mips_hpt_frequency=%uHz (%uMHz)\n",
mips_hpt_frequency,
mips_hpt_frequency / 1000000);
#else
mips_hpt_frequency = 100000000;
#endif
mips_hpt_frequency = tx4927_cpu_clock / 2;
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT, "+\n");
@ -1095,3 +1036,16 @@ void __init toshiba_rbtx4927_timer_setup(struct irqaction *irq)
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIMER_SETUP,
"+\n");
}
static int __init toshiba_rbtx4927_rtc_init(void)
{
struct resource res = {
.start = 0x1c010000,
.end = 0x1c010000 + 0x800 - 1,
.flags = IORESOURCE_MEM,
};
struct platform_device *dev =
platform_device_register_simple("ds1742", -1, &res, 1);
return IS_ERR(dev) ? PTR_ERR(dev) : 0;
}
device_initcall(toshiba_rbtx4927_rtc_init);

9
arch/mips/tx4938/common/setup.c
View File

@ -55,14 +55,5 @@ tx4938_time_init(void)
void __init plat_timer_setup(struct irqaction *irq)
{
u32 count;
u32 c1;
u32 c2;
setup_irq(TX4938_IRQ_CPU_TIMER, irq);
c1 = read_c0_count();
count = c1 + (mips_hpt_frequency / HZ);
write_c0_compare(count);
c2 = read_c0_count();
}

13
include/asm-mips/ds1742.h
View File

@ -1,13 +0,0 @@
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2006 by Ralf Baechle (ralf@linux-mips.org)
*/
#ifndef _ASM_DS1742_H
#define _ASM_DS1742_H
#include <ds1742.h>
#endif /* _ASM_DS1742_H */

6
include/asm-mips/jmr3927/jmr3927.h
View File

@ -179,12 +179,6 @@ static inline int jmr3927_have_isac(void)
#define jmr3927_have_nvram() \
((jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_IDT_MASK) == JMR3927_IOC_IDT)
/* NVRAM macro */
#define jmr3927_nvram_in(ofs) \
jmr3927_ioc_reg_in(JMR3927_IOC_NVRAMB_ADDR + ((ofs) << 1))
#define jmr3927_nvram_out(d, ofs) \
jmr3927_ioc_reg_out(d, JMR3927_IOC_NVRAMB_ADDR + ((ofs) << 1))
/* LED macro */
#define jmr3927_led_set(n/*0-16*/) jmr3927_ioc_reg_out(~(n), JMR3927_IOC_LED_ADDR)
#define jmr3927_io_led_set(n/*0-3*/) jmr3927_isac_reg_out((n), JMR3927_ISAC_LED_ADDR)

2
include/asm-mips/lasat/lasat.h
View File

@ -237,8 +237,6 @@ static inline void lasat_ndelay(unsigned int ns)
__delay(ns / lasat_ndelay_divider);
}
extern void (* prom_printf)(const char *fmt, ...);
#endif /* !defined (_LANGUAGE_ASSEMBLY) */
#define LASAT_SERVICEMODE_MAGIC_1 0xdeadbeef

2
include/asm-mips/mach-atlas/mc146818rtc.h
View File

@ -55,6 +55,6 @@ static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
#define RTC_ALWAYS_BCD 0
#define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1970)
#define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1900)
#endif /* __ASM_MACH_ATLAS_MC146818RTC_H */

10
include/asm-mips/mach-generic/dma-coherence.h
View File

@ -11,22 +11,24 @@
struct device;
static dma_addr_t plat_map_dma_mem(struct device *dev, void *addr, size_t size)
static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr,
size_t size)
{
return virt_to_phys(addr);
}
static dma_addr_t plat_map_dma_mem_page(struct device *dev, struct page *page)
static inline dma_addr_t plat_map_dma_mem_page(struct device *dev,
struct page *page)
{
return page_to_phys(page);
}
static unsigned long plat_dma_addr_to_phys(dma_addr_t dma_addr)
static inline unsigned long plat_dma_addr_to_phys(dma_addr_t dma_addr)
{
return dma_addr;
}
static void plat_unmap_dma_mem(dma_addr_t dma_addr)
static inline void plat_unmap_dma_mem(dma_addr_t dma_addr)
{
}

2
include/asm-mips/mach-generic/mc146818rtc.h
View File

@ -30,7 +30,7 @@ static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
#define RTC_ALWAYS_BCD 1
#ifndef mc146818_decode_year
#define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1970)
#define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1900)
#endif
#endif /* __ASM_MACH_GENERIC_MC146818RTC_H */

16
include/asm-mips/mach-jmr3927/ds1742.h
View File

@ -1,16 +0,0 @@
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2003, 06 by Ralf Baechle
*/
#ifndef __ASM_MACH_JMR3927_DS1742_H
#define __ASM_MACH_JMR3927_DS1742_H
#include <asm/jmr3927/jmr3927.h>
#define rtc_read(reg) (jmr3927_nvram_in(reg))
#define rtc_write(data, reg) (jmr3927_nvram_out((data),(reg)))
#endif /* __ASM_MACH_JMR3927_DS1742_H */

18
include/asm-mips/mach-jmr3927/mangle-port.h Normal file
View File

@ -0,0 +1,18 @@
#ifndef __ASM_MACH_JMR3927_MANGLE_PORT_H
#define __ASM_MACH_JMR3927_MANGLE_PORT_H
extern unsigned long __swizzle_addr_b(unsigned long port);
#define __swizzle_addr_w(port) (port)
#define __swizzle_addr_l(port) (port)
#define __swizzle_addr_q(port) (port)
#define ioswabb(a,x) (x)
#define __mem_ioswabb(a,x) (x)
#define ioswabw(a,x) le16_to_cpu(x)
#define __mem_ioswabw(a,x) (x)
#define ioswabl(a,x) le32_to_cpu(x)
#define __mem_ioswabl(a,x) (x)
#define ioswabq(a,x) le64_to_cpu(x)
#define __mem_ioswabq(a,x) (x)
#endif /* __ASM_MACH_JMR3927_MANGLE_PORT_H */

2
include/asm-mips/mach-mips/mc146818rtc.h
View File

@ -43,6 +43,6 @@ static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
#define RTC_ALWAYS_BCD 0
#define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1970)
#define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1900)
#endif /* __ASM_MACH_MALTA_MC146818RTC_H */

10
include/asm-mips/mach-rm/mc146818rtc.h
View File

@ -7,11 +7,15 @@
*
* RTC routines for PC style attached Dallas chip with ARC epoch.
*/
#ifndef __ASM_MACH_RM200_MC146818RTC_H
#define __ASM_MACH_RM200_MC146818RTC_H
#ifndef __ASM_MACH_RM_MC146818RTC_H
#define __ASM_MACH_RM_MC146818RTC_H
#ifdef CONFIG_CPU_BIG_ENDIAN
#define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1900)
#else
#define mc146818_decode_year(year) ((year) + 1980)
#endif
#include_next <mc146818rtc.h>
#endif /* __ASM_MACH_RM200_MC146818RTC_H */
#endif /* __ASM_MACH_RM_MC146818RTC_H */

2
include/asm-mips/mips-boards/prom.h
View File

@ -28,8 +28,6 @@
extern char *prom_getcmdline(void);
extern char *prom_getenv(char *name);
extern void setup_prom_printf(int tty_no);
extern void prom_printf(char *fmt, ...);
extern void prom_init_cmdline(void);
extern void prom_meminit(void);
extern void prom_fixup_mem_map(unsigned long start_mem, unsigned long end_mem);

3
include/asm-mips/sgialib.h
View File

@ -33,9 +33,6 @@ extern int prom_flags;
extern void prom_putchar(char c);
extern char prom_getchar(void);
/* Generic printf() using ARCS console I/O. */
extern void prom_printf(char *fmt, ...);
/* Memory descriptor management. */
#define PROM_MAX_PMEMBLOCKS 32
struct prom_pmemblock {

2
include/asm-mips/sibyte/sb1250.h
View File

@ -57,8 +57,6 @@ extern void bcm1480_mask_irq(int cpu, int irq);
extern void bcm1480_unmask_irq(int cpu, int irq);
extern void bcm1480_smp_finish(void);
extern void prom_printf(char *fmt, ...);
#define AT_spin \
__asm__ __volatile__ ( \
".set noat\n" \

53
include/linux/ds1742rtc.h
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@ -1,53 +0,0 @@
/*
* ds1742rtc.h - register definitions for the Real-Time-Clock / CMOS RAM
*
* Copyright (C) 1999-2001 Toshiba Corporation
* Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org)
*
* Permission is hereby granted to copy, modify and redistribute this code
* in terms of the GNU Library General Public License, Version 2 or later,
* at your option.
*/
#ifndef __LINUX_DS1742RTC_H
#define __LINUX_DS1742RTC_H
#include <asm/ds1742.h>
#define RTC_BRAM_SIZE 0x800
#define RTC_OFFSET 0x7f8
/*
* Register summary
*/
#define RTC_CONTROL (RTC_OFFSET + 0)
#define RTC_CENTURY (RTC_OFFSET + 0)
#define RTC_SECONDS (RTC_OFFSET + 1)
#define RTC_MINUTES (RTC_OFFSET + 2)
#define RTC_HOURS (RTC_OFFSET + 3)
#define RTC_DAY (RTC_OFFSET + 4)
#define RTC_DATE (RTC_OFFSET + 5)
#define RTC_MONTH (RTC_OFFSET + 6)
#define RTC_YEAR (RTC_OFFSET + 7)
#define RTC_CENTURY_MASK 0x3f
#define RTC_SECONDS_MASK 0x7f
#define RTC_DAY_MASK 0x07
/*
* Bits in the Control/Century register
*/
#define RTC_WRITE 0x80
#define RTC_READ 0x40
/*
* Bits in the Seconds register
*/
#define RTC_STOP 0x80
/*
* Bits in the Day register
*/
#define RTC_BATT_FLAG 0x80
#define RTC_FREQ_TEST 0x40
#endif /* __LINUX_DS1742RTC_H */