forked from Minki/linux
ARM: pxa: remove get_memclk_frequency_10khz()
Introduce 'struct clk' for memory and remove get_memclk_frequency_10khz(). Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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4029813c89
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2a125dd56b
@ -71,19 +71,6 @@ unsigned int get_clk_frequency_khz(int info)
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}
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EXPORT_SYMBOL(get_clk_frequency_khz);
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/*
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* Return the current memory clock frequency in units of 10kHz
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*/
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unsigned int get_memclk_frequency_10khz(void)
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{
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if (cpu_is_pxa25x())
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return pxa25x_get_memclk_frequency_10khz();
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else if (cpu_is_pxa27x())
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return pxa27x_get_memclk_frequency_10khz();
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return 0;
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}
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EXPORT_SYMBOL(get_memclk_frequency_10khz);
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/*
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* Intel PXA2xx internal register mapping.
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*
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@ -36,18 +36,14 @@ extern unsigned int get_clk_frequency_khz(int info);
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#ifdef CONFIG_PXA25x
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extern unsigned pxa25x_get_clk_frequency_khz(int);
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extern unsigned pxa25x_get_memclk_frequency_10khz(void);
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#else
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#define pxa25x_get_clk_frequency_khz(x) (0)
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#define pxa25x_get_memclk_frequency_10khz() (0)
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#endif
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#ifdef CONFIG_PXA27x
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extern unsigned pxa27x_get_clk_frequency_khz(int);
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extern unsigned pxa27x_get_memclk_frequency_10khz(void);
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#else
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#define pxa27x_get_clk_frequency_khz(x) (0)
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#define pxa27x_get_memclk_frequency_10khz() (0)
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#endif
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#if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x)
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@ -92,23 +92,21 @@ unsigned int pxa25x_get_clk_frequency_khz(int info)
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return (turbo & 1) ? (N/1000) : (M/1000);
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}
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/*
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* Return the current memory clock frequency in units of 10kHz
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*/
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unsigned int pxa25x_get_memclk_frequency_10khz(void)
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static unsigned long clk_pxa25x_mem_getrate(struct clk *clk)
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{
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return L_clk_mult[(CCCR >> 0) & 0x1f] * BASE_CLK / 10000;
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return L_clk_mult[(CCCR >> 0) & 0x1f] * BASE_CLK;
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}
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static unsigned long clk_pxa25x_lcd_getrate(struct clk *clk)
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{
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return pxa25x_get_memclk_frequency_10khz() * 10000;
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}
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static const struct clkops clk_pxa25x_mem_ops = {
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.enable = clk_dummy_enable,
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.disable = clk_dummy_disable,
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.getrate = clk_pxa25x_mem_getrate,
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};
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static const struct clkops clk_pxa25x_lcd_ops = {
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.enable = clk_pxa2xx_cken_enable,
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.disable = clk_pxa2xx_cken_disable,
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.getrate = clk_pxa25x_lcd_getrate,
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.getrate = clk_pxa25x_mem_getrate,
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};
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static unsigned long gpio12_config_32k[] = {
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@ -185,6 +183,7 @@ static DEFINE_PXA2_CKEN(pxa25x_ficp, FICP, 47923000, 0);
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static DEFINE_CK(pxa25x_lcd, LCD, &clk_pxa25x_lcd_ops);
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static DEFINE_CLK(pxa25x_gpio11, &clk_pxa25x_gpio11_ops, 3686400, 0);
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static DEFINE_CLK(pxa25x_gpio12, &clk_pxa25x_gpio12_ops, 32768, 0);
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static DEFINE_CLK(pxa25x_mem, &clk_pxa25x_mem_ops, 0, 0);
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static struct clk_lookup pxa25x_clkregs[] = {
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INIT_CLKREG(&clk_pxa25x_lcd, "pxa2xx-fb", NULL),
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@ -205,6 +204,7 @@ static struct clk_lookup pxa25x_clkregs[] = {
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INIT_CLKREG(&clk_pxa25x_ac97, NULL, "AC97CLK"),
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INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),
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INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
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INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL),
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};
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static struct clk_lookup pxa25x_hwuart_clkreg =
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@ -111,10 +111,9 @@ unsigned int pxa27x_get_clk_frequency_khz(int info)
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}
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/*
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* Return the current mem clock frequency in units of 10kHz as
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* reflected by CCCR[A], B, and L
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* Return the current mem clock frequency as reflected by CCCR[A], B, and L
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*/
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unsigned int pxa27x_get_memclk_frequency_10khz(void)
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static unsigned long clk_pxa27x_mem_getrate(struct clk *clk)
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{
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unsigned long ccsr, clkcfg;
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unsigned int l, L, m, M;
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@ -133,9 +132,15 @@ unsigned int pxa27x_get_memclk_frequency_10khz(void)
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L = l * BASE_CLK;
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M = (!cccr_a) ? (L/m) : ((b) ? L : (L/2));
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return (M / 10000);
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return M;
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}
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static const struct clkops clk_pxa27x_mem_ops = {
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.enable = clk_dummy_enable,
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.disable = clk_dummy_disable,
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.getrate = clk_pxa27x_mem_getrate,
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};
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/*
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* Return the current LCD clock frequency in units of 10kHz as
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*/
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@ -192,6 +197,7 @@ static DEFINE_PXA2_CKEN(pxa27x_memc, MEMC, 0, 0);
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static DEFINE_CK(pxa27x_lcd, LCD, &clk_pxa27x_lcd_ops);
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static DEFINE_CK(pxa27x_camera, CAMERA, &clk_pxa27x_lcd_ops);
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static DEFINE_CLK(pxa27x_mem, &clk_pxa27x_mem_ops, 0, 0);
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static struct clk_lookup pxa27x_clkregs[] = {
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INIT_CLKREG(&clk_pxa27x_lcd, "pxa2xx-fb", NULL),
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@ -220,6 +226,7 @@ static struct clk_lookup pxa27x_clkregs[] = {
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INIT_CLKREG(&clk_pxa27x_memstk, NULL, "MSTKCLK"),
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INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"),
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INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"),
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INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL),
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};
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#ifdef CONFIG_PM
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@ -179,8 +179,8 @@ static int pxa2xx_pcmcia_set_mcxx(struct soc_pcmcia_socket *skt, unsigned int cl
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static int pxa2xx_pcmcia_set_timing(struct soc_pcmcia_socket *skt)
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{
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unsigned int clk = get_memclk_frequency_10khz();
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return pxa2xx_pcmcia_set_mcxx(skt, clk);
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unsigned long clk = clk_get_rate(skt->clk);
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return pxa2xx_pcmcia_set_mcxx(skt, clk / 10000);
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}
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#ifdef CONFIG_CPU_FREQ
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@ -282,24 +282,33 @@ static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev)
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struct pcmcia_low_level *ops;
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struct skt_dev_info *sinfo;
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struct soc_pcmcia_socket *skt;
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struct clk *clk;
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ops = (struct pcmcia_low_level *)dev->dev.platform_data;
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if (!ops)
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return -ENODEV;
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clk = clk_get(&dev->dev, NULL);
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if (!clk)
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return -ENODEV;
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pxa2xx_drv_pcmcia_ops(ops);
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sinfo = kzalloc(SKT_DEV_INFO_SIZE(ops->nr), GFP_KERNEL);
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if (!sinfo)
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if (!sinfo) {
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clk_put(clk);
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return -ENOMEM;
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}
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sinfo->nskt = ops->nr;
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sinfo->clk = clk;
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/* Initialize processor specific parameters */
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for (i = 0; i < ops->nr; i++) {
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skt = &sinfo->skt[i];
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skt->nr = ops->first + i;
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skt->clk = clk;
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skt->ops = ops;
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skt->socket.owner = ops->owner;
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skt->socket.dev.parent = &dev->dev;
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@ -314,6 +323,7 @@ static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev)
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while (--i >= 0)
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soc_pcmcia_remove_one(&sinfo->skt[i]);
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kfree(sinfo);
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clk_put(clk);
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} else {
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pxa2xx_configure_sockets(&dev->dev);
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dev_set_drvdata(&dev->dev, sinfo);
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@ -332,6 +342,7 @@ static int pxa2xx_drv_pcmcia_remove(struct platform_device *dev)
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for (i = 0; i < sinfo->nskt; i++)
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soc_pcmcia_remove_one(&sinfo->skt[i]);
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clk_put(sinfo->clk);
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kfree(sinfo);
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return 0;
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}
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@ -10,6 +10,7 @@
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#define _ASM_ARCH_PCMCIA
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/* include the world */
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#include <linux/clk.h>
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#include <linux/cpufreq.h>
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#include <pcmcia/ss.h>
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#include <pcmcia/cistpl.h>
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@ -29,6 +30,7 @@ struct soc_pcmcia_socket {
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* Info from low level handler
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*/
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unsigned int nr;
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struct clk *clk;
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/*
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* Core PCMCIA state
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@ -56,6 +58,7 @@ struct soc_pcmcia_socket {
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struct skt_dev_info {
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int nskt;
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struct clk *clk;
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struct soc_pcmcia_socket skt[0];
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};
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