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irqchip: armada-370-xp: Fix MSI interrupt handling

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The MSI interrupts use the 16 high doorbells, which are notified by using IRQ1
of the main interrupt controller.

The MSI interrupts were handled correctly for Armada-XP and Armada-370 but not
for Armada-375 and Armada-38x, which use chained handler for the MPIC.

This commit fixes that by checking proper interrupt number in chained handler
for the MPIC.

Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Fixes: bc69b8adfe ("irqchip: armada-370-xp: Setup a chained handler for the MPIC")
Cc: <stable@vger.kernel.org> # v3.15+
Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Link: https://lkml.kernel.org/r/1411643839-64925-2-git-send-email-jaz@semihalf.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit is contained in:
Grzegorz Jaszczyk 2014-09-25 13:17:18 +02:00 committed by Jason Cooper
parent f114040e3e
commit 298dcb2dd0
1 changed files with 2 additions and 2 deletions
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4
drivers/irqchip/irq-armada-370-xp.c
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@ -413,9 +413,9 @@ static void armada_370_xp_mpic_handle_cascade_irq(unsigned int irq,
irqmap = readl_relaxed(per_cpu_int_base + ARMADA_375_PPI_CAUSE);
if (irqmap & BIT(0)) {
if (irqmap & BIT(1)) {
armada_370_xp_handle_msi_irq(NULL, true);
irqmap &= ~BIT(0);
irqmap &= ~BIT(1);
}
for_each_set_bit(irqn, &irqmap, BITS_PER_LONG) {