forked from Minki/linux
[MTD] NAND: add subpage write support
Many SLC NANDs support up to 4 writes at one NAND page. Add support of this feature. Signed-off-by: Artem Bityutskiy <dedekind@infradead.org>
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29072b9607
@ -772,6 +772,7 @@ struct mtd_info *mtd_concat_create(struct mtd_info *subdev[], /* subdevices to c
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concat->mtd.ecc_stats.badblocks +=
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subdev[i]->ecc_stats.badblocks;
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if (concat->mtd.writesize != subdev[i]->writesize ||
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concat->mtd.subpage_sft != subdev[i]->subpage_sft ||
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concat->mtd.oobsize != subdev[i]->oobsize ||
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concat->mtd.ecctype != subdev[i]->ecctype ||
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concat->mtd.eccsize != subdev[i]->eccsize ||
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@ -340,6 +340,7 @@ int add_mtd_partitions(struct mtd_info *master,
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slave->mtd.oobsize = master->oobsize;
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slave->mtd.ecctype = master->ecctype;
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slave->mtd.eccsize = master->eccsize;
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slave->mtd.subpage_sft = master->subpage_sft;
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slave->mtd.name = parts[i].name;
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slave->mtd.bank_size = master->bank_size;
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@ -1590,7 +1590,7 @@ static uint8_t *nand_fill_oob(struct nand_chip *chip, uint8_t *oob,
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return NULL;
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}
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#define NOTALIGNED(x) (x & (mtd->writesize-1)) != 0
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#define NOTALIGNED(x) (x & (chip->subpagesize - 1)) != 0
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/**
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* nand_do_write_ops - [Internal] NAND write with ECC
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@ -1603,15 +1603,16 @@ static uint8_t *nand_fill_oob(struct nand_chip *chip, uint8_t *oob,
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static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
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struct mtd_oob_ops *ops)
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{
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int chipnr, realpage, page, blockmask;
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int chipnr, realpage, page, blockmask, column;
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struct nand_chip *chip = mtd->priv;
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uint32_t writelen = ops->len;
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uint8_t *oob = ops->oobbuf;
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uint8_t *buf = ops->datbuf;
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int bytes = mtd->writesize;
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int ret;
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int ret, subpage;
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ops->retlen = 0;
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if (!writelen)
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return 0;
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/* reject writes, which are not page aligned */
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if (NOTALIGNED(to) || NOTALIGNED(ops->len)) {
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@ -1620,8 +1621,11 @@ static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
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return -EINVAL;
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}
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if (!writelen)
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return 0;
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column = to & (mtd->writesize - 1);
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subpage = column || (writelen & (mtd->writesize - 1));
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if (subpage && oob)
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return -EINVAL;
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chipnr = (int)(to >> chip->chip_shift);
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chip->select_chip(mtd, chipnr);
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@ -1644,12 +1648,24 @@ static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
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memset(chip->oob_poi, 0xff, mtd->oobsize);
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while(1) {
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int bytes = mtd->writesize;
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int cached = writelen > bytes && page != blockmask;
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uint8_t *wbuf = buf;
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/* Partial page write ? */
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if (unlikely(column || writelen < (mtd->writesize - 1))) {
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cached = 0;
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bytes = min_t(int, bytes - column, (int) writelen);
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chip->pagebuf = -1;
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memset(chip->buffers->databuf, 0xff, mtd->writesize);
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memcpy(&chip->buffers->databuf[column], buf, bytes);
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wbuf = chip->buffers->databuf;
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}
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if (unlikely(oob))
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oob = nand_fill_oob(chip, oob, ops);
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ret = chip->write_page(mtd, chip, buf, page, cached,
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ret = chip->write_page(mtd, chip, wbuf, page, cached,
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(ops->mode == MTD_OOB_RAW));
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if (ret)
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break;
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@ -1658,6 +1674,7 @@ static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
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if (!writelen)
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break;
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column = 0;
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buf += bytes;
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realpage++;
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@ -2201,8 +2218,8 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
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/* Newer devices have all the information in additional id bytes */
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if (!type->pagesize) {
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int extid;
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/* The 3rd id byte contains non relevant data ATM */
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extid = chip->read_byte(mtd);
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/* The 3rd id byte holds MLC / multichip data */
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chip->cellinfo = chip->read_byte(mtd);
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/* The 4th id byte is the important one */
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extid = chip->read_byte(mtd);
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/* Calc pagesize */
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@ -2482,6 +2499,24 @@ int nand_scan_tail(struct mtd_info *mtd)
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}
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chip->ecc.total = chip->ecc.steps * chip->ecc.bytes;
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/*
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* Allow subpage writes up to ecc.steps. Not possible for MLC
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* FLASH.
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*/
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if (!(chip->options & NAND_NO_SUBPAGE_WRITE) &&
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!(chip->cellinfo & NAND_CI_CELLTYPE_MSK)) {
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switch(chip->ecc.steps) {
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case 2:
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mtd->subpage_sft = 1;
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break;
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case 4:
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case 8:
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mtd->subpage_sft = 2;
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break;
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}
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}
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chip->subpagesize = mtd->writesize >> mtd->subpage_sft;
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/* Initialize state */
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chip->state = FL_READY;
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@ -200,6 +200,8 @@ struct mtd_info {
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/* ECC status information */
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struct mtd_ecc_stats ecc_stats;
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/* Subpage shift (NAND) */
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int subpage_sft;
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void *priv;
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@ -166,6 +166,9 @@ typedef enum {
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* for all large page devices, as they do not support
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* autoincrement.*/
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#define NAND_NO_READRDY 0x00000100
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/* Chip does not allow subpage writes */
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#define NAND_NO_SUBPAGE_WRITE 0x00000200
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/* Options valid for Samsung large page devices */
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#define NAND_SAMSUNG_LP_OPTIONS \
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@ -193,6 +196,9 @@ typedef enum {
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/* Nand scan has allocated controller struct */
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#define NAND_CONTROLLER_ALLOC 0x80000000
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/* Cell info constants */
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#define NAND_CI_CHIPNR_MSK 0x03
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#define NAND_CI_CELLTYPE_MSK 0x0C
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/*
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* nand_state_t - chip states
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@ -341,6 +347,7 @@ struct nand_buffers {
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* @chipsize: [INTERN] the size of one chip for multichip arrays
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* @pagemask: [INTERN] page number mask = number of (pages / chip) - 1
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* @pagebuf: [INTERN] holds the pagenumber which is currently in data_buf
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* @subpagesize: [INTERN] holds the subpagesize
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* @ecclayout: [REPLACEABLE] the default ecc placement scheme
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* @bbt: [INTERN] bad block table pointer
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* @bbt_td: [REPLACEABLE] bad block table descriptor for flash lookup
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@ -388,6 +395,8 @@ struct nand_chip {
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unsigned long chipsize;
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int pagemask;
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int pagebuf;
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int subpagesize;
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uint8_t cellinfo;
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int badblockpos;
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nand_state_t state;
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