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arm64: dts: juno: Add idle-states to device tree

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This patch adds idle-states bindings data collected through a set of
benchmarking experiments (latency and energy consumption) on Juno
boards. Latencies data represents the worst case scenarios as required
by the DT idle-states bindings.

Signed-off-by: Jon Medhurst <tixy@linaro.org>
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Jon Medhurst (Tixy) 2015-12-09 09:40:53 +00:00 committed by Olof Johansson
parent c7a5675f52
commit 28e10a8f3a
2 changed files with 56 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

28
arch/arm64/boot/dts/arm/juno-r1.dts
View File

@ -60,6 +60,28 @@
}; };
}; };
idle-states {
entry-method = "arm,psci";
CPU_SLEEP_0: cpu-sleep-0 {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x0010000>;
local-timer-stop;
entry-latency-us = <300>;
exit-latency-us = <1200>;
min-residency-us = <2000>;
};
CLUSTER_SLEEP_0: cluster-sleep-0 {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x1010000>;
local-timer-stop;
entry-latency-us = <300>;
exit-latency-us = <1200>;
min-residency-us = <2500>;
};
};
A57_0: cpu@0 { A57_0: cpu@0 {
compatible = "arm,cortex-a57","arm,armv8"; compatible = "arm,cortex-a57","arm,armv8";
reg = <0x0 0x0>; reg = <0x0 0x0>;
@ -67,6 +89,7 @@
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A57_L2>; next-level-cache = <&A57_L2>;
clocks = <&scpi_dvfs 0>; clocks = <&scpi_dvfs 0>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
}; };
A57_1: cpu@1 { A57_1: cpu@1 {
@ -76,6 +99,7 @@
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A57_L2>; next-level-cache = <&A57_L2>;
clocks = <&scpi_dvfs 0>; clocks = <&scpi_dvfs 0>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
}; };
A53_0: cpu@100 { A53_0: cpu@100 {
@ -85,6 +109,7 @@
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A53_L2>; next-level-cache = <&A53_L2>;
clocks = <&scpi_dvfs 1>; clocks = <&scpi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
}; };
A53_1: cpu@101 { A53_1: cpu@101 {
@ -94,6 +119,7 @@
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A53_L2>; next-level-cache = <&A53_L2>;
clocks = <&scpi_dvfs 1>; clocks = <&scpi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
}; };
A53_2: cpu@102 { A53_2: cpu@102 {
@ -103,6 +129,7 @@
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A53_L2>; next-level-cache = <&A53_L2>;
clocks = <&scpi_dvfs 1>; clocks = <&scpi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
}; };
A53_3: cpu@103 { A53_3: cpu@103 {
@ -112,6 +139,7 @@
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A53_L2>; next-level-cache = <&A53_L2>;
clocks = <&scpi_dvfs 1>; clocks = <&scpi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
}; };
A57_L2: l2-cache0 { A57_L2: l2-cache0 {

28
arch/arm64/boot/dts/arm/juno.dts
View File

@ -60,6 +60,28 @@
}; };
}; };
idle-states {
entry-method = "arm,psci";
CPU_SLEEP_0: cpu-sleep-0 {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x0010000>;
local-timer-stop;
entry-latency-us = <300>;
exit-latency-us = <1200>;
min-residency-us = <2000>;
};
CLUSTER_SLEEP_0: cluster-sleep-0 {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x1010000>;
local-timer-stop;
entry-latency-us = <300>;
exit-latency-us = <1200>;
min-residency-us = <2500>;
};
};
A57_0: cpu@0 { A57_0: cpu@0 {
compatible = "arm,cortex-a57","arm,armv8"; compatible = "arm,cortex-a57","arm,armv8";
reg = <0x0 0x0>; reg = <0x0 0x0>;
@ -67,6 +89,7 @@
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A57_L2>; next-level-cache = <&A57_L2>;
clocks = <&scpi_dvfs 0>; clocks = <&scpi_dvfs 0>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
}; };
A57_1: cpu@1 { A57_1: cpu@1 {
@ -76,6 +99,7 @@
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A57_L2>; next-level-cache = <&A57_L2>;
clocks = <&scpi_dvfs 0>; clocks = <&scpi_dvfs 0>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
}; };
A53_0: cpu@100 { A53_0: cpu@100 {
@ -85,6 +109,7 @@
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A53_L2>; next-level-cache = <&A53_L2>;
clocks = <&scpi_dvfs 1>; clocks = <&scpi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
}; };
A53_1: cpu@101 { A53_1: cpu@101 {
@ -94,6 +119,7 @@
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A53_L2>; next-level-cache = <&A53_L2>;
clocks = <&scpi_dvfs 1>; clocks = <&scpi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
}; };
A53_2: cpu@102 { A53_2: cpu@102 {
@ -103,6 +129,7 @@
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A53_L2>; next-level-cache = <&A53_L2>;
clocks = <&scpi_dvfs 1>; clocks = <&scpi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
}; };
A53_3: cpu@103 { A53_3: cpu@103 {
@ -112,6 +139,7 @@
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A53_L2>; next-level-cache = <&A53_L2>;
clocks = <&scpi_dvfs 1>; clocks = <&scpi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
}; };
A57_L2: l2-cache0 { A57_L2: l2-cache0 {