forked from Minki/linux
[PATCH] ARM: 2781/2: PXA27x Standby mode take 2
Patch from Todd Poynor Add support for PXA27x Standby mode, a low-power mode that retains CPU and some peripheral state (the existing "sleep" mode is a power-power mode that retains less state). Activated via: echo -n standby > /sys/power/state From: David Burrage and Todd Poynor Signed-off-by: Todd Poynor <tpoynor@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -24,3 +24,7 @@ obj-$(CONFIG_LEDS) += $(led-y)
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# Misc features
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obj-$(CONFIG_PM) += pm.o sleep.o
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ifeq ($(CONFIG_PXA27x),y)
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obj-$(CONFIG_PM) += standby.o
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endif
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@ -126,6 +126,7 @@ int pxa_cpu_pm_prepare(suspend_state_t state)
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{
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switch (state) {
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case PM_SUSPEND_MEM:
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case PM_SUSPEND_STANDBY:
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return 0;
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default:
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return -EINVAL;
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@ -138,7 +139,10 @@ void pxa_cpu_pm_enter(suspend_state_t state)
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extern void pxa_cpu_suspend(unsigned int);
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extern void pxa_cpu_resume(void);
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CKEN = CKEN22_MEMC | CKEN9_OSTIMER;
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if (state == PM_SUSPEND_STANDBY)
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CKEN = CKEN22_MEMC | CKEN9_OSTIMER | CKEN16_LCD |CKEN0_PWM0;
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else
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CKEN = CKEN22_MEMC | CKEN9_OSTIMER;
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/* ensure voltage-change sequencer not initiated, which hangs */
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PCFR &= ~PCFR_FVC;
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@ -147,6 +151,9 @@ void pxa_cpu_pm_enter(suspend_state_t state)
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PEDR = 0xDF12FE1B;
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switch (state) {
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case PM_SUSPEND_STANDBY:
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pxa_cpu_standby();
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break;
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case PM_SUSPEND_MEM:
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/* set resume return address */
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PSPR = virt_to_phys(pxa_cpu_resume);
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32
arch/arm/mach-pxa/standby.S
Normal file
32
arch/arm/mach-pxa/standby.S
Normal file
@ -0,0 +1,32 @@
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/*
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* PXA27x standby mode
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*
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* Author: David Burrage
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*
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* 2005 (c) MontaVista Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#include <linux/config.h>
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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#include <asm/hardware.h>
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#include <asm/arch/pxa-regs.h>
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.text
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ENTRY(pxa_cpu_standby)
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ldr r0, =PSSR
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mov r1, #(PSSR_PH | PSSR_STS)
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mov r2, #2
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mov r3, #UNCACHED_PHYS_0 @ Read mem context in.
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ldr ip, [r3]
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b 1f
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.align 5
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1: mcr p14, 0, r2, c7, c0, 0 @ put the system into Standby
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str r1, [r0] @ make sure PSSR_PH/STS are clear
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mov pc, lr
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@ -1505,6 +1505,7 @@
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#define PSSR_OTGPH (1 << 6) /* OTG Peripheral control Hold */
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#define PSSR_RDH (1 << 5) /* Read Disable Hold */
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#define PSSR_PH (1 << 4) /* Peripheral Control Hold */
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#define PSSR_STS (1 << 3) /* Standby Mode Status */
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#define PSSR_VFS (1 << 2) /* VDD Fault Status */
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#define PSSR_BFS (1 << 1) /* Battery Fault Status */
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#define PSSR_SSS (1 << 0) /* Software Sleep Status */
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