leandrof/linux
1
0
Fork 0
forked from Minki/linux
Code Issues Pull Requests Packages Projects Releases Wiki Activity

arm/arm64: dts: socfpga: fixes for v5.8

Browse Source 
- Add status = "okay" in QSPI
 - Increase QSPI size in reg property
 - Fix dtschema for SoCFPGA platforms
 -----BEGIN PGP SIGNATURE-----
 
 iQJIBAABCgAyFiEEoHhMeiyk5VmwVMwNGZQEC4GjKPQFAl8RyVgUHGRpbmd1eWVu
 QGtlcm5lbC5vcmcACgkQGZQEC4GjKPTpZhAApLM5JnyWc5RXRqSwAHva+xGfI8HR
 nBKpgwRutzslUoEiJLXG08UxufQ1GkKp6yiwGEtAjykz/U9ptJfODy093cMoQlWu
 DghIkCQpudgPZqi4lpfxDh39MpDQ5z0q2thZiyTxMRoUSknl77eBu9So9wD6dp8x
 CJjuEuZzEpI2r5yFsTbVMEzOwR5KX5aZm8Y2CZ/uMtYHRj8nDx33NNHLBoOWdMZ2
 yEQiIRJNEle1+yHwwEP6RKsj+CixcU3kWUMmBOFnMcPZmfdtSz2RfBKsh9RnwysE
 1pN7s4175nWjwbhq46bOG3s506vlAhdCZ4z/fzrYqrLhfrl1lO1VKiEOTwAXxcuQ
 oZqeHfboClIWyj8Qgf9/YE0SR2+q2qwSdXBFlUSUsAVvGwqtr6vUwr5p3dLaLz8u
 lRzygGaCqyyVABPF3t7QqoHI2BXc9kH4gmiStPTFfF7nTgEgsGe4OP8/42//RfAu
 ZnNMo/XPPRNQwCOfGQrjGGWZkLC4+1ye5mmjoSmqNu23OKGyvbFDn76InrHQ6pdp
 3Jl+08u66C9Ru/v4RNbJIdO8+28zvHIrf7HV1buvQybbdrXo05mJEhT3uidNLxXA
 RnnfbiIosL8y06LGiEcZjrkulXwr7r5iFfMiJ1/InCgg/V5Ev0+CZ/PwyW5vleMK
 24nLeR2D/AT3uqI=
 =8sK4
 -----END PGP SIGNATURE-----

Merge tag 'socfpga_fixes_for_v5.8_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/fixes

arm/arm64: dts: socfpga: fixes for v5.8
- Add status = "okay" in QSPI
- Increase QSPI size in reg property
- Fix dtschema for SoCFPGA platforms

* tag 'socfpga_fixes_for_v5.8_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  arm64: dts: spcfpga: Align GIC, NAND and UART nodenames with dtschema
  ARM: dts: socfpga: Align L2 cache-controller nodename with dtschema
  arm64: dts: stratix10: increase QSPI reg address in nand dts file
  arm64: dts: stratix10: add status to qspi dts node
  arm64: dts: agilex: add status to qspi dts node

Link: https://lore.kernel.org/r/20200717155758.18233-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2020-07-17 18:01:41 +02:00
commit 2648298a06
6 changed files with 12 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/boot/dts/socfpga.dtsi
View File

@ -726,7 +726,7 @@
};
};
L2: l2-cache@fffef000 {
L2: cache-controller@fffef000 {
compatible = "arm,pl310-cache";
reg = <0xfffef000 0x1000>;
interrupts = <0 38 0x04>;

2
arch/arm/boot/dts/socfpga_arria10.dtsi
View File

@ -636,7 +636,7 @@
reg = <0xffcfb100 0x80>;
};
L2: l2-cache@fffff000 {
L2: cache-controller@fffff000 {
compatible = "arm,pl310-cache";
reg = <0xfffff000 0x1000>;
interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;

8
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
View File

@ -77,7 +77,7 @@
method = "smc";
};
intc: intc@fffc1000 {
intc: interrupt-controller@fffc1000 {
compatible = "arm,gic-400", "arm,cortex-a15-gic";
#interrupt-cells = <3>;
interrupt-controller;
@ -302,7 +302,7 @@
status = "disabled";
};
nand: nand@ffb90000 {
nand: nand-controller@ffb90000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "altr,socfpga-denali-nand";
@ -445,7 +445,7 @@
clock-names = "timer";
};
uart0: serial0@ffc02000 {
uart0: serial@ffc02000 {
compatible = "snps,dw-apb-uart";
reg = <0xffc02000 0x100>;
interrupts = <0 108 4>;
@ -456,7 +456,7 @@
status = "disabled";
};
uart1: serial1@ffc02100 {
uart1: serial@ffc02100 {
compatible = "snps,dw-apb-uart";
reg = <0xffc02100 0x100>;
interrupts = <0 109 4>;

1
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
View File

@ -155,6 +155,7 @@
};
&qspi {
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;

7
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts
View File

@ -188,6 +188,7 @@
};
&qspi {
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
@ -211,12 +212,12 @@
qspi_boot: partition@0 {
label = "Boot and fpga data";
reg = <0x0 0x034B0000>;
reg = <0x0 0x03FE0000>;
};
qspi_rootfs: partition@4000000 {
qspi_rootfs: partition@3FE0000 {
label = "Root Filesystem - JFFS2";
reg = <0x034B0000 0x0EB50000>;
reg = <0x03FE0000 0x0C020000>;
};
};
};

1
arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
View File

@ -98,6 +98,7 @@
};
&qspi {
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;