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ath6kl: add ath6kl_bmi_write_hi32()

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We have a lot of 32 bit writes to the host interest area and the code
doing that is ugly. Clean that up by adding ath6kl_bmi_write_hi32().

This also fixes few checkpatch warnings.

Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
This commit is contained in:
Kalle Valo 2012-03-07 20:03:58 +02:00
parent d0d670abcf
commit 24fc32b356
2 changed files with 32 additions and 76 deletions
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9
drivers/net/wireless/ath/ath6kl/bmi.h
View File

@ -223,6 +223,15 @@ struct ath6kl_bmi_target_info {
__le32 type; /* target type */ __le32 type; /* target type */
} __packed; } __packed;
#define ath6kl_bmi_write_hi32(ar, item, val) \
({ \
u32 addr, v; \
addr = ath6kl_get_hi_item_addr(ar, HI_ITEM(item)); \
v = val; \
ath6kl_bmi_write(ar, addr, (u8 *) &v, sizeof(v)); \
})
int ath6kl_bmi_init(struct ath6kl *ar); int ath6kl_bmi_init(struct ath6kl *ar);
void ath6kl_bmi_cleanup(struct ath6kl *ar); void ath6kl_bmi_cleanup(struct ath6kl *ar);
void ath6kl_bmi_reset(struct ath6kl *ar); void ath6kl_bmi_reset(struct ath6kl *ar);

99
drivers/net/wireless/ath/ath6kl/init.c
View File

@ -352,11 +352,7 @@ static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
blk_size |= ((u32)htc_ctrl_buf) << 16; blk_size |= ((u32)htc_ctrl_buf) << 16;
/* set the host interest area for the block size */ /* set the host interest area for the block size */
status = ath6kl_bmi_write(ar, status = ath6kl_bmi_write_hi32(ar, hi_mbox_io_block_sz, blk_size);
ath6kl_get_hi_item_addr(ar,
HI_ITEM(hi_mbox_io_block_sz)),
(u8 *)&blk_size,
4);
if (status) { if (status) {
ath6kl_err("bmi_write_memory for IO block size failed\n"); ath6kl_err("bmi_write_memory for IO block size failed\n");
goto out; goto out;
@ -368,11 +364,8 @@ static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
if (mbox_isr_yield_val) { if (mbox_isr_yield_val) {
/* set the host interest area for the mbox ISR yield limit */ /* set the host interest area for the mbox ISR yield limit */
status = ath6kl_bmi_write(ar, status = ath6kl_bmi_write_hi32(ar, hi_mbox_isr_yield_limit,
ath6kl_get_hi_item_addr(ar, mbox_isr_yield_val);
HI_ITEM(hi_mbox_isr_yield_limit)),
(u8 *)&mbox_isr_yield_val,
4);
if (status) { if (status) {
ath6kl_err("bmi_write_memory for yield limit failed\n"); ath6kl_err("bmi_write_memory for yield limit failed\n");
goto out; goto out;
@ -463,8 +456,7 @@ int ath6kl_configure_target(struct ath6kl *ar)
int i, status; int i, status;
param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG); param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG);
if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, if (ath6kl_bmi_write_hi32(ar, hi_serial_enable, param)) {
HI_ITEM(hi_serial_enable)), (u8 *)&param, 4)) {
ath6kl_err("bmi_write_memory for uart debug failed\n"); ath6kl_err("bmi_write_memory for uart debug failed\n");
return -EIO; return -EIO;
} }
@ -500,11 +492,8 @@ int ath6kl_configure_target(struct ath6kl *ar)
if (ar->p2p && ar->vif_max == 1) if (ar->p2p && ar->vif_max == 1)
fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV; fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
param = HTC_PROTOCOL_VERSION; if (ath6kl_bmi_write_hi32(ar, hi_app_host_interest,
if (ath6kl_bmi_write(ar, HTC_PROTOCOL_VERSION) != 0) {
ath6kl_get_hi_item_addr(ar,
HI_ITEM(hi_app_host_interest)),
(u8 *)&param, 4) != 0) {
ath6kl_err("bmi_write_memory for htc version failed\n"); ath6kl_err("bmi_write_memory for htc version failed\n");
return -EIO; return -EIO;
} }
@ -527,11 +516,7 @@ int ath6kl_configure_target(struct ath6kl *ar)
param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
if (ath6kl_bmi_write(ar, if (ath6kl_bmi_write_hi32(ar, hi_option_flag, param) != 0) {
ath6kl_get_hi_item_addr(ar,
HI_ITEM(hi_option_flag)),
(u8 *)&param,
4) != 0) {
ath6kl_err("bmi_write_memory for setting fwmode failed\n"); ath6kl_err("bmi_write_memory for setting fwmode failed\n");
return -EIO; return -EIO;
} }
@ -550,16 +535,13 @@ int ath6kl_configure_target(struct ath6kl *ar)
param = ar->hw.board_ext_data_addr; param = ar->hw.board_ext_data_addr;
ram_reserved_size = ar->hw.reserved_ram_size; ram_reserved_size = ar->hw.reserved_ram_size;
if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, if (ath6kl_bmi_write_hi32(ar, hi_board_ext_data, param) != 0) {
HI_ITEM(hi_board_ext_data)),
(u8 *)&param, 4) != 0) {
ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n"); ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
return -EIO; return -EIO;
} }
if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, if (ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz,
HI_ITEM(hi_end_ram_reserve_sz)), ram_reserved_size) != 0) {
(u8 *)&ram_reserved_size, 4) != 0) {
ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n"); ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
return -EIO; return -EIO;
} }
@ -570,20 +552,13 @@ int ath6kl_configure_target(struct ath6kl *ar)
return -EIO; return -EIO;
/* Configure GPIO AR600x UART */ /* Configure GPIO AR600x UART */
param = ar->hw.uarttx_pin; status = ath6kl_bmi_write_hi32(ar, hi_dbg_uart_txpin,
status = ath6kl_bmi_write(ar, ar->hw.uarttx_pin);
ath6kl_get_hi_item_addr(ar,
HI_ITEM(hi_dbg_uart_txpin)),
(u8 *)&param, 4);
if (status) if (status)
return status; return status;
/* Configure target refclk_hz */ /* Configure target refclk_hz */
param = ar->hw.refclk_hz; status = ath6kl_bmi_write_hi32(ar, hi_refclk_hz, ar->hw.refclk_hz);
status = ath6kl_bmi_write(ar,
ath6kl_get_hi_item_addr(ar,
HI_ITEM(hi_refclk_hz)),
(u8 *)&param, 4);
if (status) if (status)
return status; return status;
@ -1096,11 +1071,8 @@ static int ath6kl_upload_board_file(struct ath6kl *ar)
* writing board data. * writing board data.
*/ */
if (ar->hw.board_addr != 0) { if (ar->hw.board_addr != 0) {
board_address = ar->hw.board_addr; ath6kl_bmi_write_hi32(ar, hi_board_data,
ath6kl_bmi_write(ar, ar->hw.board_addr);
ath6kl_get_hi_item_addr(ar,
HI_ITEM(hi_board_data)),
(u8 *) &board_address, 4);
} else { } else {
ath6kl_bmi_read(ar, ath6kl_bmi_read(ar,
ath6kl_get_hi_item_addr(ar, ath6kl_get_hi_item_addr(ar,
@ -1157,10 +1129,7 @@ static int ath6kl_upload_board_file(struct ath6kl *ar)
/* record that extended board data is initialized */ /* record that extended board data is initialized */
param = (board_ext_data_size << 16) | 1; param = (board_ext_data_size << 16) | 1;
ath6kl_bmi_write(ar, ath6kl_bmi_write_hi32(ar, hi_board_ext_data_config, param);
ath6kl_get_hi_item_addr(ar,
HI_ITEM(hi_board_ext_data_config)),
(unsigned char *) &param, 4);
} }
if (ar->fw_board_len < board_data_size) { if (ar->fw_board_len < board_data_size) {
@ -1181,11 +1150,7 @@ static int ath6kl_upload_board_file(struct ath6kl *ar)
} }
/* record the fact that Board Data IS initialized */ /* record the fact that Board Data IS initialized */
param = 1; ath6kl_bmi_write_hi32(ar, hi_board_data_initialized, 1);
ath6kl_bmi_write(ar,
ath6kl_get_hi_item_addr(ar,
HI_ITEM(hi_board_data_initialized)),
(u8 *)&param, 4);
return ret; return ret;
} }
@ -1273,7 +1238,7 @@ static int ath6kl_upload_firmware(struct ath6kl *ar)
static int ath6kl_upload_patch(struct ath6kl *ar) static int ath6kl_upload_patch(struct ath6kl *ar)
{ {
u32 address, param; u32 address;
int ret; int ret;
if (ar->fw_patch == NULL) if (ar->fw_patch == NULL)
@ -1290,18 +1255,14 @@ static int ath6kl_upload_patch(struct ath6kl *ar)
return ret; return ret;
} }
param = address; ath6kl_bmi_write_hi32(ar, hi_dset_list_head, address);
ath6kl_bmi_write(ar,
ath6kl_get_hi_item_addr(ar,
HI_ITEM(hi_dset_list_head)),
(unsigned char *) &param, 4);
return 0; return 0;
} }
static int ath6kl_upload_testscript(struct ath6kl *ar) static int ath6kl_upload_testscript(struct ath6kl *ar)
{ {
u32 address, param; u32 address;
int ret; int ret;
if (ar->testmode != 2) if (ar->testmode != 2)
@ -1322,23 +1283,9 @@ static int ath6kl_upload_testscript(struct ath6kl *ar)
return ret; return ret;
} }
param = address; ath6kl_bmi_write_hi32(ar, hi_ota_testscript, address);
ath6kl_bmi_write(ar, ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, 4096);
ath6kl_get_hi_item_addr(ar, ath6kl_bmi_write_hi32(ar, hi_test_apps_related, 1);
HI_ITEM(hi_ota_testscript)),
(unsigned char *) &param, 4);
param = 4096;
ath6kl_bmi_write(ar,
ath6kl_get_hi_item_addr(ar,
HI_ITEM(hi_end_ram_reserve_sz)),
(unsigned char *) &param, 4);
param = 1;
ath6kl_bmi_write(ar,
ath6kl_get_hi_item_addr(ar,
HI_ITEM(hi_test_apps_related)),
(unsigned char *) &param, 4);
return 0; return 0;
} }