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pci-v5.8-fixes-2

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Merge tag 'pci-v5.8-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci into master

Pull PCI fixes from Bjorn Helgaas:

 - Reject invalid IRQ 0 command line argument for virtio_mmio because
   IRQ 0 now generates warnings (Bjorn Helgaas)

 - Revert "PCI/PM: Assume ports without DLL Link Active train links in
   100 ms", which broke nouveau (Bjorn Helgaas)

* tag 'pci-v5.8-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
  Revert "PCI/PM: Assume ports without DLL Link Active train links in 100 ms"
  virtio-mmio: Reject invalid IRQ 0 command line argument
This commit is contained in:
Linus Torvalds 2020-07-24 18:30:24 -07:00
commit 23ee3e4e5b
2 changed files with 11 additions and 23 deletions
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30
drivers/pci/pci.c
View File

@ -4638,8 +4638,7 @@ static int pci_pm_reset(struct pci_dev *dev, int probe)
* pcie_wait_for_link_delay - Wait until link is active or inactive * pcie_wait_for_link_delay - Wait until link is active or inactive
* @pdev: Bridge device * @pdev: Bridge device
* @active: waiting for active or inactive? * @active: waiting for active or inactive?
* @delay: Delay to wait after link has become active (in ms). Specify %0 * @delay: Delay to wait after link has become active (in ms)
* for no delay.
* *
* Use this to wait till link becomes active or inactive. * Use this to wait till link becomes active or inactive.
*/ */
@ -4680,7 +4679,7 @@ static bool pcie_wait_for_link_delay(struct pci_dev *pdev, bool active,
msleep(10); msleep(10);
timeout -= 10; timeout -= 10;
} }
if (active && ret && delay) if (active && ret)
msleep(delay); msleep(delay);
else if (ret != active) else if (ret != active)
pci_info(pdev, "Data Link Layer Link Active not %s in 1000 msec\n", pci_info(pdev, "Data Link Layer Link Active not %s in 1000 msec\n",
@ -4801,28 +4800,17 @@ void pci_bridge_wait_for_secondary_bus(struct pci_dev *dev)
if (!pcie_downstream_port(dev)) if (!pcie_downstream_port(dev))
return; return;
/* if (pcie_get_speed_cap(dev) <= PCIE_SPEED_5_0GT) {
* Per PCIe r5.0, sec 6.6.1, for downstream ports that support pci_dbg(dev, "waiting %d ms for downstream link\n", delay);
* speeds > 5 GT/s, we must wait for link training to complete msleep(delay);
* before the mandatory delay. } else {
* pci_dbg(dev, "waiting %d ms for downstream link, after activation\n",
* We can only tell when link training completes via DLL Link delay);
* Active, which is required for downstream ports that support if (!pcie_wait_for_link_delay(dev, true, delay)) {
* speeds > 5 GT/s (sec 7.5.3.6). Unfortunately some common
* devices do not implement Link Active reporting even when it's
* required, so we'll check for that directly instead of checking
* the supported link speed. We assume devices without Link Active
* reporting can train in 100 ms regardless of speed.
*/
if (dev->link_active_reporting) {
pci_dbg(dev, "waiting for link to train\n");
if (!pcie_wait_for_link_delay(dev, true, 0)) {
/* Did not train, no need to wait any further */ /* Did not train, no need to wait any further */
return; return;
} }
} }
pci_dbg(child, "waiting %d ms to become accessible\n", delay);
msleep(delay);
if (!pci_device_is_present(child)) { if (!pci_device_is_present(child)) {
pci_dbg(child, "waiting additional %d ms to become accessible\n", delay); pci_dbg(child, "waiting additional %d ms to become accessible\n", delay);

4
drivers/virtio/virtio_mmio.c
View File

@ -641,11 +641,11 @@ static int vm_cmdline_set(const char *device,
&vm_cmdline_id, &consumed); &vm_cmdline_id, &consumed);
/* /*
* sscanf() must processes at least 2 chunks; also there * sscanf() must process at least 2 chunks; also there
* must be no extra characters after the last chunk, so * must be no extra characters after the last chunk, so
* str[consumed] must be '\0' * str[consumed] must be '\0'
*/ */
if (processed < 2 || str[consumed]) if (processed < 2 || str[consumed] || irq == 0)
return -EINVAL; return -EINVAL;
resources[0].flags = IORESOURCE_MEM; resources[0].flags = IORESOURCE_MEM;