forked from Minki/linux
pci-v5.8-fixes-2
-----BEGIN PGP SIGNATURE----- iQJIBAABCgAyFiEEgMe7l+5h9hnxdsnuWYigwDrT+vwFAl8beM8UHGJoZWxnYWFz QGdvb2dsZS5jb20ACgkQWYigwDrT+vygXhAAwYMQgoLF+HZDVGWK6q/YmN+Q0ygb tXtnKt/ehf+zrvWiWZxmRVPZ71MjR9Ut6kXQ+MWlADkLkBeIxsCMj4N8ZjGSp/Gh UMfFwVYoUhJG3AM8uko6hCugsYsxagFA5zr53crHIE9AHCp/2Ca4lq1VrBB5k5OQ v4bghphxtPZXtUelHHcbmylU8EmnPG79XzL1VYqgeOd98nSrn34c68Ib7tezLF3I zgRraYghlyI6TGvbA55vdouMs+z+eYYN2hIu6FEXDx2lm81IvFYD5LdXwfb78Ns3 4+BcyuqHcsyvHuxD77Y/JrlmLdFopFRyhexfc887znqD2nXc0kAAtLXKM+d+/bXz vV8qtsDVWhYXS6cwvDuYSjsa1DiaWyJNQ/4tIuu5hYofXfi7ltyATkVrAjE0QPaC QpWnMVKecXSjd//VyTSvAAgO3Bk27uhXfTy3n7lpCTcpzMJj04t6go6u8/SOLtz9 ECWs4WWQVoi7zX65chcXtwce2+plQA6Pu7duzNLo5hP5KIIH4Ij0I19w1yGZueUm V5CIRAsVXPfQPJ45nhKwHldHJpZ/uXM97nYH5F9H14j9VXrrMJWptzyZiH53ZKvE 9GLBfHGcyKBCHcOhJtEJqgf7gkrxGpfSVcacYmPClB8SOsTd67mzIVRdH3xS7DUk j8VlWiNB266bHaY= =hzUW -----END PGP SIGNATURE----- Merge tag 'pci-v5.8-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci into master Pull PCI fixes from Bjorn Helgaas: - Reject invalid IRQ 0 command line argument for virtio_mmio because IRQ 0 now generates warnings (Bjorn Helgaas) - Revert "PCI/PM: Assume ports without DLL Link Active train links in 100 ms", which broke nouveau (Bjorn Helgaas) * tag 'pci-v5.8-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: Revert "PCI/PM: Assume ports without DLL Link Active train links in 100 ms" virtio-mmio: Reject invalid IRQ 0 command line argument
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commit
23ee3e4e5b
@ -4638,8 +4638,7 @@ static int pci_pm_reset(struct pci_dev *dev, int probe)
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* pcie_wait_for_link_delay - Wait until link is active or inactive
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* @pdev: Bridge device
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* @active: waiting for active or inactive?
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* @delay: Delay to wait after link has become active (in ms). Specify %0
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* for no delay.
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* @delay: Delay to wait after link has become active (in ms)
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*
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* Use this to wait till link becomes active or inactive.
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*/
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@ -4680,7 +4679,7 @@ static bool pcie_wait_for_link_delay(struct pci_dev *pdev, bool active,
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msleep(10);
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timeout -= 10;
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}
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if (active && ret && delay)
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if (active && ret)
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msleep(delay);
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else if (ret != active)
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pci_info(pdev, "Data Link Layer Link Active not %s in 1000 msec\n",
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@ -4801,28 +4800,17 @@ void pci_bridge_wait_for_secondary_bus(struct pci_dev *dev)
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if (!pcie_downstream_port(dev))
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return;
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/*
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* Per PCIe r5.0, sec 6.6.1, for downstream ports that support
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* speeds > 5 GT/s, we must wait for link training to complete
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* before the mandatory delay.
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*
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* We can only tell when link training completes via DLL Link
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* Active, which is required for downstream ports that support
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* speeds > 5 GT/s (sec 7.5.3.6). Unfortunately some common
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* devices do not implement Link Active reporting even when it's
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* required, so we'll check for that directly instead of checking
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* the supported link speed. We assume devices without Link Active
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* reporting can train in 100 ms regardless of speed.
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*/
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if (dev->link_active_reporting) {
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pci_dbg(dev, "waiting for link to train\n");
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if (!pcie_wait_for_link_delay(dev, true, 0)) {
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if (pcie_get_speed_cap(dev) <= PCIE_SPEED_5_0GT) {
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pci_dbg(dev, "waiting %d ms for downstream link\n", delay);
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msleep(delay);
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} else {
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pci_dbg(dev, "waiting %d ms for downstream link, after activation\n",
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delay);
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if (!pcie_wait_for_link_delay(dev, true, delay)) {
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/* Did not train, no need to wait any further */
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return;
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}
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}
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pci_dbg(child, "waiting %d ms to become accessible\n", delay);
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msleep(delay);
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if (!pci_device_is_present(child)) {
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pci_dbg(child, "waiting additional %d ms to become accessible\n", delay);
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@ -641,11 +641,11 @@ static int vm_cmdline_set(const char *device,
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&vm_cmdline_id, &consumed);
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/*
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* sscanf() must processes at least 2 chunks; also there
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* sscanf() must process at least 2 chunks; also there
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* must be no extra characters after the last chunk, so
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* str[consumed] must be '\0'
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*/
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if (processed < 2 || str[consumed])
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if (processed < 2 || str[consumed] || irq == 0)
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return -EINVAL;
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resources[0].flags = IORESOURCE_MEM;
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