drm/amdkfd: Optimize out sdma doorbell array in kgd2kfd_shared_resources
We can directly calculate sdma doorbell indexes in the process doorbell pages through the doorbell_index structure in amdgpu_device, so no need to cache them in kgd2kfd_shared_resources any more. This alleviates the adaptation needs when new SDMA configurations are introduced. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -131,7 +131,7 @@ static void amdgpu_doorbell_get_kfd_info(struct amdgpu_device *adev,
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void amdgpu_amdkfd_device_init(struct amdgpu_device *adev)
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{
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int i, n;
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int i;
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int last_valid_bit;
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if (adev->kfd.dev) {
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@ -142,7 +142,9 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev)
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.gpuvm_size = min(adev->vm_manager.max_pfn
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<< AMDGPU_GPU_PAGE_SHIFT,
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AMDGPU_GMC_HOLE_START),
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.drm_render_minor = adev->ddev->render->index
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.drm_render_minor = adev->ddev->render->index,
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.sdma_doorbell_idx = adev->doorbell_index.sdma_engine,
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};
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/* this is going to have a few of the MSBs set that we need to
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@ -172,31 +174,6 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev)
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&gpu_resources.doorbell_aperture_size,
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&gpu_resources.doorbell_start_offset);
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if (adev->asic_type < CHIP_VEGA10) {
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kgd2kfd_device_init(adev->kfd.dev, &gpu_resources);
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return;
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}
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n = (adev->asic_type < CHIP_VEGA20) ? 2 : 8;
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for (i = 0; i < n; i += 2) {
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/* On SOC15 the BIF is involved in routing
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* doorbells using the low 12 bits of the
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* address. Communicate the assignments to
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* KFD. KFD uses two doorbell pages per
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* process in case of 64-bit doorbells so we
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* can use each doorbell assignment twice.
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*/
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gpu_resources.sdma_doorbell[0][i] =
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adev->doorbell_index.sdma_engine[0] + (i >> 1);
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gpu_resources.sdma_doorbell[0][i+1] =
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adev->doorbell_index.sdma_engine[0] + 0x200 + (i >> 1);
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gpu_resources.sdma_doorbell[1][i] =
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adev->doorbell_index.sdma_engine[1] + (i >> 1);
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gpu_resources.sdma_doorbell[1][i+1] =
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adev->doorbell_index.sdma_engine[1] + 0x200 + (i >> 1);
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}
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/* Since SOC15, BIF starts to statically use the
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* lower 12 bits of doorbell addresses for routing
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* based on settings in registers like
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@ -205,10 +182,12 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev)
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* 12 bits of its address has to be outside the range
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* set for SDMA, VCN, and IH blocks.
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*/
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gpu_resources.non_cp_doorbells_start =
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adev->doorbell_index.first_non_cp;
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gpu_resources.non_cp_doorbells_end =
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adev->doorbell_index.last_non_cp;
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if (adev->asic_type >= CHIP_VEGA10) {
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gpu_resources.non_cp_doorbells_start =
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adev->doorbell_index.first_non_cp;
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gpu_resources.non_cp_doorbells_end =
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adev->doorbell_index.last_non_cp;
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}
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kgd2kfd_device_init(adev->kfd.dev, &gpu_resources);
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}
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@ -134,12 +134,18 @@ static int allocate_doorbell(struct qcm_process_device *qpd, struct queue *q)
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*/
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q->doorbell_id = q->properties.queue_id;
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} else if (q->properties.type == KFD_QUEUE_TYPE_SDMA) {
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/* For SDMA queues on SOC15, use static doorbell
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* assignments based on the engine and queue.
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/* For SDMA queues on SOC15 with 8-byte doorbell, use static
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* doorbell assignments based on the engine and queue id.
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* The doobell index distance between RLC (2*i) and (2*i+1)
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* for a SDMA engine is 512.
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*/
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q->doorbell_id = dev->shared_resources.sdma_doorbell
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[q->properties.sdma_engine_id]
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[q->properties.sdma_queue_id];
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uint32_t *idx_offset =
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dev->shared_resources.sdma_doorbell_idx;
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q->doorbell_id = idx_offset[q->properties.sdma_engine_id]
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+ (q->properties.sdma_queue_id & 1)
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* KFD_QUEUE_DOORBELL_MIRROR_OFFSET
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+ (q->properties.sdma_queue_id >> 1);
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} else {
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/* For CP queues on SOC15 reserve a free doorbell ID */
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unsigned int found;
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@ -137,11 +137,11 @@ struct kgd2kfd_shared_resources {
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/* Bit n == 1 means Queue n is available for KFD */
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DECLARE_BITMAP(queue_bitmap, KGD_MAX_QUEUES);
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/* Doorbell assignments (SOC15 and later chips only). Only
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/* SDMA doorbell assignments (SOC15 and later chips only). Only
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* specific doorbells are routed to each SDMA engine. Others
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* are routed to IH and VCN. They are not usable by the CP.
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*/
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unsigned int sdma_doorbell[2][8];
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uint32_t *sdma_doorbell_idx;
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/* From SOC15 onward, the doorbell index range not usable for CP
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* queues.
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