Merge tag 'm68k-for-v4.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k
Pull m68k upddates from Geert Uytterhoeven: - assorted spelling fixes - defconfig updates * tag 'm68k-for-v4.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k: m68k/defconfig: Update defconfigs for v4.7-rc2 m68k: Assorted spelling fixes
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@@ -18,7 +18,7 @@
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* AUG/22/2000 : added support for 32-bit Dual-Address-Mode (K) 2000
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* Oliver Kamphenkel (O.Kamphenkel@tu-bs.de)
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*
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* AUG/25/2000 : addad support for 8, 16 and 32-bit Single-Address-Mode (K)2000
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* AUG/25/2000 : added support for 8, 16 and 32-bit Single-Address-Mode (K)2000
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* Oliver Kamphenkel (O.Kamphenkel@tu-bs.de)
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*
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* APR/18/2002 : added proper support for MCF5272 DMA controller.
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@@ -123,10 +123,10 @@
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/*
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* I2C module.
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*/
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#define MCFI2C_BASE0 (MCF_MBAR + 0x280) /* Base addreess I2C0 */
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#define MCFI2C_BASE0 (MCF_MBAR + 0x280) /* Base address I2C0 */
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#define MCFI2C_SIZE0 0x20 /* Register set size */
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#define MCFI2C_BASE1 (MCF_MBAR2 + 0x440) /* Base addreess I2C1 */
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#define MCFI2C_BASE1 (MCF_MBAR2 + 0x440) /* Base address I2C1 */
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#define MCFI2C_SIZE1 0x20 /* Register set size */
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/*
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@@ -38,7 +38,7 @@
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/*
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* MMU Operation register.
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*/
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#define MMUOR_UAA 0x00000001 /* Update allocatiom address */
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#define MMUOR_UAA 0x00000001 /* Update allocation address */
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#define MMUOR_ACC 0x00000002 /* TLB access */
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#define MMUOR_RD 0x00000004 /* TLB access read */
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#define MMUOR_WR 0x00000000 /* TLB access write */
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@@ -1,6 +1,6 @@
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/*
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* Q40 master Chip Control
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* RTC stuff merged for compactnes..
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* RTC stuff merged for compactness.
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*/
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#ifndef _Q40_MASTER_H
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