forked from Minki/linux
Merge 5.15-rc6 into char-misc-next
We need the char/misc fixes in here for merging and testing. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
commit
22d4f9beaf
1
CREDITS
1
CREDITS
@ -971,6 +971,7 @@ D: PowerPC
|
|||||||
N: Daniel Drake
|
N: Daniel Drake
|
||||||
E: dsd@gentoo.org
|
E: dsd@gentoo.org
|
||||||
D: USBAT02 CompactFlash support in usb-storage
|
D: USBAT02 CompactFlash support in usb-storage
|
||||||
|
D: ZD1211RW wireless driver
|
||||||
S: UK
|
S: UK
|
||||||
|
|
||||||
N: Oleg Drokin
|
N: Oleg Drokin
|
||||||
|
@ -1226,7 +1226,7 @@ PAGE_SIZE multiple when read back.
|
|||||||
|
|
||||||
Note that all fields in this file are hierarchical and the
|
Note that all fields in this file are hierarchical and the
|
||||||
file modified event can be generated due to an event down the
|
file modified event can be generated due to an event down the
|
||||||
hierarchy. For for the local events at the cgroup level see
|
hierarchy. For the local events at the cgroup level see
|
||||||
memory.events.local.
|
memory.events.local.
|
||||||
|
|
||||||
low
|
low
|
||||||
@ -2170,19 +2170,19 @@ existing device files.
|
|||||||
|
|
||||||
Cgroup v2 device controller has no interface files and is implemented
|
Cgroup v2 device controller has no interface files and is implemented
|
||||||
on top of cgroup BPF. To control access to device files, a user may
|
on top of cgroup BPF. To control access to device files, a user may
|
||||||
create bpf programs of the BPF_CGROUP_DEVICE type and attach them
|
create bpf programs of type BPF_PROG_TYPE_CGROUP_DEVICE and attach
|
||||||
to cgroups. On an attempt to access a device file, corresponding
|
them to cgroups with BPF_CGROUP_DEVICE flag. On an attempt to access a
|
||||||
BPF programs will be executed, and depending on the return value
|
device file, corresponding BPF programs will be executed, and depending
|
||||||
the attempt will succeed or fail with -EPERM.
|
on the return value the attempt will succeed or fail with -EPERM.
|
||||||
|
|
||||||
A BPF_CGROUP_DEVICE program takes a pointer to the bpf_cgroup_dev_ctx
|
A BPF_PROG_TYPE_CGROUP_DEVICE program takes a pointer to the
|
||||||
structure, which describes the device access attempt: access type
|
bpf_cgroup_dev_ctx structure, which describes the device access attempt:
|
||||||
(mknod/read/write) and device (type, major and minor numbers).
|
access type (mknod/read/write) and device (type, major and minor numbers).
|
||||||
If the program returns 0, the attempt fails with -EPERM, otherwise
|
If the program returns 0, the attempt fails with -EPERM, otherwise it
|
||||||
it succeeds.
|
succeeds.
|
||||||
|
|
||||||
An example of BPF_CGROUP_DEVICE program may be found in the kernel
|
An example of BPF_PROG_TYPE_CGROUP_DEVICE program may be found in
|
||||||
source tree in the tools/testing/selftests/bpf/progs/dev_cgroup.c file.
|
tools/testing/selftests/bpf/progs/dev_cgroup.c in the kernel source tree.
|
||||||
|
|
||||||
|
|
||||||
RDMA
|
RDMA
|
||||||
|
@ -1266,7 +1266,7 @@
|
|||||||
The VGA and EFI output is eventually overwritten by
|
The VGA and EFI output is eventually overwritten by
|
||||||
the real console.
|
the real console.
|
||||||
|
|
||||||
The xen output can only be used by Xen PV guests.
|
The xen option can only be used in Xen domains.
|
||||||
|
|
||||||
The sclp output can only be used on s390.
|
The sclp output can only be used on s390.
|
||||||
|
|
||||||
|
@ -50,7 +50,6 @@ properties:
|
|||||||
data-lanes:
|
data-lanes:
|
||||||
description: array of physical DSI data lane indexes.
|
description: array of physical DSI data lane indexes.
|
||||||
minItems: 1
|
minItems: 1
|
||||||
maxItems: 4
|
|
||||||
items:
|
items:
|
||||||
- const: 1
|
- const: 1
|
||||||
- const: 2
|
- const: 2
|
||||||
@ -71,7 +70,6 @@ properties:
|
|||||||
data-lanes:
|
data-lanes:
|
||||||
description: array of physical DSI data lane indexes.
|
description: array of physical DSI data lane indexes.
|
||||||
minItems: 1
|
minItems: 1
|
||||||
maxItems: 4
|
|
||||||
items:
|
items:
|
||||||
- const: 1
|
- const: 1
|
||||||
- const: 2
|
- const: 2
|
||||||
|
@ -18,7 +18,7 @@ properties:
|
|||||||
const: ti,sn65dsi86
|
const: ti,sn65dsi86
|
||||||
|
|
||||||
reg:
|
reg:
|
||||||
const: 0x2d
|
enum: [ 0x2c, 0x2d ]
|
||||||
|
|
||||||
enable-gpios:
|
enable-gpios:
|
||||||
maxItems: 1
|
maxItems: 1
|
||||||
|
@ -22,7 +22,7 @@ properties:
|
|||||||
items:
|
items:
|
||||||
- enum:
|
- enum:
|
||||||
# ili9341 240*320 Color on stm32f429-disco board
|
# ili9341 240*320 Color on stm32f429-disco board
|
||||||
- st,sf-tc240t-9370-t
|
- st,sf-tc240t-9370-t
|
||||||
- const: ilitek,ili9341
|
- const: ilitek,ili9341
|
||||||
|
|
||||||
reg: true
|
reg: true
|
||||||
|
@ -31,7 +31,7 @@ properties:
|
|||||||
maxItems: 1
|
maxItems: 1
|
||||||
|
|
||||||
port:
|
port:
|
||||||
$ref: /schemas/graph.yaml#/properties/port
|
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||||
additionalProperties: false
|
additionalProperties: false
|
||||||
|
|
||||||
properties:
|
properties:
|
||||||
|
@ -38,7 +38,7 @@ properties:
|
|||||||
|
|
||||||
port:
|
port:
|
||||||
additionalProperties: false
|
additionalProperties: false
|
||||||
$ref: /schemas/graph.yaml#/properties/port
|
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||||
|
|
||||||
properties:
|
properties:
|
||||||
endpoint:
|
endpoint:
|
||||||
|
@ -38,7 +38,7 @@ properties:
|
|||||||
|
|
||||||
port:
|
port:
|
||||||
additionalProperties: false
|
additionalProperties: false
|
||||||
$ref: /schemas/graph.yaml#/properties/port
|
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||||
|
|
||||||
properties:
|
properties:
|
||||||
endpoint:
|
endpoint:
|
||||||
|
@ -38,7 +38,7 @@ properties:
|
|||||||
|
|
||||||
port:
|
port:
|
||||||
additionalProperties: false
|
additionalProperties: false
|
||||||
$ref: /schemas/graph.yaml#/properties/port
|
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||||
|
|
||||||
properties:
|
properties:
|
||||||
endpoint:
|
endpoint:
|
||||||
|
@ -20,9 +20,7 @@ properties:
|
|||||||
- snps,dwcmshc-sdhci
|
- snps,dwcmshc-sdhci
|
||||||
|
|
||||||
reg:
|
reg:
|
||||||
minItems: 1
|
maxItems: 1
|
||||||
items:
|
|
||||||
- description: Offset and length of the register set for the device
|
|
||||||
|
|
||||||
interrupts:
|
interrupts:
|
||||||
maxItems: 1
|
maxItems: 1
|
||||||
|
@ -83,7 +83,7 @@ Example:
|
|||||||
#interrupt-cells = <2>;
|
#interrupt-cells = <2>;
|
||||||
|
|
||||||
switch0: switch@0 {
|
switch0: switch@0 {
|
||||||
compatible = "marvell,mv88e6390";
|
compatible = "marvell,mv88e6190";
|
||||||
reg = <0>;
|
reg = <0>;
|
||||||
reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
|
reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
|
||||||
|
|
||||||
|
@ -34,7 +34,6 @@ properties:
|
|||||||
|
|
||||||
clocks:
|
clocks:
|
||||||
minItems: 3
|
minItems: 3
|
||||||
maxItems: 5
|
|
||||||
items:
|
items:
|
||||||
- description: MAC host clock
|
- description: MAC host clock
|
||||||
- description: MAC apb clock
|
- description: MAC apb clock
|
||||||
|
@ -21,6 +21,7 @@ select:
|
|||||||
contains:
|
contains:
|
||||||
enum:
|
enum:
|
||||||
- snps,dwmac
|
- snps,dwmac
|
||||||
|
- snps,dwmac-3.40a
|
||||||
- snps,dwmac-3.50a
|
- snps,dwmac-3.50a
|
||||||
- snps,dwmac-3.610
|
- snps,dwmac-3.610
|
||||||
- snps,dwmac-3.70a
|
- snps,dwmac-3.70a
|
||||||
@ -76,6 +77,7 @@ properties:
|
|||||||
- rockchip,rk3399-gmac
|
- rockchip,rk3399-gmac
|
||||||
- rockchip,rv1108-gmac
|
- rockchip,rv1108-gmac
|
||||||
- snps,dwmac
|
- snps,dwmac
|
||||||
|
- snps,dwmac-3.40a
|
||||||
- snps,dwmac-3.50a
|
- snps,dwmac-3.50a
|
||||||
- snps,dwmac-3.610
|
- snps,dwmac-3.610
|
||||||
- snps,dwmac-3.70a
|
- snps,dwmac-3.70a
|
||||||
|
@ -41,7 +41,6 @@ properties:
|
|||||||
- description: builtin MSI controller.
|
- description: builtin MSI controller.
|
||||||
|
|
||||||
interrupt-names:
|
interrupt-names:
|
||||||
minItems: 1
|
|
||||||
items:
|
items:
|
||||||
- const: msi
|
- const: msi
|
||||||
|
|
||||||
|
@ -171,7 +171,7 @@ examples:
|
|||||||
cs-gpios = <&gpio0 13 0>,
|
cs-gpios = <&gpio0 13 0>,
|
||||||
<&gpio0 14 0>;
|
<&gpio0 14 0>;
|
||||||
rx-sample-delay-ns = <3>;
|
rx-sample-delay-ns = <3>;
|
||||||
spi-flash@1 {
|
flash@1 {
|
||||||
compatible = "spi-nand";
|
compatible = "spi-nand";
|
||||||
reg = <1>;
|
reg = <1>;
|
||||||
rx-sample-delay-ns = <7>;
|
rx-sample-delay-ns = <7>;
|
||||||
|
@ -4,103 +4,112 @@
|
|||||||
NTFS3
|
NTFS3
|
||||||
=====
|
=====
|
||||||
|
|
||||||
|
|
||||||
Summary and Features
|
Summary and Features
|
||||||
====================
|
====================
|
||||||
|
|
||||||
NTFS3 is fully functional NTFS Read-Write driver. The driver works with
|
NTFS3 is fully functional NTFS Read-Write driver. The driver works with NTFS
|
||||||
NTFS versions up to 3.1, normal/compressed/sparse files
|
versions up to 3.1. File system type to use on mount is *ntfs3*.
|
||||||
and journal replaying. File system type to use on mount is 'ntfs3'.
|
|
||||||
|
|
||||||
- This driver implements NTFS read/write support for normal, sparse and
|
- This driver implements NTFS read/write support for normal, sparse and
|
||||||
compressed files.
|
compressed files.
|
||||||
- Supports native journal replaying;
|
- Supports native journal replaying.
|
||||||
- Supports extended attributes
|
|
||||||
Predefined extended attributes:
|
|
||||||
- 'system.ntfs_security' gets/sets security
|
|
||||||
descriptor (SECURITY_DESCRIPTOR_RELATIVE)
|
|
||||||
- 'system.ntfs_attrib' gets/sets ntfs file/dir attributes.
|
|
||||||
Note: applied to empty files, this allows to switch type between
|
|
||||||
sparse(0x200), compressed(0x800) and normal;
|
|
||||||
- Supports NFS export of mounted NTFS volumes.
|
- Supports NFS export of mounted NTFS volumes.
|
||||||
|
- Supports extended attributes. Predefined extended attributes:
|
||||||
|
|
||||||
|
- *system.ntfs_security* gets/sets security
|
||||||
|
|
||||||
|
Descriptor: SECURITY_DESCRIPTOR_RELATIVE
|
||||||
|
|
||||||
|
- *system.ntfs_attrib* gets/sets ntfs file/dir attributes.
|
||||||
|
|
||||||
|
Note: Applied to empty files, this allows to switch type between
|
||||||
|
sparse(0x200), compressed(0x800) and normal.
|
||||||
|
|
||||||
Mount Options
|
Mount Options
|
||||||
=============
|
=============
|
||||||
|
|
||||||
The list below describes mount options supported by NTFS3 driver in addition to
|
The list below describes mount options supported by NTFS3 driver in addition to
|
||||||
generic ones.
|
generic ones. You can use every mount option with **no** option. If it is in
|
||||||
|
this table marked with no it means default is without **no**.
|
||||||
|
|
||||||
===============================================================================
|
.. flat-table::
|
||||||
|
:widths: 1 5
|
||||||
|
:fill-cells:
|
||||||
|
|
||||||
nls=name This option informs the driver how to interpret path
|
* - iocharset=name
|
||||||
strings and translate them to Unicode and back. If
|
- This option informs the driver how to interpret path strings and
|
||||||
this option is not set, the default codepage will be
|
translate them to Unicode and back. If this option is not set, the
|
||||||
used (CONFIG_NLS_DEFAULT).
|
default codepage will be used (CONFIG_NLS_DEFAULT).
|
||||||
Examples:
|
|
||||||
'nls=utf8'
|
|
||||||
|
|
||||||
uid=
|
Example: iocharset=utf8
|
||||||
gid=
|
|
||||||
umask= Controls the default permissions for files/directories created
|
|
||||||
after the NTFS volume is mounted.
|
|
||||||
|
|
||||||
fmask=
|
* - uid=
|
||||||
dmask= Instead of specifying umask which applies both to
|
- :rspan:`1`
|
||||||
files and directories, fmask applies only to files and
|
* - gid=
|
||||||
dmask only to directories.
|
|
||||||
|
|
||||||
nohidden Files with the Windows-specific HIDDEN (FILE_ATTRIBUTE_HIDDEN)
|
* - umask=
|
||||||
attribute will not be shown under Linux.
|
- Controls the default permissions for files/directories created after
|
||||||
|
the NTFS volume is mounted.
|
||||||
|
|
||||||
sys_immutable Files with the Windows-specific SYSTEM
|
* - dmask=
|
||||||
(FILE_ATTRIBUTE_SYSTEM) attribute will be marked as system
|
- :rspan:`1` Instead of specifying umask which applies both to files and
|
||||||
immutable files.
|
directories, fmask applies only to files and dmask only to directories.
|
||||||
|
* - fmask=
|
||||||
|
|
||||||
discard Enable support of the TRIM command for improved performance
|
* - noacsrules
|
||||||
on delete operations, which is recommended for use with the
|
- "No access rules" mount option sets access rights for files/folders to
|
||||||
solid-state drives (SSD).
|
777 and owner/group to root. This mount option absorbs all other
|
||||||
|
permissions.
|
||||||
|
|
||||||
force Forces the driver to mount partitions even if 'dirty' flag
|
- Permissions change for files/folders will be reported as successful,
|
||||||
(volume dirty) is set. Not recommended for use.
|
but they will remain 777.
|
||||||
|
|
||||||
sparse Create new files as "sparse".
|
- Owner/group change will be reported as successful, butthey will stay
|
||||||
|
as root.
|
||||||
|
|
||||||
showmeta Use this parameter to show all meta-files (System Files) on
|
* - nohidden
|
||||||
a mounted NTFS partition.
|
- Files with the Windows-specific HIDDEN (FILE_ATTRIBUTE_HIDDEN) attribute
|
||||||
By default, all meta-files are hidden.
|
will not be shown under Linux.
|
||||||
|
|
||||||
prealloc Preallocate space for files excessively when file size is
|
* - sys_immutable
|
||||||
increasing on writes. Decreases fragmentation in case of
|
- Files with the Windows-specific SYSTEM (FILE_ATTRIBUTE_SYSTEM) attribute
|
||||||
parallel write operations to different files.
|
will be marked as system immutable files.
|
||||||
|
|
||||||
no_acs_rules "No access rules" mount option sets access rights for
|
* - discard
|
||||||
files/folders to 777 and owner/group to root. This mount
|
- Enable support of the TRIM command for improved performance on delete
|
||||||
option absorbs all other permissions:
|
operations, which is recommended for use with the solid-state drives
|
||||||
- permissions change for files/folders will be reported
|
(SSD).
|
||||||
as successful, but they will remain 777;
|
|
||||||
- owner/group change will be reported as successful, but
|
|
||||||
they will stay as root
|
|
||||||
|
|
||||||
acl Support POSIX ACLs (Access Control Lists). Effective if
|
* - force
|
||||||
supported by Kernel. Not to be confused with NTFS ACLs.
|
- Forces the driver to mount partitions even if volume is marked dirty.
|
||||||
The option specified as acl enables support for POSIX ACLs.
|
Not recommended for use.
|
||||||
|
|
||||||
noatime All files and directories will not update their last access
|
* - sparse
|
||||||
time attribute if a partition is mounted with this parameter.
|
- Create new files as sparse.
|
||||||
This option can speed up file system operation.
|
|
||||||
|
|
||||||
===============================================================================
|
* - showmeta
|
||||||
|
- Use this parameter to show all meta-files (System Files) on a mounted
|
||||||
|
NTFS partition. By default, all meta-files are hidden.
|
||||||
|
|
||||||
ToDo list
|
* - prealloc
|
||||||
|
- Preallocate space for files excessively when file size is increasing on
|
||||||
|
writes. Decreases fragmentation in case of parallel write operations to
|
||||||
|
different files.
|
||||||
|
|
||||||
|
* - acl
|
||||||
|
- Support POSIX ACLs (Access Control Lists). Effective if supported by
|
||||||
|
Kernel. Not to be confused with NTFS ACLs. The option specified as acl
|
||||||
|
enables support for POSIX ACLs.
|
||||||
|
|
||||||
|
Todo list
|
||||||
=========
|
=========
|
||||||
|
- Full journaling support over JBD. Currently journal replaying is supported
|
||||||
- Full journaling support (currently journal replaying is supported) over JBD.
|
which is not necessarily as effectice as JBD would be.
|
||||||
|
|
||||||
|
|
||||||
References
|
References
|
||||||
==========
|
==========
|
||||||
https://www.paragon-software.com/home/ntfs-linux-professional/
|
- Commercial version of the NTFS driver for Linux.
|
||||||
- Commercial version of the NTFS driver for Linux.
|
https://www.paragon-software.com/home/ntfs-linux-professional/
|
||||||
|
|
||||||
almaz.alexandrovich@paragon-software.com
|
- Direct e-mail address for feedback and requests on the NTFS3 implementation.
|
||||||
- Direct e-mail address for feedback and requests on the NTFS3 implementation.
|
almaz.alexandrovich@paragon-software.com
|
||||||
|
@ -300,8 +300,8 @@ pcie_replay_count
|
|||||||
.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
|
.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
|
||||||
:doc: pcie_replay_count
|
:doc: pcie_replay_count
|
||||||
|
|
||||||
+GPU SmartShift Information
|
GPU SmartShift Information
|
||||||
============================
|
==========================
|
||||||
|
|
||||||
GPU SmartShift information via sysfs
|
GPU SmartShift information via sysfs
|
||||||
|
|
||||||
|
@ -111,15 +111,6 @@ Component Helper Usage
|
|||||||
.. kernel-doc:: drivers/gpu/drm/drm_drv.c
|
.. kernel-doc:: drivers/gpu/drm/drm_drv.c
|
||||||
:doc: component helper usage recommendations
|
:doc: component helper usage recommendations
|
||||||
|
|
||||||
IRQ Helper Library
|
|
||||||
~~~~~~~~~~~~~~~~~~
|
|
||||||
|
|
||||||
.. kernel-doc:: drivers/gpu/drm/drm_irq.c
|
|
||||||
:doc: irq helpers
|
|
||||||
|
|
||||||
.. kernel-doc:: drivers/gpu/drm/drm_irq.c
|
|
||||||
:export:
|
|
||||||
|
|
||||||
Memory Manager Initialization
|
Memory Manager Initialization
|
||||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||||
|
|
||||||
|
@ -18,7 +18,7 @@ types can be added after the security issue of corresponding device driver
|
|||||||
is clarified or fixed in the future.
|
is clarified or fixed in the future.
|
||||||
|
|
||||||
Create/Destroy VDUSE devices
|
Create/Destroy VDUSE devices
|
||||||
------------------------
|
----------------------------
|
||||||
|
|
||||||
VDUSE devices are created as follows:
|
VDUSE devices are created as follows:
|
||||||
|
|
||||||
|
25
MAINTAINERS
25
MAINTAINERS
@ -1276,6 +1276,7 @@ F: drivers/input/mouse/bcm5974.c
|
|||||||
|
|
||||||
APPLE DART IOMMU DRIVER
|
APPLE DART IOMMU DRIVER
|
||||||
M: Sven Peter <sven@svenpeter.dev>
|
M: Sven Peter <sven@svenpeter.dev>
|
||||||
|
R: Alyssa Rosenzweig <alyssa@rosenzweig.io>
|
||||||
L: iommu@lists.linux-foundation.org
|
L: iommu@lists.linux-foundation.org
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: Documentation/devicetree/bindings/iommu/apple,dart.yaml
|
F: Documentation/devicetree/bindings/iommu/apple,dart.yaml
|
||||||
@ -1712,6 +1713,8 @@ F: drivers/*/*alpine*
|
|||||||
|
|
||||||
ARM/APPLE MACHINE SUPPORT
|
ARM/APPLE MACHINE SUPPORT
|
||||||
M: Hector Martin <marcan@marcan.st>
|
M: Hector Martin <marcan@marcan.st>
|
||||||
|
M: Sven Peter <sven@svenpeter.dev>
|
||||||
|
R: Alyssa Rosenzweig <alyssa@rosenzweig.io>
|
||||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||||
S: Maintained
|
S: Maintained
|
||||||
W: https://asahilinux.org
|
W: https://asahilinux.org
|
||||||
@ -2237,6 +2240,7 @@ F: arch/arm/mach-pxa/mioa701.c
|
|||||||
|
|
||||||
ARM/MStar/Sigmastar Armv7 SoC support
|
ARM/MStar/Sigmastar Armv7 SoC support
|
||||||
M: Daniel Palmer <daniel@thingy.jp>
|
M: Daniel Palmer <daniel@thingy.jp>
|
||||||
|
M: Romain Perier <romain.perier@gmail.com>
|
||||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||||
S: Maintained
|
S: Maintained
|
||||||
W: http://linux-chenxing.org/
|
W: http://linux-chenxing.org/
|
||||||
@ -2713,6 +2717,7 @@ F: drivers/power/reset/keystone-reset.c
|
|||||||
|
|
||||||
ARM/TEXAS INSTRUMENTS K3 ARCHITECTURE
|
ARM/TEXAS INSTRUMENTS K3 ARCHITECTURE
|
||||||
M: Nishanth Menon <nm@ti.com>
|
M: Nishanth Menon <nm@ti.com>
|
||||||
|
M: Vignesh Raghavendra <vigneshr@ti.com>
|
||||||
M: Tero Kristo <kristo@kernel.org>
|
M: Tero Kristo <kristo@kernel.org>
|
||||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||||
S: Supported
|
S: Supported
|
||||||
@ -7338,10 +7343,11 @@ F: include/uapi/linux/fpga-dfl.h
|
|||||||
|
|
||||||
FPGA MANAGER FRAMEWORK
|
FPGA MANAGER FRAMEWORK
|
||||||
M: Moritz Fischer <mdf@kernel.org>
|
M: Moritz Fischer <mdf@kernel.org>
|
||||||
|
M: Wu Hao <hao.wu@intel.com>
|
||||||
|
M: Xu Yilun <yilun.xu@intel.com>
|
||||||
R: Tom Rix <trix@redhat.com>
|
R: Tom Rix <trix@redhat.com>
|
||||||
L: linux-fpga@vger.kernel.org
|
L: linux-fpga@vger.kernel.org
|
||||||
S: Maintained
|
S: Maintained
|
||||||
W: http://www.rocketboards.org
|
|
||||||
Q: http://patchwork.kernel.org/project/linux-fpga/list/
|
Q: http://patchwork.kernel.org/project/linux-fpga/list/
|
||||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga.git
|
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga.git
|
||||||
F: Documentation/devicetree/bindings/fpga/
|
F: Documentation/devicetree/bindings/fpga/
|
||||||
@ -7435,7 +7441,7 @@ FREESCALE IMX / MXC FEC DRIVER
|
|||||||
M: Joakim Zhang <qiangqing.zhang@nxp.com>
|
M: Joakim Zhang <qiangqing.zhang@nxp.com>
|
||||||
L: netdev@vger.kernel.org
|
L: netdev@vger.kernel.org
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: Documentation/devicetree/bindings/net/fsl-fec.txt
|
F: Documentation/devicetree/bindings/net/fsl,fec.yaml
|
||||||
F: drivers/net/ethernet/freescale/fec.h
|
F: drivers/net/ethernet/freescale/fec.h
|
||||||
F: drivers/net/ethernet/freescale/fec_main.c
|
F: drivers/net/ethernet/freescale/fec_main.c
|
||||||
F: drivers/net/ethernet/freescale/fec_ptp.c
|
F: drivers/net/ethernet/freescale/fec_ptp.c
|
||||||
@ -8609,9 +8615,8 @@ F: Documentation/devicetree/bindings/iio/humidity/st,hts221.yaml
|
|||||||
F: drivers/iio/humidity/hts221*
|
F: drivers/iio/humidity/hts221*
|
||||||
|
|
||||||
HUAWEI ETHERNET DRIVER
|
HUAWEI ETHERNET DRIVER
|
||||||
M: Bin Luo <luobin9@huawei.com>
|
|
||||||
L: netdev@vger.kernel.org
|
L: netdev@vger.kernel.org
|
||||||
S: Supported
|
S: Orphan
|
||||||
F: Documentation/networking/device_drivers/ethernet/huawei/hinic.rst
|
F: Documentation/networking/device_drivers/ethernet/huawei/hinic.rst
|
||||||
F: drivers/net/ethernet/huawei/hinic/
|
F: drivers/net/ethernet/huawei/hinic/
|
||||||
|
|
||||||
@ -9303,7 +9308,7 @@ S: Maintained
|
|||||||
F: drivers/platform/x86/intel/atomisp2/led.c
|
F: drivers/platform/x86/intel/atomisp2/led.c
|
||||||
|
|
||||||
INTEL BIOS SAR INT1092 DRIVER
|
INTEL BIOS SAR INT1092 DRIVER
|
||||||
M: Shravan S <s.shravan@intel.com>
|
M: Shravan Sudhakar <s.shravan@intel.com>
|
||||||
M: Intel Corporation <linuxwwan@intel.com>
|
M: Intel Corporation <linuxwwan@intel.com>
|
||||||
L: platform-driver-x86@vger.kernel.org
|
L: platform-driver-x86@vger.kernel.org
|
||||||
S: Maintained
|
S: Maintained
|
||||||
@ -9625,7 +9630,7 @@ F: include/uapi/linux/isst_if.h
|
|||||||
F: tools/power/x86/intel-speed-select/
|
F: tools/power/x86/intel-speed-select/
|
||||||
|
|
||||||
INTEL STRATIX10 FIRMWARE DRIVERS
|
INTEL STRATIX10 FIRMWARE DRIVERS
|
||||||
M: Richard Gong <richard.gong@linux.intel.com>
|
M: Dinh Nguyen <dinguyen@kernel.org>
|
||||||
L: linux-kernel@vger.kernel.org
|
L: linux-kernel@vger.kernel.org
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: Documentation/ABI/testing/sysfs-devices-platform-stratix10-rsu
|
F: Documentation/ABI/testing/sysfs-devices-platform-stratix10-rsu
|
||||||
@ -10275,7 +10280,6 @@ KERNEL VIRTUAL MACHINE for s390 (KVM/s390)
|
|||||||
M: Christian Borntraeger <borntraeger@de.ibm.com>
|
M: Christian Borntraeger <borntraeger@de.ibm.com>
|
||||||
M: Janosch Frank <frankja@linux.ibm.com>
|
M: Janosch Frank <frankja@linux.ibm.com>
|
||||||
R: David Hildenbrand <david@redhat.com>
|
R: David Hildenbrand <david@redhat.com>
|
||||||
R: Cornelia Huck <cohuck@redhat.com>
|
|
||||||
R: Claudio Imbrenda <imbrenda@linux.ibm.com>
|
R: Claudio Imbrenda <imbrenda@linux.ibm.com>
|
||||||
L: kvm@vger.kernel.org
|
L: kvm@vger.kernel.org
|
||||||
S: Supported
|
S: Supported
|
||||||
@ -11149,6 +11153,7 @@ S: Maintained
|
|||||||
F: Documentation/devicetree/bindings/net/dsa/marvell.txt
|
F: Documentation/devicetree/bindings/net/dsa/marvell.txt
|
||||||
F: Documentation/networking/devlink/mv88e6xxx.rst
|
F: Documentation/networking/devlink/mv88e6xxx.rst
|
||||||
F: drivers/net/dsa/mv88e6xxx/
|
F: drivers/net/dsa/mv88e6xxx/
|
||||||
|
F: include/linux/dsa/mv88e6xxx.h
|
||||||
F: include/linux/platform_data/mv88e6xxx.h
|
F: include/linux/platform_data/mv88e6xxx.h
|
||||||
|
|
||||||
MARVELL ARMADA 3700 PHY DRIVERS
|
MARVELL ARMADA 3700 PHY DRIVERS
|
||||||
@ -16297,6 +16302,7 @@ S390
|
|||||||
M: Heiko Carstens <hca@linux.ibm.com>
|
M: Heiko Carstens <hca@linux.ibm.com>
|
||||||
M: Vasily Gorbik <gor@linux.ibm.com>
|
M: Vasily Gorbik <gor@linux.ibm.com>
|
||||||
M: Christian Borntraeger <borntraeger@de.ibm.com>
|
M: Christian Borntraeger <borntraeger@de.ibm.com>
|
||||||
|
R: Alexander Gordeev <agordeev@linux.ibm.com>
|
||||||
L: linux-s390@vger.kernel.org
|
L: linux-s390@vger.kernel.org
|
||||||
S: Supported
|
S: Supported
|
||||||
W: http://www.ibm.com/developerworks/linux/linux390/
|
W: http://www.ibm.com/developerworks/linux/linux390/
|
||||||
@ -16375,7 +16381,6 @@ F: drivers/s390/crypto/vfio_ap_ops.c
|
|||||||
F: drivers/s390/crypto/vfio_ap_private.h
|
F: drivers/s390/crypto/vfio_ap_private.h
|
||||||
|
|
||||||
S390 VFIO-CCW DRIVER
|
S390 VFIO-CCW DRIVER
|
||||||
M: Cornelia Huck <cohuck@redhat.com>
|
|
||||||
M: Eric Farman <farman@linux.ibm.com>
|
M: Eric Farman <farman@linux.ibm.com>
|
||||||
M: Matthew Rosato <mjrosato@linux.ibm.com>
|
M: Matthew Rosato <mjrosato@linux.ibm.com>
|
||||||
R: Halil Pasic <pasic@linux.ibm.com>
|
R: Halil Pasic <pasic@linux.ibm.com>
|
||||||
@ -17794,7 +17799,6 @@ F: drivers/staging/nvec/
|
|||||||
|
|
||||||
STAGING - OLPC SECONDARY DISPLAY CONTROLLER (DCON)
|
STAGING - OLPC SECONDARY DISPLAY CONTROLLER (DCON)
|
||||||
M: Jens Frederich <jfrederich@gmail.com>
|
M: Jens Frederich <jfrederich@gmail.com>
|
||||||
M: Daniel Drake <dsd@laptop.org>
|
|
||||||
M: Jon Nettleton <jon.nettleton@gmail.com>
|
M: Jon Nettleton <jon.nettleton@gmail.com>
|
||||||
S: Maintained
|
S: Maintained
|
||||||
W: http://wiki.laptop.org/go/DCON
|
W: http://wiki.laptop.org/go/DCON
|
||||||
@ -17983,7 +17987,7 @@ F: net/switchdev/
|
|||||||
SY8106A REGULATOR DRIVER
|
SY8106A REGULATOR DRIVER
|
||||||
M: Icenowy Zheng <icenowy@aosc.io>
|
M: Icenowy Zheng <icenowy@aosc.io>
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: Documentation/devicetree/bindings/regulator/sy8106a-regulator.txt
|
F: Documentation/devicetree/bindings/regulator/silergy,sy8106a.yaml
|
||||||
F: drivers/regulator/sy8106a-regulator.c
|
F: drivers/regulator/sy8106a-regulator.c
|
||||||
|
|
||||||
SYNC FILE FRAMEWORK
|
SYNC FILE FRAMEWORK
|
||||||
@ -20700,7 +20704,6 @@ S: Maintained
|
|||||||
F: mm/zbud.c
|
F: mm/zbud.c
|
||||||
|
|
||||||
ZD1211RW WIRELESS DRIVER
|
ZD1211RW WIRELESS DRIVER
|
||||||
M: Daniel Drake <dsd@gentoo.org>
|
|
||||||
M: Ulrich Kunitz <kune@deine-taler.de>
|
M: Ulrich Kunitz <kune@deine-taler.de>
|
||||||
L: linux-wireless@vger.kernel.org
|
L: linux-wireless@vger.kernel.org
|
||||||
L: zd1211-devs@lists.sourceforge.net (subscribers-only)
|
L: zd1211-devs@lists.sourceforge.net (subscribers-only)
|
||||||
|
2
Makefile
2
Makefile
@ -2,7 +2,7 @@
|
|||||||
VERSION = 5
|
VERSION = 5
|
||||||
PATCHLEVEL = 15
|
PATCHLEVEL = 15
|
||||||
SUBLEVEL = 0
|
SUBLEVEL = 0
|
||||||
EXTRAVERSION = -rc4
|
EXTRAVERSION = -rc6
|
||||||
NAME = Opossums on Parade
|
NAME = Opossums on Parade
|
||||||
|
|
||||||
# *DOCUMENTATION*
|
# *DOCUMENTATION*
|
||||||
|
@ -26,11 +26,6 @@ extern char empty_zero_page[PAGE_SIZE];
|
|||||||
|
|
||||||
extern pgd_t swapper_pg_dir[] __aligned(PAGE_SIZE);
|
extern pgd_t swapper_pg_dir[] __aligned(PAGE_SIZE);
|
||||||
|
|
||||||
/* Macro to mark a page protection as uncacheable */
|
|
||||||
#define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) & ~_PAGE_CACHEABLE))
|
|
||||||
|
|
||||||
extern pgd_t swapper_pg_dir[] __aligned(PAGE_SIZE);
|
|
||||||
|
|
||||||
/* to cope with aliasing VIPT cache */
|
/* to cope with aliasing VIPT cache */
|
||||||
#define HAVE_ARCH_UNMAPPED_AREA
|
#define HAVE_ARCH_UNMAPPED_AREA
|
||||||
|
|
||||||
|
@ -1989,8 +1989,6 @@ config ARCH_HIBERNATION_POSSIBLE
|
|||||||
|
|
||||||
endmenu
|
endmenu
|
||||||
|
|
||||||
source "drivers/firmware/Kconfig"
|
|
||||||
|
|
||||||
if CRYPTO
|
if CRYPTO
|
||||||
source "arch/arm/crypto/Kconfig"
|
source "arch/arm/crypto/Kconfig"
|
||||||
endif
|
endif
|
||||||
|
@ -71,7 +71,6 @@
|
|||||||
isc: isc@f0008000 {
|
isc: isc@f0008000 {
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&pinctrl_isc_base &pinctrl_isc_data_8bit &pinctrl_isc_data_9_10 &pinctrl_isc_data_11_12>;
|
pinctrl-0 = <&pinctrl_isc_base &pinctrl_isc_data_8bit &pinctrl_isc_data_9_10 &pinctrl_isc_data_11_12>;
|
||||||
status = "okay";
|
|
||||||
};
|
};
|
||||||
|
|
||||||
qspi1: spi@f0024000 {
|
qspi1: spi@f0024000 {
|
||||||
|
@ -196,11 +196,13 @@
|
|||||||
|
|
||||||
regulator-state-standby {
|
regulator-state-standby {
|
||||||
regulator-on-in-suspend;
|
regulator-on-in-suspend;
|
||||||
|
regulator-suspend-microvolt = <1350000>;
|
||||||
regulator-mode = <4>;
|
regulator-mode = <4>;
|
||||||
};
|
};
|
||||||
|
|
||||||
regulator-state-mem {
|
regulator-state-mem {
|
||||||
regulator-on-in-suspend;
|
regulator-on-in-suspend;
|
||||||
|
regulator-suspend-microvolt = <1350000>;
|
||||||
regulator-mode = <4>;
|
regulator-mode = <4>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
@ -353,7 +355,10 @@
|
|||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&pinctrl_gmac0_default &pinctrl_gmac0_txck_default &pinctrl_gmac0_phy_irq>;
|
pinctrl-0 = <&pinctrl_gmac0_default
|
||||||
|
&pinctrl_gmac0_mdio_default
|
||||||
|
&pinctrl_gmac0_txck_default
|
||||||
|
&pinctrl_gmac0_phy_irq>;
|
||||||
phy-mode = "rgmii-id";
|
phy-mode = "rgmii-id";
|
||||||
status = "okay";
|
status = "okay";
|
||||||
|
|
||||||
@ -368,7 +373,9 @@
|
|||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&pinctrl_gmac1_default &pinctrl_gmac1_phy_irq>;
|
pinctrl-0 = <&pinctrl_gmac1_default
|
||||||
|
&pinctrl_gmac1_mdio_default
|
||||||
|
&pinctrl_gmac1_phy_irq>;
|
||||||
phy-mode = "rmii";
|
phy-mode = "rmii";
|
||||||
status = "okay";
|
status = "okay";
|
||||||
|
|
||||||
@ -423,14 +430,20 @@
|
|||||||
<PIN_PA15__G0_TXEN>,
|
<PIN_PA15__G0_TXEN>,
|
||||||
<PIN_PA30__G0_RXCK>,
|
<PIN_PA30__G0_RXCK>,
|
||||||
<PIN_PA18__G0_RXDV>,
|
<PIN_PA18__G0_RXDV>,
|
||||||
<PIN_PA22__G0_MDC>,
|
|
||||||
<PIN_PA23__G0_MDIO>,
|
|
||||||
<PIN_PA25__G0_125CK>;
|
<PIN_PA25__G0_125CK>;
|
||||||
|
slew-rate = <0>;
|
||||||
|
bias-disable;
|
||||||
|
};
|
||||||
|
|
||||||
|
pinctrl_gmac0_mdio_default: gmac0_mdio_default {
|
||||||
|
pinmux = <PIN_PA22__G0_MDC>,
|
||||||
|
<PIN_PA23__G0_MDIO>;
|
||||||
bias-disable;
|
bias-disable;
|
||||||
};
|
};
|
||||||
|
|
||||||
pinctrl_gmac0_txck_default: gmac0_txck_default {
|
pinctrl_gmac0_txck_default: gmac0_txck_default {
|
||||||
pinmux = <PIN_PA24__G0_TXCK>;
|
pinmux = <PIN_PA24__G0_TXCK>;
|
||||||
|
slew-rate = <0>;
|
||||||
bias-pull-up;
|
bias-pull-up;
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -447,8 +460,13 @@
|
|||||||
<PIN_PD25__G1_RX0>,
|
<PIN_PD25__G1_RX0>,
|
||||||
<PIN_PD26__G1_RX1>,
|
<PIN_PD26__G1_RX1>,
|
||||||
<PIN_PD27__G1_RXER>,
|
<PIN_PD27__G1_RXER>,
|
||||||
<PIN_PD24__G1_RXDV>,
|
<PIN_PD24__G1_RXDV>;
|
||||||
<PIN_PD28__G1_MDC>,
|
slew-rate = <0>;
|
||||||
|
bias-disable;
|
||||||
|
};
|
||||||
|
|
||||||
|
pinctrl_gmac1_mdio_default: gmac1_mdio_default {
|
||||||
|
pinmux = <PIN_PD28__G1_MDC>,
|
||||||
<PIN_PD29__G1_MDIO>;
|
<PIN_PD29__G1_MDIO>;
|
||||||
bias-disable;
|
bias-disable;
|
||||||
};
|
};
|
||||||
@ -540,6 +558,7 @@
|
|||||||
<PIN_PA8__SDMMC0_DAT5>,
|
<PIN_PA8__SDMMC0_DAT5>,
|
||||||
<PIN_PA9__SDMMC0_DAT6>,
|
<PIN_PA9__SDMMC0_DAT6>,
|
||||||
<PIN_PA10__SDMMC0_DAT7>;
|
<PIN_PA10__SDMMC0_DAT7>;
|
||||||
|
slew-rate = <0>;
|
||||||
bias-pull-up;
|
bias-pull-up;
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -547,6 +566,7 @@
|
|||||||
pinmux = <PIN_PA0__SDMMC0_CK>,
|
pinmux = <PIN_PA0__SDMMC0_CK>,
|
||||||
<PIN_PA2__SDMMC0_RSTN>,
|
<PIN_PA2__SDMMC0_RSTN>,
|
||||||
<PIN_PA11__SDMMC0_DS>;
|
<PIN_PA11__SDMMC0_DS>;
|
||||||
|
slew-rate = <0>;
|
||||||
bias-pull-up;
|
bias-pull-up;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
@ -558,6 +578,7 @@
|
|||||||
<PIN_PC0__SDMMC1_DAT1>,
|
<PIN_PC0__SDMMC1_DAT1>,
|
||||||
<PIN_PC1__SDMMC1_DAT2>,
|
<PIN_PC1__SDMMC1_DAT2>,
|
||||||
<PIN_PC2__SDMMC1_DAT3>;
|
<PIN_PC2__SDMMC1_DAT3>;
|
||||||
|
slew-rate = <0>;
|
||||||
bias-pull-up;
|
bias-pull-up;
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -566,6 +587,7 @@
|
|||||||
<PIN_PB28__SDMMC1_RSTN>,
|
<PIN_PB28__SDMMC1_RSTN>,
|
||||||
<PIN_PC5__SDMMC1_1V8SEL>,
|
<PIN_PC5__SDMMC1_1V8SEL>,
|
||||||
<PIN_PC4__SDMMC1_CD>;
|
<PIN_PC4__SDMMC1_CD>;
|
||||||
|
slew-rate = <0>;
|
||||||
bias-pull-up;
|
bias-pull-up;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
@ -577,11 +599,13 @@
|
|||||||
<PIN_PD6__SDMMC2_DAT1>,
|
<PIN_PD6__SDMMC2_DAT1>,
|
||||||
<PIN_PD7__SDMMC2_DAT2>,
|
<PIN_PD7__SDMMC2_DAT2>,
|
||||||
<PIN_PD8__SDMMC2_DAT3>;
|
<PIN_PD8__SDMMC2_DAT3>;
|
||||||
|
slew-rate = <0>;
|
||||||
bias-pull-up;
|
bias-pull-up;
|
||||||
};
|
};
|
||||||
|
|
||||||
ck {
|
ck {
|
||||||
pinmux = <PIN_PD4__SDMMC2_CK>;
|
pinmux = <PIN_PD4__SDMMC2_CK>;
|
||||||
|
slew-rate = <0>;
|
||||||
bias-pull-up;
|
bias-pull-up;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
@ -634,6 +658,15 @@
|
|||||||
pinctrl-0 = <&pinctrl_sdmmc2_default>;
|
pinctrl-0 = <&pinctrl_sdmmc2_default>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
&shdwc {
|
||||||
|
atmel,shdwc-debouncer = <976>;
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
input@0 {
|
||||||
|
reg = <0>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
&spdifrx {
|
&spdifrx {
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&pinctrl_spdifrx_default>;
|
pinctrl-0 = <&pinctrl_spdifrx_default>;
|
||||||
|
@ -40,8 +40,8 @@
|
|||||||
regulator-always-on;
|
regulator-always-on;
|
||||||
regulator-settling-time-us = <5000>;
|
regulator-settling-time-us = <5000>;
|
||||||
gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
|
gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
|
||||||
states = <1800000 0x1
|
states = <1800000 0x1>,
|
||||||
3300000 0x0>;
|
<3300000 0x0>;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -217,15 +217,16 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
&pcie0 {
|
&pcie0 {
|
||||||
pci@1,0 {
|
pci@0,0 {
|
||||||
|
device_type = "pci";
|
||||||
#address-cells = <3>;
|
#address-cells = <3>;
|
||||||
#size-cells = <2>;
|
#size-cells = <2>;
|
||||||
ranges;
|
ranges;
|
||||||
|
|
||||||
reg = <0 0 0 0 0>;
|
reg = <0 0 0 0 0>;
|
||||||
|
|
||||||
usb@1,0 {
|
usb@0,0 {
|
||||||
reg = <0x10000 0 0 0 0>;
|
reg = <0 0 0 0 0>;
|
||||||
resets = <&reset RASPBERRYPI_FIRMWARE_RESET_ID_USB>;
|
resets = <&reset RASPBERRYPI_FIRMWARE_RESET_ID_USB>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
@ -300,6 +300,14 @@
|
|||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
vec: vec@7ec13000 {
|
||||||
|
compatible = "brcm,bcm2711-vec";
|
||||||
|
reg = <0x7ec13000 0x1000>;
|
||||||
|
clocks = <&clocks BCM2835_CLOCK_VEC>;
|
||||||
|
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
dvp: clock@7ef00000 {
|
dvp: clock@7ef00000 {
|
||||||
compatible = "brcm,brcm2711-dvp";
|
compatible = "brcm,brcm2711-dvp";
|
||||||
reg = <0x7ef00000 0x10>;
|
reg = <0x7ef00000 0x10>;
|
||||||
@ -532,8 +540,8 @@
|
|||||||
compatible = "brcm,genet-mdio-v5";
|
compatible = "brcm,genet-mdio-v5";
|
||||||
reg = <0xe14 0x8>;
|
reg = <0xe14 0x8>;
|
||||||
reg-names = "mdio";
|
reg-names = "mdio";
|
||||||
#address-cells = <0x0>;
|
#address-cells = <0x1>;
|
||||||
#size-cells = <0x1>;
|
#size-cells = <0x0>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
@ -106,6 +106,14 @@
|
|||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
vec: vec@7e806000 {
|
||||||
|
compatible = "brcm,bcm2835-vec";
|
||||||
|
reg = <0x7e806000 0x1000>;
|
||||||
|
clocks = <&clocks BCM2835_CLOCK_VEC>;
|
||||||
|
interrupts = <2 27>;
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
pixelvalve@7e807000 {
|
pixelvalve@7e807000 {
|
||||||
compatible = "brcm,bcm2835-pixelvalve2";
|
compatible = "brcm,bcm2835-pixelvalve2";
|
||||||
reg = <0x7e807000 0x100>;
|
reg = <0x7e807000 0x100>;
|
||||||
|
@ -464,14 +464,6 @@
|
|||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
vec: vec@7e806000 {
|
|
||||||
compatible = "brcm,bcm2835-vec";
|
|
||||||
reg = <0x7e806000 0x1000>;
|
|
||||||
clocks = <&clocks BCM2835_CLOCK_VEC>;
|
|
||||||
interrupts = <2 27>;
|
|
||||||
status = "disabled";
|
|
||||||
};
|
|
||||||
|
|
||||||
usb: usb@7e980000 {
|
usb: usb@7e980000 {
|
||||||
compatible = "brcm,bcm2835-usb";
|
compatible = "brcm,bcm2835-usb";
|
||||||
reg = <0x7e980000 0x10000>;
|
reg = <0x7e980000 0x10000>;
|
||||||
|
@ -56,6 +56,7 @@
|
|||||||
panel {
|
panel {
|
||||||
compatible = "edt,etm0700g0dh6";
|
compatible = "edt,etm0700g0dh6";
|
||||||
pinctrl-0 = <&pinctrl_display_gpio>;
|
pinctrl-0 = <&pinctrl_display_gpio>;
|
||||||
|
pinctrl-names = "default";
|
||||||
enable-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>;
|
enable-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>;
|
||||||
|
|
||||||
port {
|
port {
|
||||||
@ -76,8 +77,7 @@
|
|||||||
regulator-name = "vbus";
|
regulator-name = "vbus";
|
||||||
regulator-min-microvolt = <5000000>;
|
regulator-min-microvolt = <5000000>;
|
||||||
regulator-max-microvolt = <5000000>;
|
regulator-max-microvolt = <5000000>;
|
||||||
gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
|
gpio = <&gpio1 2 0>;
|
||||||
enable-active-high;
|
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -5,6 +5,7 @@
|
|||||||
#include <dt-bindings/gpio/gpio.h>
|
#include <dt-bindings/gpio/gpio.h>
|
||||||
#include <dt-bindings/interrupt-controller/irq.h>
|
#include <dt-bindings/interrupt-controller/irq.h>
|
||||||
#include <dt-bindings/input/input.h>
|
#include <dt-bindings/input/input.h>
|
||||||
|
#include <dt-bindings/leds/common.h>
|
||||||
#include <dt-bindings/pwm/pwm.h>
|
#include <dt-bindings/pwm/pwm.h>
|
||||||
|
|
||||||
/ {
|
/ {
|
||||||
@ -277,6 +278,7 @@
|
|||||||
led-cur = /bits/ 8 <0x20>;
|
led-cur = /bits/ 8 <0x20>;
|
||||||
max-cur = /bits/ 8 <0x60>;
|
max-cur = /bits/ 8 <0x60>;
|
||||||
reg = <0>;
|
reg = <0>;
|
||||||
|
color = <LED_COLOR_ID_RED>;
|
||||||
};
|
};
|
||||||
|
|
||||||
chan@1 {
|
chan@1 {
|
||||||
@ -284,6 +286,7 @@
|
|||||||
led-cur = /bits/ 8 <0x20>;
|
led-cur = /bits/ 8 <0x20>;
|
||||||
max-cur = /bits/ 8 <0x60>;
|
max-cur = /bits/ 8 <0x60>;
|
||||||
reg = <1>;
|
reg = <1>;
|
||||||
|
color = <LED_COLOR_ID_GREEN>;
|
||||||
};
|
};
|
||||||
|
|
||||||
chan@2 {
|
chan@2 {
|
||||||
@ -291,6 +294,7 @@
|
|||||||
led-cur = /bits/ 8 <0x20>;
|
led-cur = /bits/ 8 <0x20>;
|
||||||
max-cur = /bits/ 8 <0x60>;
|
max-cur = /bits/ 8 <0x60>;
|
||||||
reg = <2>;
|
reg = <2>;
|
||||||
|
color = <LED_COLOR_ID_BLUE>;
|
||||||
};
|
};
|
||||||
|
|
||||||
chan@3 {
|
chan@3 {
|
||||||
@ -298,6 +302,7 @@
|
|||||||
led-cur = /bits/ 8 <0x0>;
|
led-cur = /bits/ 8 <0x0>;
|
||||||
max-cur = /bits/ 8 <0x0>;
|
max-cur = /bits/ 8 <0x0>;
|
||||||
reg = <3>;
|
reg = <3>;
|
||||||
|
color = <LED_COLOR_ID_WHITE>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -176,7 +176,18 @@
|
|||||||
pinctrl-0 = <&pinctrl_enet>;
|
pinctrl-0 = <&pinctrl_enet>;
|
||||||
phy-mode = "rgmii-id";
|
phy-mode = "rgmii-id";
|
||||||
phy-reset-gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
|
phy-reset-gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
|
||||||
|
phy-handle = <&phy>;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
|
|
||||||
|
mdio {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
phy: ethernet-phy@1 {
|
||||||
|
reg = <1>;
|
||||||
|
qca,clk-out-frequency = <125000000>;
|
||||||
|
};
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
&hdmi {
|
&hdmi {
|
||||||
|
@ -114,7 +114,7 @@
|
|||||||
compatible = "micron,n25q256a", "jedec,spi-nor";
|
compatible = "micron,n25q256a", "jedec,spi-nor";
|
||||||
spi-max-frequency = <29000000>;
|
spi-max-frequency = <29000000>;
|
||||||
spi-rx-bus-width = <4>;
|
spi-rx-bus-width = <4>;
|
||||||
spi-tx-bus-width = <4>;
|
spi-tx-bus-width = <1>;
|
||||||
reg = <0>;
|
reg = <0>;
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -124,7 +124,7 @@
|
|||||||
compatible = "micron,n25q256a", "jedec,spi-nor";
|
compatible = "micron,n25q256a", "jedec,spi-nor";
|
||||||
spi-max-frequency = <29000000>;
|
spi-max-frequency = <29000000>;
|
||||||
spi-rx-bus-width = <4>;
|
spi-rx-bus-width = <4>;
|
||||||
spi-tx-bus-width = <4>;
|
spi-tx-bus-width = <1>;
|
||||||
reg = <2>;
|
reg = <2>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
@ -292,7 +292,7 @@
|
|||||||
compatible = "micron,n25q256a", "jedec,spi-nor";
|
compatible = "micron,n25q256a", "jedec,spi-nor";
|
||||||
spi-max-frequency = <29000000>;
|
spi-max-frequency = <29000000>;
|
||||||
spi-rx-bus-width = <4>;
|
spi-rx-bus-width = <4>;
|
||||||
spi-tx-bus-width = <4>;
|
spi-tx-bus-width = <1>;
|
||||||
reg = <0>;
|
reg = <0>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
@ -101,7 +101,7 @@
|
|||||||
|
|
||||||
nand@1,0 {
|
nand@1,0 {
|
||||||
compatible = "ti,omap2-nand";
|
compatible = "ti,omap2-nand";
|
||||||
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
|
reg = <1 0 4>; /* CS1, offset 0, IO size 4 */
|
||||||
interrupt-parent = <&gpmc>;
|
interrupt-parent = <&gpmc>;
|
||||||
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
|
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
|
||||||
<1 IRQ_TYPE_NONE>; /* termcount */
|
<1 IRQ_TYPE_NONE>; /* termcount */
|
||||||
|
@ -198,7 +198,7 @@
|
|||||||
clock-frequency = <19200000>;
|
clock-frequency = <19200000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
pxo_board {
|
pxo_board: pxo_board {
|
||||||
compatible = "fixed-clock";
|
compatible = "fixed-clock";
|
||||||
#clock-cells = <0>;
|
#clock-cells = <0>;
|
||||||
clock-frequency = <27000000>;
|
clock-frequency = <27000000>;
|
||||||
@ -1148,22 +1148,21 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
gpu: adreno-3xx@4300000 {
|
gpu: adreno-3xx@4300000 {
|
||||||
compatible = "qcom,adreno-3xx";
|
compatible = "qcom,adreno-320.2", "qcom,adreno";
|
||||||
reg = <0x04300000 0x20000>;
|
reg = <0x04300000 0x20000>;
|
||||||
reg-names = "kgsl_3d0_reg_memory";
|
reg-names = "kgsl_3d0_reg_memory";
|
||||||
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "kgsl_3d0_irq";
|
interrupt-names = "kgsl_3d0_irq";
|
||||||
clock-names =
|
clock-names =
|
||||||
"core_clk",
|
"core",
|
||||||
"iface_clk",
|
"iface",
|
||||||
"mem_clk",
|
"mem",
|
||||||
"mem_iface_clk";
|
"mem_iface";
|
||||||
clocks =
|
clocks =
|
||||||
<&mmcc GFX3D_CLK>,
|
<&mmcc GFX3D_CLK>,
|
||||||
<&mmcc GFX3D_AHB_CLK>,
|
<&mmcc GFX3D_AHB_CLK>,
|
||||||
<&mmcc GFX3D_AXI_CLK>,
|
<&mmcc GFX3D_AXI_CLK>,
|
||||||
<&mmcc MMSS_IMEM_AHB_CLK>;
|
<&mmcc MMSS_IMEM_AHB_CLK>;
|
||||||
qcom,chipid = <0x03020002>;
|
|
||||||
|
|
||||||
iommus = <&gfx3d 0
|
iommus = <&gfx3d 0
|
||||||
&gfx3d 1
|
&gfx3d 1
|
||||||
@ -1306,7 +1305,7 @@
|
|||||||
reg-names = "dsi_pll", "dsi_phy", "dsi_phy_regulator";
|
reg-names = "dsi_pll", "dsi_phy", "dsi_phy_regulator";
|
||||||
clock-names = "iface_clk", "ref";
|
clock-names = "iface_clk", "ref";
|
||||||
clocks = <&mmcc DSI_M_AHB_CLK>,
|
clocks = <&mmcc DSI_M_AHB_CLK>,
|
||||||
<&cxo_board>;
|
<&pxo_board>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
|
@ -75,6 +75,17 @@
|
|||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
ranges;
|
ranges;
|
||||||
|
|
||||||
|
securam: securam@e0000000 {
|
||||||
|
compatible = "microchip,sama7g5-securam", "atmel,sama5d2-securam", "mmio-sram";
|
||||||
|
reg = <0xe0000000 0x4000>;
|
||||||
|
clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
ranges = <0 0xe0000000 0x4000>;
|
||||||
|
no-memory-wc;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
secumod: secumod@e0004000 {
|
secumod: secumod@e0004000 {
|
||||||
compatible = "microchip,sama7g5-secumod", "atmel,sama5d2-secumod", "syscon";
|
compatible = "microchip,sama7g5-secumod", "atmel,sama5d2-secumod", "syscon";
|
||||||
reg = <0xe0004000 0x4000>;
|
reg = <0xe0004000 0x4000>;
|
||||||
@ -111,6 +122,17 @@
|
|||||||
clock-names = "td_slck", "md_slck", "main_xtal";
|
clock-names = "td_slck", "md_slck", "main_xtal";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
shdwc: shdwc@e001d010 {
|
||||||
|
compatible = "microchip,sama7g5-shdwc", "syscon";
|
||||||
|
reg = <0xe001d010 0x10>;
|
||||||
|
clocks = <&clk32k 0>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
atmel,wakeup-rtc-timer;
|
||||||
|
atmel,wakeup-rtt-timer;
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
rtt: rtt@e001d020 {
|
rtt: rtt@e001d020 {
|
||||||
compatible = "microchip,sama7g5-rtt", "microchip,sam9x60-rtt", "atmel,at91sam9260-rtt";
|
compatible = "microchip,sama7g5-rtt", "microchip,sam9x60-rtt", "atmel,at91sam9260-rtt";
|
||||||
reg = <0xe001d020 0x30>;
|
reg = <0xe001d020 0x30>;
|
||||||
@ -137,6 +159,11 @@
|
|||||||
clocks = <&clk32k 0>;
|
clocks = <&clk32k 0>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
chipid@e0020000 {
|
||||||
|
compatible = "microchip,sama7g5-chipid";
|
||||||
|
reg = <0xe0020000 0x8>;
|
||||||
|
};
|
||||||
|
|
||||||
sdmmc0: mmc@e1204000 {
|
sdmmc0: mmc@e1204000 {
|
||||||
compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
|
compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
|
||||||
reg = <0xe1204000 0x4000>;
|
reg = <0xe1204000 0x4000>;
|
||||||
@ -515,6 +542,18 @@
|
|||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
uddrc: uddrc@e3800000 {
|
||||||
|
compatible = "microchip,sama7g5-uddrc";
|
||||||
|
reg = <0xe3800000 0x4000>;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
ddr3phy: ddr3phy@e3804000 {
|
||||||
|
compatible = "microchip,sama7g5-ddr3phy";
|
||||||
|
reg = <0xe3804000 0x1000>;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
gic: interrupt-controller@e8c11000 {
|
gic: interrupt-controller@e8c11000 {
|
||||||
compatible = "arm,cortex-a7-gic";
|
compatible = "arm,cortex-a7-gic";
|
||||||
#interrupt-cells = <3>;
|
#interrupt-cells = <3>;
|
||||||
|
@ -47,7 +47,7 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
gmac: eth@e0800000 {
|
gmac: eth@e0800000 {
|
||||||
compatible = "st,spear600-gmac";
|
compatible = "snps,dwmac-3.40a";
|
||||||
reg = <0xe0800000 0x8000>;
|
reg = <0xe0800000 0x8000>;
|
||||||
interrupts = <23 22>;
|
interrupts = <23 22>;
|
||||||
interrupt-names = "macirq", "eth_wake_irq";
|
interrupt-names = "macirq", "eth_wake_irq";
|
||||||
|
@ -17,6 +17,7 @@
|
|||||||
* TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT
|
* TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT
|
||||||
* CHANGES TO vexpress-v2m.dtsi!
|
* CHANGES TO vexpress-v2m.dtsi!
|
||||||
*/
|
*/
|
||||||
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||||
|
|
||||||
/ {
|
/ {
|
||||||
v2m_fixed_3v3: fixed-regulator-0 {
|
v2m_fixed_3v3: fixed-regulator-0 {
|
||||||
@ -101,16 +102,68 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
bus@8000000 {
|
bus@8000000 {
|
||||||
motherboard-bus {
|
compatible = "simple-bus";
|
||||||
model = "V2M-P1";
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
|
||||||
|
#interrupt-cells = <1>;
|
||||||
|
interrupt-map-mask = <0 63>;
|
||||||
|
interrupt-map = <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 1 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 3 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 4 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 5 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 6 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 7 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 8 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 9 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 10 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 11 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 12 &gic GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 13 &gic GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 14 &gic GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 15 &gic GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 16 &gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 17 &gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 18 &gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 19 &gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 20 &gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 21 &gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 22 &gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 23 &gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 24 &gic GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 25 &gic GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 26 &gic GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 27 &gic GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 28 &gic GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 29 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 30 &gic GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 31 &gic GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 32 &gic GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 33 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 34 &gic GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 35 &gic GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 36 &gic GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 37 &gic GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 38 &gic GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 39 &gic GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 40 &gic GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 41 &gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 42 &gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
|
||||||
|
motherboard-bus@8000000 {
|
||||||
arm,hbi = <0x190>;
|
arm,hbi = <0x190>;
|
||||||
arm,vexpress,site = <0>;
|
arm,vexpress,site = <0>;
|
||||||
arm,v2m-memory-map = "rs1";
|
|
||||||
compatible = "arm,vexpress,v2m-p1", "simple-bus";
|
compatible = "arm,vexpress,v2m-p1", "simple-bus";
|
||||||
#address-cells = <2>; /* SMB chipselect number and offset */
|
#address-cells = <2>; /* SMB chipselect number and offset */
|
||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
#interrupt-cells = <1>;
|
ranges = <0 0 0x08000000 0x04000000>,
|
||||||
ranges;
|
<1 0 0x14000000 0x04000000>,
|
||||||
|
<2 0 0x18000000 0x04000000>,
|
||||||
|
<3 0 0x1c000000 0x04000000>,
|
||||||
|
<4 0 0x0c000000 0x04000000>,
|
||||||
|
<5 0 0x10000000 0x04000000>;
|
||||||
|
|
||||||
nor_flash: flash@0 {
|
nor_flash: flash@0 {
|
||||||
compatible = "arm,vexpress-flash", "cfi-flash";
|
compatible = "arm,vexpress-flash", "cfi-flash";
|
||||||
@ -215,7 +268,7 @@
|
|||||||
clock-names = "apb_pclk";
|
clock-names = "apb_pclk";
|
||||||
};
|
};
|
||||||
|
|
||||||
mmci@50000 {
|
mmc@50000 {
|
||||||
compatible = "arm,pl180", "arm,primecell";
|
compatible = "arm,pl180", "arm,primecell";
|
||||||
reg = <0x050000 0x1000>;
|
reg = <0x050000 0x1000>;
|
||||||
interrupts = <9>, <10>;
|
interrupts = <9>, <10>;
|
||||||
@ -275,7 +328,7 @@
|
|||||||
clock-names = "uartclk", "apb_pclk";
|
clock-names = "uartclk", "apb_pclk";
|
||||||
};
|
};
|
||||||
|
|
||||||
wdt@f0000 {
|
watchdog@f0000 {
|
||||||
compatible = "arm,sp805", "arm,primecell";
|
compatible = "arm,sp805", "arm,primecell";
|
||||||
reg = <0x0f0000 0x1000>;
|
reg = <0x0f0000 0x1000>;
|
||||||
interrupts = <0>;
|
interrupts = <0>;
|
||||||
|
@ -17,18 +17,73 @@
|
|||||||
* TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT
|
* TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT
|
||||||
* CHANGES TO vexpress-v2m-rs1.dtsi!
|
* CHANGES TO vexpress-v2m-rs1.dtsi!
|
||||||
*/
|
*/
|
||||||
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||||
|
|
||||||
/ {
|
/ {
|
||||||
bus@4000000 {
|
bus@40000000 {
|
||||||
motherboard {
|
compatible = "simple-bus";
|
||||||
model = "V2M-P1";
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
ranges = <0x40000000 0x40000000 0x10000000>,
|
||||||
|
<0x10000000 0x10000000 0x00020000>;
|
||||||
|
|
||||||
|
#interrupt-cells = <1>;
|
||||||
|
interrupt-map-mask = <0 63>;
|
||||||
|
interrupt-map = <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 1 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 3 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 4 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 5 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 6 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 7 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 8 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 9 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 10 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 11 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 12 &gic GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 13 &gic GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 14 &gic GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 15 &gic GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 16 &gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 17 &gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 18 &gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 19 &gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 20 &gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 21 &gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 22 &gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 23 &gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 24 &gic GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 25 &gic GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 26 &gic GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 27 &gic GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 28 &gic GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 29 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 30 &gic GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 31 &gic GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 32 &gic GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 33 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 34 &gic GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 35 &gic GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 36 &gic GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 37 &gic GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 38 &gic GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 39 &gic GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 40 &gic GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 41 &gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<0 42 &gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
|
||||||
|
motherboard-bus@40000000 {
|
||||||
arm,hbi = <0x190>;
|
arm,hbi = <0x190>;
|
||||||
arm,vexpress,site = <0>;
|
arm,vexpress,site = <0>;
|
||||||
compatible = "arm,vexpress,v2m-p1", "simple-bus";
|
compatible = "arm,vexpress,v2m-p1", "simple-bus";
|
||||||
#address-cells = <2>; /* SMB chipselect number and offset */
|
#address-cells = <2>; /* SMB chipselect number and offset */
|
||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
#interrupt-cells = <1>;
|
ranges = <0 0 0x40000000 0x04000000>,
|
||||||
ranges;
|
<1 0 0x44000000 0x04000000>,
|
||||||
|
<2 0 0x48000000 0x04000000>,
|
||||||
|
<3 0 0x4c000000 0x04000000>,
|
||||||
|
<7 0 0x10000000 0x00020000>;
|
||||||
|
|
||||||
flash@0,00000000 {
|
flash@0,00000000 {
|
||||||
compatible = "arm,vexpress-flash", "cfi-flash";
|
compatible = "arm,vexpress-flash", "cfi-flash";
|
||||||
|
@ -237,62 +237,7 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
bus@8000000 {
|
bus@8000000 {
|
||||||
compatible = "simple-bus";
|
ranges = <0x8000000 0 0x8000000 0x18000000>;
|
||||||
|
|
||||||
#address-cells = <2>;
|
|
||||||
#size-cells = <1>;
|
|
||||||
ranges = <0 0 0 0x08000000 0x04000000>,
|
|
||||||
<1 0 0 0x14000000 0x04000000>,
|
|
||||||
<2 0 0 0x18000000 0x04000000>,
|
|
||||||
<3 0 0 0x1c000000 0x04000000>,
|
|
||||||
<4 0 0 0x0c000000 0x04000000>,
|
|
||||||
<5 0 0 0x10000000 0x04000000>;
|
|
||||||
|
|
||||||
#interrupt-cells = <1>;
|
|
||||||
interrupt-map-mask = <0 0 63>;
|
|
||||||
interrupt-map = <0 0 0 &gic 0 0 4>,
|
|
||||||
<0 0 1 &gic 0 1 4>,
|
|
||||||
<0 0 2 &gic 0 2 4>,
|
|
||||||
<0 0 3 &gic 0 3 4>,
|
|
||||||
<0 0 4 &gic 0 4 4>,
|
|
||||||
<0 0 5 &gic 0 5 4>,
|
|
||||||
<0 0 6 &gic 0 6 4>,
|
|
||||||
<0 0 7 &gic 0 7 4>,
|
|
||||||
<0 0 8 &gic 0 8 4>,
|
|
||||||
<0 0 9 &gic 0 9 4>,
|
|
||||||
<0 0 10 &gic 0 10 4>,
|
|
||||||
<0 0 11 &gic 0 11 4>,
|
|
||||||
<0 0 12 &gic 0 12 4>,
|
|
||||||
<0 0 13 &gic 0 13 4>,
|
|
||||||
<0 0 14 &gic 0 14 4>,
|
|
||||||
<0 0 15 &gic 0 15 4>,
|
|
||||||
<0 0 16 &gic 0 16 4>,
|
|
||||||
<0 0 17 &gic 0 17 4>,
|
|
||||||
<0 0 18 &gic 0 18 4>,
|
|
||||||
<0 0 19 &gic 0 19 4>,
|
|
||||||
<0 0 20 &gic 0 20 4>,
|
|
||||||
<0 0 21 &gic 0 21 4>,
|
|
||||||
<0 0 22 &gic 0 22 4>,
|
|
||||||
<0 0 23 &gic 0 23 4>,
|
|
||||||
<0 0 24 &gic 0 24 4>,
|
|
||||||
<0 0 25 &gic 0 25 4>,
|
|
||||||
<0 0 26 &gic 0 26 4>,
|
|
||||||
<0 0 27 &gic 0 27 4>,
|
|
||||||
<0 0 28 &gic 0 28 4>,
|
|
||||||
<0 0 29 &gic 0 29 4>,
|
|
||||||
<0 0 30 &gic 0 30 4>,
|
|
||||||
<0 0 31 &gic 0 31 4>,
|
|
||||||
<0 0 32 &gic 0 32 4>,
|
|
||||||
<0 0 33 &gic 0 33 4>,
|
|
||||||
<0 0 34 &gic 0 34 4>,
|
|
||||||
<0 0 35 &gic 0 35 4>,
|
|
||||||
<0 0 36 &gic 0 36 4>,
|
|
||||||
<0 0 37 &gic 0 37 4>,
|
|
||||||
<0 0 38 &gic 0 38 4>,
|
|
||||||
<0 0 39 &gic 0 39 4>,
|
|
||||||
<0 0 40 &gic 0 40 4>,
|
|
||||||
<0 0 41 &gic 0 41 4>,
|
|
||||||
<0 0 42 &gic 0 42 4>;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
site2: hsb@40000000 {
|
site2: hsb@40000000 {
|
||||||
|
@ -609,62 +609,7 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
smb: bus@8000000 {
|
smb: bus@8000000 {
|
||||||
compatible = "simple-bus";
|
ranges = <0x8000000 0 0x8000000 0x18000000>;
|
||||||
|
|
||||||
#address-cells = <2>;
|
|
||||||
#size-cells = <1>;
|
|
||||||
ranges = <0 0 0 0x08000000 0x04000000>,
|
|
||||||
<1 0 0 0x14000000 0x04000000>,
|
|
||||||
<2 0 0 0x18000000 0x04000000>,
|
|
||||||
<3 0 0 0x1c000000 0x04000000>,
|
|
||||||
<4 0 0 0x0c000000 0x04000000>,
|
|
||||||
<5 0 0 0x10000000 0x04000000>;
|
|
||||||
|
|
||||||
#interrupt-cells = <1>;
|
|
||||||
interrupt-map-mask = <0 0 63>;
|
|
||||||
interrupt-map = <0 0 0 &gic 0 0 4>,
|
|
||||||
<0 0 1 &gic 0 1 4>,
|
|
||||||
<0 0 2 &gic 0 2 4>,
|
|
||||||
<0 0 3 &gic 0 3 4>,
|
|
||||||
<0 0 4 &gic 0 4 4>,
|
|
||||||
<0 0 5 &gic 0 5 4>,
|
|
||||||
<0 0 6 &gic 0 6 4>,
|
|
||||||
<0 0 7 &gic 0 7 4>,
|
|
||||||
<0 0 8 &gic 0 8 4>,
|
|
||||||
<0 0 9 &gic 0 9 4>,
|
|
||||||
<0 0 10 &gic 0 10 4>,
|
|
||||||
<0 0 11 &gic 0 11 4>,
|
|
||||||
<0 0 12 &gic 0 12 4>,
|
|
||||||
<0 0 13 &gic 0 13 4>,
|
|
||||||
<0 0 14 &gic 0 14 4>,
|
|
||||||
<0 0 15 &gic 0 15 4>,
|
|
||||||
<0 0 16 &gic 0 16 4>,
|
|
||||||
<0 0 17 &gic 0 17 4>,
|
|
||||||
<0 0 18 &gic 0 18 4>,
|
|
||||||
<0 0 19 &gic 0 19 4>,
|
|
||||||
<0 0 20 &gic 0 20 4>,
|
|
||||||
<0 0 21 &gic 0 21 4>,
|
|
||||||
<0 0 22 &gic 0 22 4>,
|
|
||||||
<0 0 23 &gic 0 23 4>,
|
|
||||||
<0 0 24 &gic 0 24 4>,
|
|
||||||
<0 0 25 &gic 0 25 4>,
|
|
||||||
<0 0 26 &gic 0 26 4>,
|
|
||||||
<0 0 27 &gic 0 27 4>,
|
|
||||||
<0 0 28 &gic 0 28 4>,
|
|
||||||
<0 0 29 &gic 0 29 4>,
|
|
||||||
<0 0 30 &gic 0 30 4>,
|
|
||||||
<0 0 31 &gic 0 31 4>,
|
|
||||||
<0 0 32 &gic 0 32 4>,
|
|
||||||
<0 0 33 &gic 0 33 4>,
|
|
||||||
<0 0 34 &gic 0 34 4>,
|
|
||||||
<0 0 35 &gic 0 35 4>,
|
|
||||||
<0 0 36 &gic 0 36 4>,
|
|
||||||
<0 0 37 &gic 0 37 4>,
|
|
||||||
<0 0 38 &gic 0 38 4>,
|
|
||||||
<0 0 39 &gic 0 39 4>,
|
|
||||||
<0 0 40 &gic 0 40 4>,
|
|
||||||
<0 0 41 &gic 0 41 4>,
|
|
||||||
<0 0 42 &gic 0 42 4>;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
site2: hsb@40000000 {
|
site2: hsb@40000000 {
|
||||||
|
@ -207,62 +207,7 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
smb: bus@8000000 {
|
smb: bus@8000000 {
|
||||||
compatible = "simple-bus";
|
ranges = <0 0x8000000 0x18000000>;
|
||||||
|
|
||||||
#address-cells = <2>;
|
|
||||||
#size-cells = <1>;
|
|
||||||
ranges = <0 0 0x08000000 0x04000000>,
|
|
||||||
<1 0 0x14000000 0x04000000>,
|
|
||||||
<2 0 0x18000000 0x04000000>,
|
|
||||||
<3 0 0x1c000000 0x04000000>,
|
|
||||||
<4 0 0x0c000000 0x04000000>,
|
|
||||||
<5 0 0x10000000 0x04000000>;
|
|
||||||
|
|
||||||
#interrupt-cells = <1>;
|
|
||||||
interrupt-map-mask = <0 0 63>;
|
|
||||||
interrupt-map = <0 0 0 &gic 0 0 4>,
|
|
||||||
<0 0 1 &gic 0 1 4>,
|
|
||||||
<0 0 2 &gic 0 2 4>,
|
|
||||||
<0 0 3 &gic 0 3 4>,
|
|
||||||
<0 0 4 &gic 0 4 4>,
|
|
||||||
<0 0 5 &gic 0 5 4>,
|
|
||||||
<0 0 6 &gic 0 6 4>,
|
|
||||||
<0 0 7 &gic 0 7 4>,
|
|
||||||
<0 0 8 &gic 0 8 4>,
|
|
||||||
<0 0 9 &gic 0 9 4>,
|
|
||||||
<0 0 10 &gic 0 10 4>,
|
|
||||||
<0 0 11 &gic 0 11 4>,
|
|
||||||
<0 0 12 &gic 0 12 4>,
|
|
||||||
<0 0 13 &gic 0 13 4>,
|
|
||||||
<0 0 14 &gic 0 14 4>,
|
|
||||||
<0 0 15 &gic 0 15 4>,
|
|
||||||
<0 0 16 &gic 0 16 4>,
|
|
||||||
<0 0 17 &gic 0 17 4>,
|
|
||||||
<0 0 18 &gic 0 18 4>,
|
|
||||||
<0 0 19 &gic 0 19 4>,
|
|
||||||
<0 0 20 &gic 0 20 4>,
|
|
||||||
<0 0 21 &gic 0 21 4>,
|
|
||||||
<0 0 22 &gic 0 22 4>,
|
|
||||||
<0 0 23 &gic 0 23 4>,
|
|
||||||
<0 0 24 &gic 0 24 4>,
|
|
||||||
<0 0 25 &gic 0 25 4>,
|
|
||||||
<0 0 26 &gic 0 26 4>,
|
|
||||||
<0 0 27 &gic 0 27 4>,
|
|
||||||
<0 0 28 &gic 0 28 4>,
|
|
||||||
<0 0 29 &gic 0 29 4>,
|
|
||||||
<0 0 30 &gic 0 30 4>,
|
|
||||||
<0 0 31 &gic 0 31 4>,
|
|
||||||
<0 0 32 &gic 0 32 4>,
|
|
||||||
<0 0 33 &gic 0 33 4>,
|
|
||||||
<0 0 34 &gic 0 34 4>,
|
|
||||||
<0 0 35 &gic 0 35 4>,
|
|
||||||
<0 0 36 &gic 0 36 4>,
|
|
||||||
<0 0 37 &gic 0 37 4>,
|
|
||||||
<0 0 38 &gic 0 38 4>,
|
|
||||||
<0 0 39 &gic 0 39 4>,
|
|
||||||
<0 0 40 &gic 0 40 4>,
|
|
||||||
<0 0 41 &gic 0 41 4>,
|
|
||||||
<0 0 42 &gic 0 42 4>;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
site2: hsb@40000000 {
|
site2: hsb@40000000 {
|
||||||
|
@ -295,64 +295,6 @@
|
|||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
smb: bus@4000000 {
|
|
||||||
compatible = "simple-bus";
|
|
||||||
|
|
||||||
#address-cells = <2>;
|
|
||||||
#size-cells = <1>;
|
|
||||||
ranges = <0 0 0x40000000 0x04000000>,
|
|
||||||
<1 0 0x44000000 0x04000000>,
|
|
||||||
<2 0 0x48000000 0x04000000>,
|
|
||||||
<3 0 0x4c000000 0x04000000>,
|
|
||||||
<7 0 0x10000000 0x00020000>;
|
|
||||||
|
|
||||||
#interrupt-cells = <1>;
|
|
||||||
interrupt-map-mask = <0 0 63>;
|
|
||||||
interrupt-map = <0 0 0 &gic 0 0 4>,
|
|
||||||
<0 0 1 &gic 0 1 4>,
|
|
||||||
<0 0 2 &gic 0 2 4>,
|
|
||||||
<0 0 3 &gic 0 3 4>,
|
|
||||||
<0 0 4 &gic 0 4 4>,
|
|
||||||
<0 0 5 &gic 0 5 4>,
|
|
||||||
<0 0 6 &gic 0 6 4>,
|
|
||||||
<0 0 7 &gic 0 7 4>,
|
|
||||||
<0 0 8 &gic 0 8 4>,
|
|
||||||
<0 0 9 &gic 0 9 4>,
|
|
||||||
<0 0 10 &gic 0 10 4>,
|
|
||||||
<0 0 11 &gic 0 11 4>,
|
|
||||||
<0 0 12 &gic 0 12 4>,
|
|
||||||
<0 0 13 &gic 0 13 4>,
|
|
||||||
<0 0 14 &gic 0 14 4>,
|
|
||||||
<0 0 15 &gic 0 15 4>,
|
|
||||||
<0 0 16 &gic 0 16 4>,
|
|
||||||
<0 0 17 &gic 0 17 4>,
|
|
||||||
<0 0 18 &gic 0 18 4>,
|
|
||||||
<0 0 19 &gic 0 19 4>,
|
|
||||||
<0 0 20 &gic 0 20 4>,
|
|
||||||
<0 0 21 &gic 0 21 4>,
|
|
||||||
<0 0 22 &gic 0 22 4>,
|
|
||||||
<0 0 23 &gic 0 23 4>,
|
|
||||||
<0 0 24 &gic 0 24 4>,
|
|
||||||
<0 0 25 &gic 0 25 4>,
|
|
||||||
<0 0 26 &gic 0 26 4>,
|
|
||||||
<0 0 27 &gic 0 27 4>,
|
|
||||||
<0 0 28 &gic 0 28 4>,
|
|
||||||
<0 0 29 &gic 0 29 4>,
|
|
||||||
<0 0 30 &gic 0 30 4>,
|
|
||||||
<0 0 31 &gic 0 31 4>,
|
|
||||||
<0 0 32 &gic 0 32 4>,
|
|
||||||
<0 0 33 &gic 0 33 4>,
|
|
||||||
<0 0 34 &gic 0 34 4>,
|
|
||||||
<0 0 35 &gic 0 35 4>,
|
|
||||||
<0 0 36 &gic 0 36 4>,
|
|
||||||
<0 0 37 &gic 0 37 4>,
|
|
||||||
<0 0 38 &gic 0 38 4>,
|
|
||||||
<0 0 39 &gic 0 39 4>,
|
|
||||||
<0 0 40 &gic 0 40 4>,
|
|
||||||
<0 0 41 &gic 0 41 4>,
|
|
||||||
<0 0 42 &gic 0 42 4>;
|
|
||||||
};
|
|
||||||
|
|
||||||
site2: hsb@e0000000 {
|
site2: hsb@e0000000 {
|
||||||
compatible = "simple-bus";
|
compatible = "simple-bus";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
|
@ -40,7 +40,9 @@ EXPORT_SYMBOL(sharpsl_param);
|
|||||||
|
|
||||||
void sharpsl_save_param(void)
|
void sharpsl_save_param(void)
|
||||||
{
|
{
|
||||||
memcpy(&sharpsl_param, param_start(PARAM_BASE), sizeof(struct sharpsl_param_info));
|
struct sharpsl_param_info *params = param_start(PARAM_BASE);
|
||||||
|
|
||||||
|
memcpy(&sharpsl_param, params, sizeof(*params));
|
||||||
|
|
||||||
if (sharpsl_param.comadj_keyword != COMADJ_MAGIC)
|
if (sharpsl_param.comadj_keyword != COMADJ_MAGIC)
|
||||||
sharpsl_param.comadj=-1;
|
sharpsl_param.comadj=-1;
|
||||||
|
@ -76,6 +76,7 @@ CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
|||||||
CONFIG_DRM=y
|
CONFIG_DRM=y
|
||||||
CONFIG_DRM_PANEL_ILITEK_IL9322=y
|
CONFIG_DRM_PANEL_ILITEK_IL9322=y
|
||||||
CONFIG_DRM_TVE200=y
|
CONFIG_DRM_TVE200=y
|
||||||
|
CONFIG_FB=y
|
||||||
CONFIG_LOGO=y
|
CONFIG_LOGO=y
|
||||||
CONFIG_USB=y
|
CONFIG_USB=y
|
||||||
CONFIG_USB_MON=y
|
CONFIG_USB_MON=y
|
||||||
|
@ -292,6 +292,7 @@ CONFIG_DRM_IMX_LDB=y
|
|||||||
CONFIG_DRM_IMX_HDMI=y
|
CONFIG_DRM_IMX_HDMI=y
|
||||||
CONFIG_DRM_ETNAVIV=y
|
CONFIG_DRM_ETNAVIV=y
|
||||||
CONFIG_DRM_MXSFB=y
|
CONFIG_DRM_MXSFB=y
|
||||||
|
CONFIG_FB=y
|
||||||
CONFIG_FB_MODE_HELPERS=y
|
CONFIG_FB_MODE_HELPERS=y
|
||||||
CONFIG_LCD_CLASS_DEVICE=y
|
CONFIG_LCD_CLASS_DEVICE=y
|
||||||
CONFIG_LCD_L4F00242T03=y
|
CONFIG_LCD_L4F00242T03=y
|
||||||
|
@ -197,7 +197,6 @@ CONFIG_PCI_EPF_TEST=m
|
|||||||
CONFIG_DEVTMPFS=y
|
CONFIG_DEVTMPFS=y
|
||||||
CONFIG_DEVTMPFS_MOUNT=y
|
CONFIG_DEVTMPFS_MOUNT=y
|
||||||
CONFIG_OMAP_OCP2SCP=y
|
CONFIG_OMAP_OCP2SCP=y
|
||||||
CONFIG_SIMPLE_PM_BUS=y
|
|
||||||
CONFIG_MTD=y
|
CONFIG_MTD=y
|
||||||
CONFIG_MTD_CMDLINE_PARTS=y
|
CONFIG_MTD_CMDLINE_PARTS=y
|
||||||
CONFIG_MTD_BLOCK=y
|
CONFIG_MTD_BLOCK=y
|
||||||
@ -456,6 +455,7 @@ CONFIG_PINCTRL_STMFX=y
|
|||||||
CONFIG_PINCTRL_PALMAS=y
|
CONFIG_PINCTRL_PALMAS=y
|
||||||
CONFIG_PINCTRL_OWL=y
|
CONFIG_PINCTRL_OWL=y
|
||||||
CONFIG_PINCTRL_S500=y
|
CONFIG_PINCTRL_S500=y
|
||||||
|
CONFIG_PINCTRL_MSM=y
|
||||||
CONFIG_PINCTRL_APQ8064=y
|
CONFIG_PINCTRL_APQ8064=y
|
||||||
CONFIG_PINCTRL_APQ8084=y
|
CONFIG_PINCTRL_APQ8084=y
|
||||||
CONFIG_PINCTRL_IPQ8064=y
|
CONFIG_PINCTRL_IPQ8064=y
|
||||||
@ -725,6 +725,7 @@ CONFIG_DRM_PL111=m
|
|||||||
CONFIG_DRM_LIMA=m
|
CONFIG_DRM_LIMA=m
|
||||||
CONFIG_DRM_PANFROST=m
|
CONFIG_DRM_PANFROST=m
|
||||||
CONFIG_DRM_ASPEED_GFX=m
|
CONFIG_DRM_ASPEED_GFX=m
|
||||||
|
CONFIG_FB=y
|
||||||
CONFIG_FB_EFI=y
|
CONFIG_FB_EFI=y
|
||||||
CONFIG_FB_WM8505=y
|
CONFIG_FB_WM8505=y
|
||||||
CONFIG_FB_SH_MOBILE_LCDC=y
|
CONFIG_FB_SH_MOBILE_LCDC=y
|
||||||
@ -1122,6 +1123,7 @@ CONFIG_PHY_DM816X_USB=m
|
|||||||
CONFIG_OMAP_USB2=y
|
CONFIG_OMAP_USB2=y
|
||||||
CONFIG_TI_PIPE3=y
|
CONFIG_TI_PIPE3=y
|
||||||
CONFIG_TWL4030_USB=m
|
CONFIG_TWL4030_USB=m
|
||||||
|
CONFIG_RAS=y
|
||||||
CONFIG_NVMEM_IMX_OCOTP=y
|
CONFIG_NVMEM_IMX_OCOTP=y
|
||||||
CONFIG_ROCKCHIP_EFUSE=m
|
CONFIG_ROCKCHIP_EFUSE=m
|
||||||
CONFIG_NVMEM_SUNXI_SID=y
|
CONFIG_NVMEM_SUNXI_SID=y
|
||||||
|
@ -46,7 +46,6 @@ CONFIG_DEVTMPFS=y
|
|||||||
CONFIG_DEVTMPFS_MOUNT=y
|
CONFIG_DEVTMPFS_MOUNT=y
|
||||||
CONFIG_DMA_CMA=y
|
CONFIG_DMA_CMA=y
|
||||||
CONFIG_CMA_SIZE_MBYTES=64
|
CONFIG_CMA_SIZE_MBYTES=64
|
||||||
CONFIG_SIMPLE_PM_BUS=y
|
|
||||||
CONFIG_MTD=y
|
CONFIG_MTD=y
|
||||||
CONFIG_MTD_CMDLINE_PARTS=y
|
CONFIG_MTD_CMDLINE_PARTS=y
|
||||||
CONFIG_MTD_BLOCK=y
|
CONFIG_MTD_BLOCK=y
|
||||||
|
@ -40,7 +40,6 @@ CONFIG_PCI_RCAR_GEN2=y
|
|||||||
CONFIG_PCIE_RCAR_HOST=y
|
CONFIG_PCIE_RCAR_HOST=y
|
||||||
CONFIG_DEVTMPFS=y
|
CONFIG_DEVTMPFS=y
|
||||||
CONFIG_DEVTMPFS_MOUNT=y
|
CONFIG_DEVTMPFS_MOUNT=y
|
||||||
CONFIG_SIMPLE_PM_BUS=y
|
|
||||||
CONFIG_MTD=y
|
CONFIG_MTD=y
|
||||||
CONFIG_MTD_BLOCK=y
|
CONFIG_MTD_BLOCK=y
|
||||||
CONFIG_MTD_CFI=y
|
CONFIG_MTD_CFI=y
|
||||||
|
@ -47,12 +47,26 @@ struct at91_pm_bu {
|
|||||||
unsigned long ddr_phy_calibration[BACKUP_DDR_PHY_CALIBRATION];
|
unsigned long ddr_phy_calibration[BACKUP_DDR_PHY_CALIBRATION];
|
||||||
};
|
};
|
||||||
|
|
||||||
|
/*
|
||||||
|
* struct at91_pm_sfrbu_offsets: registers mapping for SFRBU
|
||||||
|
* @pswbu: power switch BU control registers
|
||||||
|
*/
|
||||||
|
struct at91_pm_sfrbu_regs {
|
||||||
|
struct {
|
||||||
|
u32 key;
|
||||||
|
u32 ctrl;
|
||||||
|
u32 state;
|
||||||
|
u32 softsw;
|
||||||
|
} pswbu;
|
||||||
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* struct at91_soc_pm - AT91 SoC power management data structure
|
* struct at91_soc_pm - AT91 SoC power management data structure
|
||||||
* @config_shdwc_ws: wakeup sources configuration function for SHDWC
|
* @config_shdwc_ws: wakeup sources configuration function for SHDWC
|
||||||
* @config_pmc_ws: wakeup srouces configuration function for PMC
|
* @config_pmc_ws: wakeup srouces configuration function for PMC
|
||||||
* @ws_ids: wakup sources of_device_id array
|
* @ws_ids: wakup sources of_device_id array
|
||||||
* @data: PM data to be used on last phase of suspend
|
* @data: PM data to be used on last phase of suspend
|
||||||
|
* @sfrbu_regs: SFRBU registers mapping
|
||||||
* @bu: backup unit mapped data (for backup mode)
|
* @bu: backup unit mapped data (for backup mode)
|
||||||
* @memcs: memory chip select
|
* @memcs: memory chip select
|
||||||
*/
|
*/
|
||||||
@ -62,6 +76,7 @@ struct at91_soc_pm {
|
|||||||
const struct of_device_id *ws_ids;
|
const struct of_device_id *ws_ids;
|
||||||
struct at91_pm_bu *bu;
|
struct at91_pm_bu *bu;
|
||||||
struct at91_pm_data data;
|
struct at91_pm_data data;
|
||||||
|
struct at91_pm_sfrbu_regs sfrbu_regs;
|
||||||
void *memcs;
|
void *memcs;
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -356,9 +371,36 @@ static int at91_suspend_finish(unsigned long val)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static void at91_pm_switch_ba_to_vbat(void)
|
||||||
|
{
|
||||||
|
unsigned int offset = offsetof(struct at91_pm_sfrbu_regs, pswbu);
|
||||||
|
unsigned int val;
|
||||||
|
|
||||||
|
/* Just for safety. */
|
||||||
|
if (!soc_pm.data.sfrbu)
|
||||||
|
return;
|
||||||
|
|
||||||
|
val = readl(soc_pm.data.sfrbu + offset);
|
||||||
|
|
||||||
|
/* Already on VBAT. */
|
||||||
|
if (!(val & soc_pm.sfrbu_regs.pswbu.state))
|
||||||
|
return;
|
||||||
|
|
||||||
|
val &= ~soc_pm.sfrbu_regs.pswbu.softsw;
|
||||||
|
val |= soc_pm.sfrbu_regs.pswbu.key | soc_pm.sfrbu_regs.pswbu.ctrl;
|
||||||
|
writel(val, soc_pm.data.sfrbu + offset);
|
||||||
|
|
||||||
|
/* Wait for update. */
|
||||||
|
val = readl(soc_pm.data.sfrbu + offset);
|
||||||
|
while (val & soc_pm.sfrbu_regs.pswbu.state)
|
||||||
|
val = readl(soc_pm.data.sfrbu + offset);
|
||||||
|
}
|
||||||
|
|
||||||
static void at91_pm_suspend(suspend_state_t state)
|
static void at91_pm_suspend(suspend_state_t state)
|
||||||
{
|
{
|
||||||
if (soc_pm.data.mode == AT91_PM_BACKUP) {
|
if (soc_pm.data.mode == AT91_PM_BACKUP) {
|
||||||
|
at91_pm_switch_ba_to_vbat();
|
||||||
|
|
||||||
cpu_suspend(0, at91_suspend_finish);
|
cpu_suspend(0, at91_suspend_finish);
|
||||||
|
|
||||||
/* The SRAM is lost between suspend cycles */
|
/* The SRAM is lost between suspend cycles */
|
||||||
@ -589,18 +631,22 @@ static const struct of_device_id ramc_phy_ids[] __initconst = {
|
|||||||
{ /* Sentinel. */ },
|
{ /* Sentinel. */ },
|
||||||
};
|
};
|
||||||
|
|
||||||
static __init void at91_dt_ramc(bool phy_mandatory)
|
static __init int at91_dt_ramc(bool phy_mandatory)
|
||||||
{
|
{
|
||||||
struct device_node *np;
|
struct device_node *np;
|
||||||
const struct of_device_id *of_id;
|
const struct of_device_id *of_id;
|
||||||
int idx = 0;
|
int idx = 0;
|
||||||
void *standby = NULL;
|
void *standby = NULL;
|
||||||
const struct ramc_info *ramc;
|
const struct ramc_info *ramc;
|
||||||
|
int ret;
|
||||||
|
|
||||||
for_each_matching_node_and_match(np, ramc_ids, &of_id) {
|
for_each_matching_node_and_match(np, ramc_ids, &of_id) {
|
||||||
soc_pm.data.ramc[idx] = of_iomap(np, 0);
|
soc_pm.data.ramc[idx] = of_iomap(np, 0);
|
||||||
if (!soc_pm.data.ramc[idx])
|
if (!soc_pm.data.ramc[idx]) {
|
||||||
panic(pr_fmt("unable to map ramc[%d] cpu registers\n"), idx);
|
pr_err("unable to map ramc[%d] cpu registers\n", idx);
|
||||||
|
ret = -ENOMEM;
|
||||||
|
goto unmap_ramc;
|
||||||
|
}
|
||||||
|
|
||||||
ramc = of_id->data;
|
ramc = of_id->data;
|
||||||
if (ramc) {
|
if (ramc) {
|
||||||
@ -612,25 +658,42 @@ static __init void at91_dt_ramc(bool phy_mandatory)
|
|||||||
idx++;
|
idx++;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (!idx)
|
if (!idx) {
|
||||||
panic(pr_fmt("unable to find compatible ram controller node in dtb\n"));
|
pr_err("unable to find compatible ram controller node in dtb\n");
|
||||||
|
ret = -ENODEV;
|
||||||
|
goto unmap_ramc;
|
||||||
|
}
|
||||||
|
|
||||||
/* Lookup for DDR PHY node, if any. */
|
/* Lookup for DDR PHY node, if any. */
|
||||||
for_each_matching_node_and_match(np, ramc_phy_ids, &of_id) {
|
for_each_matching_node_and_match(np, ramc_phy_ids, &of_id) {
|
||||||
soc_pm.data.ramc_phy = of_iomap(np, 0);
|
soc_pm.data.ramc_phy = of_iomap(np, 0);
|
||||||
if (!soc_pm.data.ramc_phy)
|
if (!soc_pm.data.ramc_phy) {
|
||||||
panic(pr_fmt("unable to map ramc phy cpu registers\n"));
|
pr_err("unable to map ramc phy cpu registers\n");
|
||||||
|
ret = -ENOMEM;
|
||||||
|
goto unmap_ramc;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if (phy_mandatory && !soc_pm.data.ramc_phy)
|
if (phy_mandatory && !soc_pm.data.ramc_phy) {
|
||||||
panic(pr_fmt("DDR PHY is mandatory!\n"));
|
pr_err("DDR PHY is mandatory!\n");
|
||||||
|
ret = -ENODEV;
|
||||||
|
goto unmap_ramc;
|
||||||
|
}
|
||||||
|
|
||||||
if (!standby) {
|
if (!standby) {
|
||||||
pr_warn("ramc no standby function available\n");
|
pr_warn("ramc no standby function available\n");
|
||||||
return;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
at91_cpuidle_device.dev.platform_data = standby;
|
at91_cpuidle_device.dev.platform_data = standby;
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
|
||||||
|
unmap_ramc:
|
||||||
|
while (idx)
|
||||||
|
iounmap(soc_pm.data.ramc[--idx]);
|
||||||
|
|
||||||
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void at91rm9200_idle(void)
|
static void at91rm9200_idle(void)
|
||||||
@ -1017,6 +1080,8 @@ static void __init at91_pm_init(void (*pm_idle)(void))
|
|||||||
|
|
||||||
void __init at91rm9200_pm_init(void)
|
void __init at91rm9200_pm_init(void)
|
||||||
{
|
{
|
||||||
|
int ret;
|
||||||
|
|
||||||
if (!IS_ENABLED(CONFIG_SOC_AT91RM9200))
|
if (!IS_ENABLED(CONFIG_SOC_AT91RM9200))
|
||||||
return;
|
return;
|
||||||
|
|
||||||
@ -1028,7 +1093,9 @@ void __init at91rm9200_pm_init(void)
|
|||||||
soc_pm.data.standby_mode = AT91_PM_STANDBY;
|
soc_pm.data.standby_mode = AT91_PM_STANDBY;
|
||||||
soc_pm.data.suspend_mode = AT91_PM_ULP0;
|
soc_pm.data.suspend_mode = AT91_PM_ULP0;
|
||||||
|
|
||||||
at91_dt_ramc(false);
|
ret = at91_dt_ramc(false);
|
||||||
|
if (ret)
|
||||||
|
return;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh.
|
* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh.
|
||||||
@ -1046,13 +1113,17 @@ void __init sam9x60_pm_init(void)
|
|||||||
static const int iomaps[] __initconst = {
|
static const int iomaps[] __initconst = {
|
||||||
[AT91_PM_ULP1] = AT91_PM_IOMAP(SHDWC),
|
[AT91_PM_ULP1] = AT91_PM_IOMAP(SHDWC),
|
||||||
};
|
};
|
||||||
|
int ret;
|
||||||
|
|
||||||
if (!IS_ENABLED(CONFIG_SOC_SAM9X60))
|
if (!IS_ENABLED(CONFIG_SOC_SAM9X60))
|
||||||
return;
|
return;
|
||||||
|
|
||||||
at91_pm_modes_validate(modes, ARRAY_SIZE(modes));
|
at91_pm_modes_validate(modes, ARRAY_SIZE(modes));
|
||||||
at91_pm_modes_init(iomaps, ARRAY_SIZE(iomaps));
|
at91_pm_modes_init(iomaps, ARRAY_SIZE(iomaps));
|
||||||
at91_dt_ramc(false);
|
ret = at91_dt_ramc(false);
|
||||||
|
if (ret)
|
||||||
|
return;
|
||||||
|
|
||||||
at91_pm_init(NULL);
|
at91_pm_init(NULL);
|
||||||
|
|
||||||
soc_pm.ws_ids = sam9x60_ws_ids;
|
soc_pm.ws_ids = sam9x60_ws_ids;
|
||||||
@ -1061,6 +1132,8 @@ void __init sam9x60_pm_init(void)
|
|||||||
|
|
||||||
void __init at91sam9_pm_init(void)
|
void __init at91sam9_pm_init(void)
|
||||||
{
|
{
|
||||||
|
int ret;
|
||||||
|
|
||||||
if (!IS_ENABLED(CONFIG_SOC_AT91SAM9))
|
if (!IS_ENABLED(CONFIG_SOC_AT91SAM9))
|
||||||
return;
|
return;
|
||||||
|
|
||||||
@ -1072,7 +1145,10 @@ void __init at91sam9_pm_init(void)
|
|||||||
soc_pm.data.standby_mode = AT91_PM_STANDBY;
|
soc_pm.data.standby_mode = AT91_PM_STANDBY;
|
||||||
soc_pm.data.suspend_mode = AT91_PM_ULP0;
|
soc_pm.data.suspend_mode = AT91_PM_ULP0;
|
||||||
|
|
||||||
at91_dt_ramc(false);
|
ret = at91_dt_ramc(false);
|
||||||
|
if (ret)
|
||||||
|
return;
|
||||||
|
|
||||||
at91_pm_init(at91sam9_idle);
|
at91_pm_init(at91sam9_idle);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1081,12 +1157,16 @@ void __init sama5_pm_init(void)
|
|||||||
static const int modes[] __initconst = {
|
static const int modes[] __initconst = {
|
||||||
AT91_PM_STANDBY, AT91_PM_ULP0, AT91_PM_ULP0_FAST,
|
AT91_PM_STANDBY, AT91_PM_ULP0, AT91_PM_ULP0_FAST,
|
||||||
};
|
};
|
||||||
|
int ret;
|
||||||
|
|
||||||
if (!IS_ENABLED(CONFIG_SOC_SAMA5))
|
if (!IS_ENABLED(CONFIG_SOC_SAMA5))
|
||||||
return;
|
return;
|
||||||
|
|
||||||
at91_pm_modes_validate(modes, ARRAY_SIZE(modes));
|
at91_pm_modes_validate(modes, ARRAY_SIZE(modes));
|
||||||
at91_dt_ramc(false);
|
ret = at91_dt_ramc(false);
|
||||||
|
if (ret)
|
||||||
|
return;
|
||||||
|
|
||||||
at91_pm_init(NULL);
|
at91_pm_init(NULL);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1101,18 +1181,27 @@ void __init sama5d2_pm_init(void)
|
|||||||
[AT91_PM_BACKUP] = AT91_PM_IOMAP(SHDWC) |
|
[AT91_PM_BACKUP] = AT91_PM_IOMAP(SHDWC) |
|
||||||
AT91_PM_IOMAP(SFRBU),
|
AT91_PM_IOMAP(SFRBU),
|
||||||
};
|
};
|
||||||
|
int ret;
|
||||||
|
|
||||||
if (!IS_ENABLED(CONFIG_SOC_SAMA5D2))
|
if (!IS_ENABLED(CONFIG_SOC_SAMA5D2))
|
||||||
return;
|
return;
|
||||||
|
|
||||||
at91_pm_modes_validate(modes, ARRAY_SIZE(modes));
|
at91_pm_modes_validate(modes, ARRAY_SIZE(modes));
|
||||||
at91_pm_modes_init(iomaps, ARRAY_SIZE(iomaps));
|
at91_pm_modes_init(iomaps, ARRAY_SIZE(iomaps));
|
||||||
at91_dt_ramc(false);
|
ret = at91_dt_ramc(false);
|
||||||
|
if (ret)
|
||||||
|
return;
|
||||||
|
|
||||||
at91_pm_init(NULL);
|
at91_pm_init(NULL);
|
||||||
|
|
||||||
soc_pm.ws_ids = sama5d2_ws_ids;
|
soc_pm.ws_ids = sama5d2_ws_ids;
|
||||||
soc_pm.config_shdwc_ws = at91_sama5d2_config_shdwc_ws;
|
soc_pm.config_shdwc_ws = at91_sama5d2_config_shdwc_ws;
|
||||||
soc_pm.config_pmc_ws = at91_sama5d2_config_pmc_ws;
|
soc_pm.config_pmc_ws = at91_sama5d2_config_pmc_ws;
|
||||||
|
|
||||||
|
soc_pm.sfrbu_regs.pswbu.key = (0x4BD20C << 8);
|
||||||
|
soc_pm.sfrbu_regs.pswbu.ctrl = BIT(0);
|
||||||
|
soc_pm.sfrbu_regs.pswbu.softsw = BIT(1);
|
||||||
|
soc_pm.sfrbu_regs.pswbu.state = BIT(3);
|
||||||
}
|
}
|
||||||
|
|
||||||
void __init sama7_pm_init(void)
|
void __init sama7_pm_init(void)
|
||||||
@ -1127,18 +1216,27 @@ void __init sama7_pm_init(void)
|
|||||||
[AT91_PM_BACKUP] = AT91_PM_IOMAP(SFRBU) |
|
[AT91_PM_BACKUP] = AT91_PM_IOMAP(SFRBU) |
|
||||||
AT91_PM_IOMAP(SHDWC),
|
AT91_PM_IOMAP(SHDWC),
|
||||||
};
|
};
|
||||||
|
int ret;
|
||||||
|
|
||||||
if (!IS_ENABLED(CONFIG_SOC_SAMA7))
|
if (!IS_ENABLED(CONFIG_SOC_SAMA7))
|
||||||
return;
|
return;
|
||||||
|
|
||||||
at91_pm_modes_validate(modes, ARRAY_SIZE(modes));
|
at91_pm_modes_validate(modes, ARRAY_SIZE(modes));
|
||||||
|
|
||||||
at91_dt_ramc(true);
|
ret = at91_dt_ramc(true);
|
||||||
|
if (ret)
|
||||||
|
return;
|
||||||
|
|
||||||
at91_pm_modes_init(iomaps, ARRAY_SIZE(iomaps));
|
at91_pm_modes_init(iomaps, ARRAY_SIZE(iomaps));
|
||||||
at91_pm_init(NULL);
|
at91_pm_init(NULL);
|
||||||
|
|
||||||
soc_pm.ws_ids = sama7g5_ws_ids;
|
soc_pm.ws_ids = sama7g5_ws_ids;
|
||||||
soc_pm.config_pmc_ws = at91_sam9x60_config_pmc_ws;
|
soc_pm.config_pmc_ws = at91_sam9x60_config_pmc_ws;
|
||||||
|
|
||||||
|
soc_pm.sfrbu_regs.pswbu.key = (0x4BD20C << 8);
|
||||||
|
soc_pm.sfrbu_regs.pswbu.ctrl = BIT(0);
|
||||||
|
soc_pm.sfrbu_regs.pswbu.softsw = BIT(1);
|
||||||
|
soc_pm.sfrbu_regs.pswbu.state = BIT(2);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int __init at91_pm_modes_select(char *str)
|
static int __init at91_pm_modes_select(char *str)
|
||||||
|
@ -1014,31 +1014,55 @@ ENTRY(at91_pm_suspend_in_sram)
|
|||||||
mov tmp1, #0
|
mov tmp1, #0
|
||||||
mcr p15, 0, tmp1, c7, c10, 4
|
mcr p15, 0, tmp1, c7, c10, 4
|
||||||
|
|
||||||
ldr tmp1, [r0, #PM_DATA_PMC]
|
/* Flush tlb. */
|
||||||
str tmp1, .pmc_base
|
mov r4, #0
|
||||||
ldr tmp1, [r0, #PM_DATA_RAMC0]
|
mcr p15, 0, r4, c8, c7, 0
|
||||||
str tmp1, .sramc_base
|
|
||||||
ldr tmp1, [r0, #PM_DATA_RAMC1]
|
|
||||||
str tmp1, .sramc1_base
|
|
||||||
ldr tmp1, [r0, #PM_DATA_RAMC_PHY]
|
|
||||||
str tmp1, .sramc_phy_base
|
|
||||||
ldr tmp1, [r0, #PM_DATA_MEMCTRL]
|
|
||||||
str tmp1, .memtype
|
|
||||||
ldr tmp1, [r0, #PM_DATA_MODE]
|
|
||||||
str tmp1, .pm_mode
|
|
||||||
ldr tmp1, [r0, #PM_DATA_PMC_MCKR_OFFSET]
|
ldr tmp1, [r0, #PM_DATA_PMC_MCKR_OFFSET]
|
||||||
str tmp1, .mckr_offset
|
str tmp1, .mckr_offset
|
||||||
ldr tmp1, [r0, #PM_DATA_PMC_VERSION]
|
ldr tmp1, [r0, #PM_DATA_PMC_VERSION]
|
||||||
str tmp1, .pmc_version
|
str tmp1, .pmc_version
|
||||||
/* Both ldrne below are here to preload their address in the TLB */
|
ldr tmp1, [r0, #PM_DATA_MEMCTRL]
|
||||||
|
str tmp1, .memtype
|
||||||
|
ldr tmp1, [r0, #PM_DATA_MODE]
|
||||||
|
str tmp1, .pm_mode
|
||||||
|
|
||||||
|
/*
|
||||||
|
* ldrne below are here to preload their address in the TLB as access
|
||||||
|
* to RAM may be limited while in self-refresh.
|
||||||
|
*/
|
||||||
|
ldr tmp1, [r0, #PM_DATA_PMC]
|
||||||
|
str tmp1, .pmc_base
|
||||||
|
cmp tmp1, #0
|
||||||
|
ldrne tmp2, [tmp1, #0]
|
||||||
|
|
||||||
|
ldr tmp1, [r0, #PM_DATA_RAMC0]
|
||||||
|
str tmp1, .sramc_base
|
||||||
|
cmp tmp1, #0
|
||||||
|
ldrne tmp2, [tmp1, #0]
|
||||||
|
|
||||||
|
ldr tmp1, [r0, #PM_DATA_RAMC1]
|
||||||
|
str tmp1, .sramc1_base
|
||||||
|
cmp tmp1, #0
|
||||||
|
ldrne tmp2, [tmp1, #0]
|
||||||
|
|
||||||
|
#ifndef CONFIG_SOC_SAM_V4_V5
|
||||||
|
/* ldrne below are here to preload their address in the TLB */
|
||||||
|
ldr tmp1, [r0, #PM_DATA_RAMC_PHY]
|
||||||
|
str tmp1, .sramc_phy_base
|
||||||
|
cmp tmp1, #0
|
||||||
|
ldrne tmp2, [tmp1, #0]
|
||||||
|
|
||||||
ldr tmp1, [r0, #PM_DATA_SHDWC]
|
ldr tmp1, [r0, #PM_DATA_SHDWC]
|
||||||
str tmp1, .shdwc
|
str tmp1, .shdwc
|
||||||
cmp tmp1, #0
|
cmp tmp1, #0
|
||||||
ldrne tmp2, [tmp1, #0]
|
ldrne tmp2, [tmp1, #0]
|
||||||
|
|
||||||
ldr tmp1, [r0, #PM_DATA_SFRBU]
|
ldr tmp1, [r0, #PM_DATA_SFRBU]
|
||||||
str tmp1, .sfrbu
|
str tmp1, .sfrbu
|
||||||
cmp tmp1, #0
|
cmp tmp1, #0
|
||||||
ldrne tmp2, [tmp1, #0x10]
|
ldrne tmp2, [tmp1, #0x10]
|
||||||
|
#endif
|
||||||
|
|
||||||
/* Active the self-refresh mode */
|
/* Active the self-refresh mode */
|
||||||
at91_sramc_self_refresh_ena
|
at91_sramc_self_refresh_ena
|
||||||
|
@ -11,7 +11,7 @@
|
|||||||
|
|
||||||
#define LSR_THRE 0x20
|
#define LSR_THRE 0x20
|
||||||
|
|
||||||
static void putc(const char c)
|
static inline void putc(const char c)
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
@ -24,7 +24,7 @@ static void putc(const char c)
|
|||||||
*UART_THR = c;
|
*UART_THR = c;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void flush(void)
|
static inline void flush(void)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -172,6 +172,9 @@ static void __init imx6q_init_machine(void)
|
|||||||
imx_get_soc_revision());
|
imx_get_soc_revision());
|
||||||
|
|
||||||
imx6q_enet_phy_init();
|
imx6q_enet_phy_init();
|
||||||
|
|
||||||
|
of_platform_default_populate(NULL, NULL, NULL);
|
||||||
|
|
||||||
imx_anatop_init();
|
imx_anatop_init();
|
||||||
cpu_is_imx6q() ? imx6q_pm_init() : imx6dl_pm_init();
|
cpu_is_imx6q() ? imx6q_pm_init() : imx6dl_pm_init();
|
||||||
imx6q_1588_init();
|
imx6q_1588_init();
|
||||||
|
@ -10,6 +10,7 @@
|
|||||||
#include <linux/io.h>
|
#include <linux/io.h>
|
||||||
#include <linux/irq.h>
|
#include <linux/irq.h>
|
||||||
#include <linux/genalloc.h>
|
#include <linux/genalloc.h>
|
||||||
|
#include <linux/irqchip/arm-gic.h>
|
||||||
#include <linux/mfd/syscon.h>
|
#include <linux/mfd/syscon.h>
|
||||||
#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
|
#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
|
||||||
#include <linux/of.h>
|
#include <linux/of.h>
|
||||||
@ -619,6 +620,7 @@ static void __init imx6_pm_common_init(const struct imx6_pm_socdata
|
|||||||
|
|
||||||
static void imx6_pm_stby_poweroff(void)
|
static void imx6_pm_stby_poweroff(void)
|
||||||
{
|
{
|
||||||
|
gic_cpu_if_down(0);
|
||||||
imx6_set_lpm(STOP_POWER_OFF);
|
imx6_set_lpm(STOP_POWER_OFF);
|
||||||
imx6q_suspend_finish(0);
|
imx6q_suspend_finish(0);
|
||||||
|
|
||||||
|
@ -9,6 +9,7 @@
|
|||||||
#include <linux/iopoll.h>
|
#include <linux/iopoll.h>
|
||||||
#include <linux/of.h>
|
#include <linux/of.h>
|
||||||
#include <linux/of_address.h>
|
#include <linux/of_address.h>
|
||||||
|
#include <linux/platform_device.h>
|
||||||
#include <linux/reset-controller.h>
|
#include <linux/reset-controller.h>
|
||||||
#include <linux/smp.h>
|
#include <linux/smp.h>
|
||||||
#include <asm/smp_plat.h>
|
#include <asm/smp_plat.h>
|
||||||
@ -81,11 +82,6 @@ static const struct reset_control_ops imx_src_ops = {
|
|||||||
.reset = imx_src_reset_module,
|
.reset = imx_src_reset_module,
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct reset_controller_dev imx_reset_controller = {
|
|
||||||
.ops = &imx_src_ops,
|
|
||||||
.nr_resets = ARRAY_SIZE(sw_reset_bits),
|
|
||||||
};
|
|
||||||
|
|
||||||
static void imx_gpcv2_set_m_core_pgc(bool enable, u32 offset)
|
static void imx_gpcv2_set_m_core_pgc(bool enable, u32 offset)
|
||||||
{
|
{
|
||||||
writel_relaxed(enable, gpc_base + offset);
|
writel_relaxed(enable, gpc_base + offset);
|
||||||
@ -177,10 +173,6 @@ void __init imx_src_init(void)
|
|||||||
src_base = of_iomap(np, 0);
|
src_base = of_iomap(np, 0);
|
||||||
WARN_ON(!src_base);
|
WARN_ON(!src_base);
|
||||||
|
|
||||||
imx_reset_controller.of_node = np;
|
|
||||||
if (IS_ENABLED(CONFIG_RESET_CONTROLLER))
|
|
||||||
reset_controller_register(&imx_reset_controller);
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* force warm reset sources to generate cold reset
|
* force warm reset sources to generate cold reset
|
||||||
* for a more reliable restart
|
* for a more reliable restart
|
||||||
@ -214,3 +206,33 @@ void __init imx7_src_init(void)
|
|||||||
if (!gpc_base)
|
if (!gpc_base)
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static const struct of_device_id imx_src_dt_ids[] = {
|
||||||
|
{ .compatible = "fsl,imx51-src" },
|
||||||
|
{ /* sentinel */ }
|
||||||
|
};
|
||||||
|
|
||||||
|
static int imx_src_probe(struct platform_device *pdev)
|
||||||
|
{
|
||||||
|
struct reset_controller_dev *rcdev;
|
||||||
|
|
||||||
|
rcdev = devm_kzalloc(&pdev->dev, sizeof(*rcdev), GFP_KERNEL);
|
||||||
|
if (!rcdev)
|
||||||
|
return -ENOMEM;
|
||||||
|
|
||||||
|
rcdev->ops = &imx_src_ops;
|
||||||
|
rcdev->dev = &pdev->dev;
|
||||||
|
rcdev->of_node = pdev->dev.of_node;
|
||||||
|
rcdev->nr_resets = ARRAY_SIZE(sw_reset_bits);
|
||||||
|
|
||||||
|
return devm_reset_controller_register(&pdev->dev, rcdev);
|
||||||
|
}
|
||||||
|
|
||||||
|
static struct platform_driver imx_src_driver = {
|
||||||
|
.driver = {
|
||||||
|
.name = "imx-src",
|
||||||
|
.of_match_table = imx_src_dt_ids,
|
||||||
|
},
|
||||||
|
.probe = imx_src_probe,
|
||||||
|
};
|
||||||
|
builtin_platform_driver(imx_src_driver);
|
||||||
|
@ -9,16 +9,4 @@
|
|||||||
/* REVISIT: omap1 legacy drivers still rely on this */
|
/* REVISIT: omap1 legacy drivers still rely on this */
|
||||||
#include <mach/soc.h>
|
#include <mach/soc.h>
|
||||||
|
|
||||||
/*
|
|
||||||
* Bus address is physical address, except for OMAP-1510 Local Bus.
|
|
||||||
* OMAP-1510 bus address is translated into a Local Bus address if the
|
|
||||||
* OMAP bus type is lbus. We do the address translation based on the
|
|
||||||
* device overriding the defaults used in the dma-mapping API.
|
|
||||||
*/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* OMAP-1510 Local Bus address offset
|
|
||||||
*/
|
|
||||||
#define OMAP1510_LB_OFFSET UL(0x30000000)
|
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
@ -11,6 +11,7 @@
|
|||||||
#include <linux/platform_device.h>
|
#include <linux/platform_device.h>
|
||||||
#include <linux/dma-map-ops.h>
|
#include <linux/dma-map-ops.h>
|
||||||
#include <linux/io.h>
|
#include <linux/io.h>
|
||||||
|
#include <linux/delay.h>
|
||||||
|
|
||||||
#include <asm/irq.h>
|
#include <asm/irq.h>
|
||||||
|
|
||||||
@ -206,8 +207,6 @@ static inline void udc_device_init(struct omap_usb_config *pdata)
|
|||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if IS_ENABLED(CONFIG_USB_OHCI_HCD)
|
|
||||||
|
|
||||||
/* The dmamask must be set for OHCI to work */
|
/* The dmamask must be set for OHCI to work */
|
||||||
static u64 ohci_dmamask = ~(u32)0;
|
static u64 ohci_dmamask = ~(u32)0;
|
||||||
|
|
||||||
@ -236,20 +235,15 @@ static struct platform_device ohci_device = {
|
|||||||
|
|
||||||
static inline void ohci_device_init(struct omap_usb_config *pdata)
|
static inline void ohci_device_init(struct omap_usb_config *pdata)
|
||||||
{
|
{
|
||||||
|
if (!IS_ENABLED(CONFIG_USB_OHCI_HCD))
|
||||||
|
return;
|
||||||
|
|
||||||
if (cpu_is_omap7xx())
|
if (cpu_is_omap7xx())
|
||||||
ohci_resources[1].start = INT_7XX_USB_HHC_1;
|
ohci_resources[1].start = INT_7XX_USB_HHC_1;
|
||||||
pdata->ohci_device = &ohci_device;
|
pdata->ohci_device = &ohci_device;
|
||||||
pdata->ocpi_enable = &ocpi_enable;
|
pdata->ocpi_enable = &ocpi_enable;
|
||||||
}
|
}
|
||||||
|
|
||||||
#else
|
|
||||||
|
|
||||||
static inline void ohci_device_init(struct omap_usb_config *pdata)
|
|
||||||
{
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG)
|
#if defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG)
|
||||||
|
|
||||||
static struct resource otg_resources[] = {
|
static struct resource otg_resources[] = {
|
||||||
@ -534,6 +528,79 @@ bad:
|
|||||||
}
|
}
|
||||||
|
|
||||||
#ifdef CONFIG_ARCH_OMAP15XX
|
#ifdef CONFIG_ARCH_OMAP15XX
|
||||||
|
/* OMAP-1510 OHCI has its own MMU for DMA */
|
||||||
|
#define OMAP1510_LB_MEMSIZE 32 /* Should be same as SDRAM size */
|
||||||
|
#define OMAP1510_LB_CLOCK_DIV 0xfffec10c
|
||||||
|
#define OMAP1510_LB_MMU_CTL 0xfffec208
|
||||||
|
#define OMAP1510_LB_MMU_LCK 0xfffec224
|
||||||
|
#define OMAP1510_LB_MMU_LD_TLB 0xfffec228
|
||||||
|
#define OMAP1510_LB_MMU_CAM_H 0xfffec22c
|
||||||
|
#define OMAP1510_LB_MMU_CAM_L 0xfffec230
|
||||||
|
#define OMAP1510_LB_MMU_RAM_H 0xfffec234
|
||||||
|
#define OMAP1510_LB_MMU_RAM_L 0xfffec238
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Bus address is physical address, except for OMAP-1510 Local Bus.
|
||||||
|
* OMAP-1510 bus address is translated into a Local Bus address if the
|
||||||
|
* OMAP bus type is lbus.
|
||||||
|
*/
|
||||||
|
#define OMAP1510_LB_OFFSET UL(0x30000000)
|
||||||
|
|
||||||
|
/*
|
||||||
|
* OMAP-1510 specific Local Bus clock on/off
|
||||||
|
*/
|
||||||
|
static int omap_1510_local_bus_power(int on)
|
||||||
|
{
|
||||||
|
if (on) {
|
||||||
|
omap_writel((1 << 1) | (1 << 0), OMAP1510_LB_MMU_CTL);
|
||||||
|
udelay(200);
|
||||||
|
} else {
|
||||||
|
omap_writel(0, OMAP1510_LB_MMU_CTL);
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* OMAP-1510 specific Local Bus initialization
|
||||||
|
* NOTE: This assumes 32MB memory size in OMAP1510LB_MEMSIZE.
|
||||||
|
* See also arch/mach-omap/memory.h for __virt_to_dma() and
|
||||||
|
* __dma_to_virt() which need to match with the physical
|
||||||
|
* Local Bus address below.
|
||||||
|
*/
|
||||||
|
static int omap_1510_local_bus_init(void)
|
||||||
|
{
|
||||||
|
unsigned int tlb;
|
||||||
|
unsigned long lbaddr, physaddr;
|
||||||
|
|
||||||
|
omap_writel((omap_readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4,
|
||||||
|
OMAP1510_LB_CLOCK_DIV);
|
||||||
|
|
||||||
|
/* Configure the Local Bus MMU table */
|
||||||
|
for (tlb = 0; tlb < OMAP1510_LB_MEMSIZE; tlb++) {
|
||||||
|
lbaddr = tlb * 0x00100000 + OMAP1510_LB_OFFSET;
|
||||||
|
physaddr = tlb * 0x00100000 + PHYS_OFFSET;
|
||||||
|
omap_writel((lbaddr & 0x0fffffff) >> 22, OMAP1510_LB_MMU_CAM_H);
|
||||||
|
omap_writel(((lbaddr & 0x003ffc00) >> 6) | 0xc,
|
||||||
|
OMAP1510_LB_MMU_CAM_L);
|
||||||
|
omap_writel(physaddr >> 16, OMAP1510_LB_MMU_RAM_H);
|
||||||
|
omap_writel((physaddr & 0x0000fc00) | 0x300, OMAP1510_LB_MMU_RAM_L);
|
||||||
|
omap_writel(tlb << 4, OMAP1510_LB_MMU_LCK);
|
||||||
|
omap_writel(0x1, OMAP1510_LB_MMU_LD_TLB);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Enable the walking table */
|
||||||
|
omap_writel(omap_readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL);
|
||||||
|
udelay(200);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void omap_1510_local_bus_reset(void)
|
||||||
|
{
|
||||||
|
omap_1510_local_bus_power(1);
|
||||||
|
omap_1510_local_bus_init();
|
||||||
|
}
|
||||||
|
|
||||||
/* ULPD_DPLL_CTRL */
|
/* ULPD_DPLL_CTRL */
|
||||||
#define DPLL_IOB (1 << 13)
|
#define DPLL_IOB (1 << 13)
|
||||||
@ -543,25 +610,6 @@ bad:
|
|||||||
/* ULPD_APLL_CTRL */
|
/* ULPD_APLL_CTRL */
|
||||||
#define APLL_NDPLL_SWITCH (1 << 0)
|
#define APLL_NDPLL_SWITCH (1 << 0)
|
||||||
|
|
||||||
static int omap_1510_usb_ohci_notifier(struct notifier_block *nb,
|
|
||||||
unsigned long event, void *data)
|
|
||||||
{
|
|
||||||
struct device *dev = data;
|
|
||||||
|
|
||||||
if (event != BUS_NOTIFY_ADD_DEVICE)
|
|
||||||
return NOTIFY_DONE;
|
|
||||||
|
|
||||||
if (strncmp(dev_name(dev), "ohci", 4) == 0 &&
|
|
||||||
dma_direct_set_offset(dev, PHYS_OFFSET, OMAP1510_LB_OFFSET,
|
|
||||||
(u64)-1))
|
|
||||||
WARN_ONCE(1, "failed to set DMA offset\n");
|
|
||||||
return NOTIFY_OK;
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct notifier_block omap_1510_usb_ohci_nb = {
|
|
||||||
.notifier_call = omap_1510_usb_ohci_notifier,
|
|
||||||
};
|
|
||||||
|
|
||||||
static void __init omap_1510_usb_init(struct omap_usb_config *config)
|
static void __init omap_1510_usb_init(struct omap_usb_config *config)
|
||||||
{
|
{
|
||||||
unsigned int val;
|
unsigned int val;
|
||||||
@ -616,19 +664,19 @@ static void __init omap_1510_usb_init(struct omap_usb_config *config)
|
|||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if IS_ENABLED(CONFIG_USB_OHCI_HCD)
|
if (IS_ENABLED(CONFIG_USB_OHCI_HCD) && config->register_host) {
|
||||||
if (config->register_host) {
|
|
||||||
int status;
|
int status;
|
||||||
|
|
||||||
bus_register_notifier(&platform_bus_type,
|
|
||||||
&omap_1510_usb_ohci_nb);
|
|
||||||
ohci_device.dev.platform_data = config;
|
ohci_device.dev.platform_data = config;
|
||||||
|
dma_direct_set_offset(&ohci_device.dev, PHYS_OFFSET,
|
||||||
|
OMAP1510_LB_OFFSET, (u64)-1);
|
||||||
status = platform_device_register(&ohci_device);
|
status = platform_device_register(&ohci_device);
|
||||||
if (status)
|
if (status)
|
||||||
pr_debug("can't register OHCI device, %d\n", status);
|
pr_debug("can't register OHCI device, %d\n", status);
|
||||||
/* hcd explicitly gates 48MHz */
|
/* hcd explicitly gates 48MHz */
|
||||||
|
|
||||||
|
config->lb_reset = omap_1510_local_bus_reset;
|
||||||
}
|
}
|
||||||
#endif
|
|
||||||
}
|
}
|
||||||
|
|
||||||
#else
|
#else
|
||||||
|
@ -112,7 +112,6 @@ config ARCH_OMAP2PLUS
|
|||||||
select PM_GENERIC_DOMAINS
|
select PM_GENERIC_DOMAINS
|
||||||
select PM_GENERIC_DOMAINS_OF
|
select PM_GENERIC_DOMAINS_OF
|
||||||
select RESET_CONTROLLER
|
select RESET_CONTROLLER
|
||||||
select SIMPLE_PM_BUS
|
|
||||||
select SOC_BUS
|
select SOC_BUS
|
||||||
select TI_SYSC
|
select TI_SYSC
|
||||||
select OMAP_IRQCHIP
|
select OMAP_IRQCHIP
|
||||||
|
@ -3614,6 +3614,8 @@ int omap_hwmod_init_module(struct device *dev,
|
|||||||
oh->flags |= HWMOD_SWSUP_SIDLE_ACT;
|
oh->flags |= HWMOD_SWSUP_SIDLE_ACT;
|
||||||
if (data->cfg->quirks & SYSC_QUIRK_SWSUP_MSTANDBY)
|
if (data->cfg->quirks & SYSC_QUIRK_SWSUP_MSTANDBY)
|
||||||
oh->flags |= HWMOD_SWSUP_MSTANDBY;
|
oh->flags |= HWMOD_SWSUP_MSTANDBY;
|
||||||
|
if (data->cfg->quirks & SYSC_QUIRK_CLKDM_NOAUTO)
|
||||||
|
oh->flags |= HWMOD_CLKDM_NOAUTO;
|
||||||
|
|
||||||
error = omap_hwmod_check_module(dev, oh, data, sysc_fields,
|
error = omap_hwmod_check_module(dev, oh, data, sysc_fields,
|
||||||
rev_offs, sysc_offs, syss_offs,
|
rev_offs, sysc_offs, syss_offs,
|
||||||
|
@ -36,6 +36,10 @@
|
|||||||
* +-----+
|
* +-----+
|
||||||
* |RSVD | JIT scratchpad
|
* |RSVD | JIT scratchpad
|
||||||
* current ARM_SP => +-----+ <= (BPF_FP - STACK_SIZE + SCRATCH_SIZE)
|
* current ARM_SP => +-----+ <= (BPF_FP - STACK_SIZE + SCRATCH_SIZE)
|
||||||
|
* | ... | caller-saved registers
|
||||||
|
* +-----+
|
||||||
|
* | ... | arguments passed on stack
|
||||||
|
* ARM_SP during call => +-----|
|
||||||
* | |
|
* | |
|
||||||
* | ... | Function call stack
|
* | ... | Function call stack
|
||||||
* | |
|
* | |
|
||||||
@ -63,6 +67,12 @@
|
|||||||
*
|
*
|
||||||
* When popping registers off the stack at the end of a BPF function, we
|
* When popping registers off the stack at the end of a BPF function, we
|
||||||
* reference them via the current ARM_FP register.
|
* reference them via the current ARM_FP register.
|
||||||
|
*
|
||||||
|
* Some eBPF operations are implemented via a call to a helper function.
|
||||||
|
* Such calls are "invisible" in the eBPF code, so it is up to the calling
|
||||||
|
* program to preserve any caller-saved ARM registers during the call. The
|
||||||
|
* JIT emits code to push and pop those registers onto the stack, immediately
|
||||||
|
* above the callee stack frame.
|
||||||
*/
|
*/
|
||||||
#define CALLEE_MASK (1 << ARM_R4 | 1 << ARM_R5 | 1 << ARM_R6 | \
|
#define CALLEE_MASK (1 << ARM_R4 | 1 << ARM_R5 | 1 << ARM_R6 | \
|
||||||
1 << ARM_R7 | 1 << ARM_R8 | 1 << ARM_R9 | \
|
1 << ARM_R7 | 1 << ARM_R8 | 1 << ARM_R9 | \
|
||||||
@ -70,6 +80,8 @@
|
|||||||
#define CALLEE_PUSH_MASK (CALLEE_MASK | 1 << ARM_LR)
|
#define CALLEE_PUSH_MASK (CALLEE_MASK | 1 << ARM_LR)
|
||||||
#define CALLEE_POP_MASK (CALLEE_MASK | 1 << ARM_PC)
|
#define CALLEE_POP_MASK (CALLEE_MASK | 1 << ARM_PC)
|
||||||
|
|
||||||
|
#define CALLER_MASK (1 << ARM_R0 | 1 << ARM_R1 | 1 << ARM_R2 | 1 << ARM_R3)
|
||||||
|
|
||||||
enum {
|
enum {
|
||||||
/* Stack layout - these are offsets from (top of stack - 4) */
|
/* Stack layout - these are offsets from (top of stack - 4) */
|
||||||
BPF_R2_HI,
|
BPF_R2_HI,
|
||||||
@ -464,6 +476,7 @@ static inline int epilogue_offset(const struct jit_ctx *ctx)
|
|||||||
|
|
||||||
static inline void emit_udivmod(u8 rd, u8 rm, u8 rn, struct jit_ctx *ctx, u8 op)
|
static inline void emit_udivmod(u8 rd, u8 rm, u8 rn, struct jit_ctx *ctx, u8 op)
|
||||||
{
|
{
|
||||||
|
const int exclude_mask = BIT(ARM_R0) | BIT(ARM_R1);
|
||||||
const s8 *tmp = bpf2a32[TMP_REG_1];
|
const s8 *tmp = bpf2a32[TMP_REG_1];
|
||||||
|
|
||||||
#if __LINUX_ARM_ARCH__ == 7
|
#if __LINUX_ARM_ARCH__ == 7
|
||||||
@ -495,11 +508,17 @@ static inline void emit_udivmod(u8 rd, u8 rm, u8 rn, struct jit_ctx *ctx, u8 op)
|
|||||||
emit(ARM_MOV_R(ARM_R0, rm), ctx);
|
emit(ARM_MOV_R(ARM_R0, rm), ctx);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* Push caller-saved registers on stack */
|
||||||
|
emit(ARM_PUSH(CALLER_MASK & ~exclude_mask), ctx);
|
||||||
|
|
||||||
/* Call appropriate function */
|
/* Call appropriate function */
|
||||||
emit_mov_i(ARM_IP, op == BPF_DIV ?
|
emit_mov_i(ARM_IP, op == BPF_DIV ?
|
||||||
(u32)jit_udiv32 : (u32)jit_mod32, ctx);
|
(u32)jit_udiv32 : (u32)jit_mod32, ctx);
|
||||||
emit_blx_r(ARM_IP, ctx);
|
emit_blx_r(ARM_IP, ctx);
|
||||||
|
|
||||||
|
/* Restore caller-saved registers from stack */
|
||||||
|
emit(ARM_POP(CALLER_MASK & ~exclude_mask), ctx);
|
||||||
|
|
||||||
/* Save return value */
|
/* Save return value */
|
||||||
if (rd != ARM_R0)
|
if (rd != ARM_R0)
|
||||||
emit(ARM_MOV_R(rd, ARM_R0), ctx);
|
emit(ARM_MOV_R(rd, ARM_R0), ctx);
|
||||||
|
@ -1931,8 +1931,6 @@ source "drivers/cpufreq/Kconfig"
|
|||||||
|
|
||||||
endmenu
|
endmenu
|
||||||
|
|
||||||
source "drivers/firmware/Kconfig"
|
|
||||||
|
|
||||||
source "drivers/acpi/Kconfig"
|
source "drivers/acpi/Kconfig"
|
||||||
|
|
||||||
source "arch/arm64/kvm/Kconfig"
|
source "arch/arm64/kvm/Kconfig"
|
||||||
|
@ -115,7 +115,6 @@
|
|||||||
|
|
||||||
bus@8000000 {
|
bus@8000000 {
|
||||||
compatible = "arm,vexpress,v2m-p1", "simple-bus";
|
compatible = "arm,vexpress,v2m-p1", "simple-bus";
|
||||||
arm,v2m-memory-map = "rs1";
|
|
||||||
#address-cells = <2>; /* SMB chipselect number and offset */
|
#address-cells = <2>; /* SMB chipselect number and offset */
|
||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
|
|
||||||
|
@ -192,32 +192,9 @@
|
|||||||
remote-endpoint = <&clcd_pads>;
|
remote-endpoint = <&clcd_pads>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
panel-timing {
|
|
||||||
clock-frequency = <63500127>;
|
|
||||||
hactive = <1024>;
|
|
||||||
hback-porch = <152>;
|
|
||||||
hfront-porch = <48>;
|
|
||||||
hsync-len = <104>;
|
|
||||||
vactive = <768>;
|
|
||||||
vback-porch = <23>;
|
|
||||||
vfront-porch = <3>;
|
|
||||||
vsync-len = <4>;
|
|
||||||
};
|
|
||||||
};
|
};
|
||||||
|
|
||||||
bus@8000000 {
|
bus@8000000 {
|
||||||
compatible = "simple-bus";
|
|
||||||
|
|
||||||
#address-cells = <2>;
|
|
||||||
#size-cells = <1>;
|
|
||||||
ranges = <0 0 0 0x08000000 0x04000000>,
|
|
||||||
<1 0 0 0x14000000 0x04000000>,
|
|
||||||
<2 0 0 0x18000000 0x04000000>,
|
|
||||||
<3 0 0 0x1c000000 0x04000000>,
|
|
||||||
<4 0 0 0x0c000000 0x04000000>,
|
|
||||||
<5 0 0 0x10000000 0x04000000>;
|
|
||||||
|
|
||||||
#interrupt-cells = <1>;
|
#interrupt-cells = <1>;
|
||||||
interrupt-map-mask = <0 0 63>;
|
interrupt-map-mask = <0 0 63>;
|
||||||
interrupt-map = <0 0 0 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
|
interrupt-map = <0 0 0 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
@ -27,8 +27,6 @@
|
|||||||
reg = <0x0 0x2b1f0000 0x0 0x1000>;
|
reg = <0x0 0x2b1f0000 0x0 0x1000>;
|
||||||
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
|
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "mhu_lpri_rx",
|
|
||||||
"mhu_hpri_rx";
|
|
||||||
#mbox-cells = <1>;
|
#mbox-cells = <1>;
|
||||||
clocks = <&soc_refclk100mhz>;
|
clocks = <&soc_refclk100mhz>;
|
||||||
clock-names = "apb_pclk";
|
clock-names = "apb_pclk";
|
||||||
@ -804,16 +802,6 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
bus@8000000 {
|
bus@8000000 {
|
||||||
compatible = "simple-bus";
|
|
||||||
#address-cells = <2>;
|
|
||||||
#size-cells = <1>;
|
|
||||||
ranges = <0 0 0 0x08000000 0x04000000>,
|
|
||||||
<1 0 0 0x14000000 0x04000000>,
|
|
||||||
<2 0 0 0x18000000 0x04000000>,
|
|
||||||
<3 0 0 0x1c000000 0x04000000>,
|
|
||||||
<4 0 0 0x0c000000 0x04000000>,
|
|
||||||
<5 0 0 0x10000000 0x04000000>;
|
|
||||||
|
|
||||||
#interrupt-cells = <1>;
|
#interrupt-cells = <1>;
|
||||||
interrupt-map-mask = <0 0 15>;
|
interrupt-map-mask = <0 0 15>;
|
||||||
interrupt-map = <0 0 0 &gic 0 GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
|
interrupt-map = <0 0 0 &gic 0 GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
@ -92,16 +92,23 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
bus@8000000 {
|
bus@8000000 {
|
||||||
motherboard-bus {
|
compatible = "simple-bus";
|
||||||
|
#address-cells = <2>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
ranges = <0 0x8000000 0 0x8000000 0x18000000>;
|
||||||
|
|
||||||
|
motherboard-bus@8000000 {
|
||||||
compatible = "arm,vexpress,v2p-p1", "simple-bus";
|
compatible = "arm,vexpress,v2p-p1", "simple-bus";
|
||||||
#address-cells = <2>; /* SMB chipselect number and offset */
|
#address-cells = <2>; /* SMB chipselect number and offset */
|
||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
#interrupt-cells = <1>;
|
ranges = <0 0 0 0x08000000 0x04000000>,
|
||||||
ranges;
|
<1 0 0 0x14000000 0x04000000>,
|
||||||
model = "V2M-Juno";
|
<2 0 0 0x18000000 0x04000000>,
|
||||||
|
<3 0 0 0x1c000000 0x04000000>,
|
||||||
|
<4 0 0 0x0c000000 0x04000000>,
|
||||||
|
<5 0 0 0x10000000 0x04000000>;
|
||||||
arm,hbi = <0x252>;
|
arm,hbi = <0x252>;
|
||||||
arm,vexpress,site = <0>;
|
arm,vexpress,site = <0>;
|
||||||
arm,v2m-memory-map = "rs1";
|
|
||||||
|
|
||||||
flash@0 {
|
flash@0 {
|
||||||
/* 2 * 32MiB NOR Flash memory mounted on CS0 */
|
/* 2 * 32MiB NOR Flash memory mounted on CS0 */
|
||||||
@ -218,7 +225,7 @@
|
|||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
mmci@50000 {
|
mmc@50000 {
|
||||||
compatible = "arm,pl180", "arm,primecell";
|
compatible = "arm,pl180", "arm,primecell";
|
||||||
reg = <0x050000 0x1000>;
|
reg = <0x050000 0x1000>;
|
||||||
interrupts = <5>;
|
interrupts = <5>;
|
||||||
@ -246,7 +253,7 @@
|
|||||||
clock-names = "KMIREFCLK", "apb_pclk";
|
clock-names = "KMIREFCLK", "apb_pclk";
|
||||||
};
|
};
|
||||||
|
|
||||||
wdt@f0000 {
|
watchdog@f0000 {
|
||||||
compatible = "arm,sp805", "arm,primecell";
|
compatible = "arm,sp805", "arm,primecell";
|
||||||
reg = <0x0f0000 0x10000>;
|
reg = <0x0f0000 0x10000>;
|
||||||
interrupts = <7>;
|
interrupts = <7>;
|
||||||
|
@ -133,17 +133,6 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
bus@8000000 {
|
bus@8000000 {
|
||||||
compatible = "simple-bus";
|
|
||||||
|
|
||||||
#address-cells = <2>;
|
|
||||||
#size-cells = <1>;
|
|
||||||
ranges = <0 0 0 0x08000000 0x04000000>,
|
|
||||||
<1 0 0 0x14000000 0x04000000>,
|
|
||||||
<2 0 0 0x18000000 0x04000000>,
|
|
||||||
<3 0 0 0x1c000000 0x04000000>,
|
|
||||||
<4 0 0 0x0c000000 0x04000000>,
|
|
||||||
<5 0 0 0x10000000 0x04000000>;
|
|
||||||
|
|
||||||
#interrupt-cells = <1>;
|
#interrupt-cells = <1>;
|
||||||
interrupt-map-mask = <0 0 63>;
|
interrupt-map-mask = <0 0 63>;
|
||||||
interrupt-map = <0 0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
|
interrupt-map = <0 0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
@ -6,7 +6,7 @@
|
|||||||
*/
|
*/
|
||||||
/ {
|
/ {
|
||||||
bus@8000000 {
|
bus@8000000 {
|
||||||
motherboard-bus {
|
motherboard-bus@8000000 {
|
||||||
arm,v2m-memory-map = "rs2";
|
arm,v2m-memory-map = "rs2";
|
||||||
|
|
||||||
iofpga-bus@300000000 {
|
iofpga-bus@300000000 {
|
||||||
|
@ -77,13 +77,21 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
bus@8000000 {
|
bus@8000000 {
|
||||||
motherboard-bus {
|
compatible = "simple-bus";
|
||||||
arm,v2m-memory-map = "rs1";
|
#address-cells = <2>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
ranges = <0 0x8000000 0 0x8000000 0x18000000>;
|
||||||
|
|
||||||
|
motherboard-bus@8000000 {
|
||||||
compatible = "arm,vexpress,v2m-p1", "simple-bus";
|
compatible = "arm,vexpress,v2m-p1", "simple-bus";
|
||||||
#address-cells = <2>; /* SMB chipselect number and offset */
|
#address-cells = <2>; /* SMB chipselect number and offset */
|
||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
#interrupt-cells = <1>;
|
ranges = <0 0 0 0x08000000 0x04000000>,
|
||||||
ranges;
|
<1 0 0 0x14000000 0x04000000>,
|
||||||
|
<2 0 0 0x18000000 0x04000000>,
|
||||||
|
<3 0 0 0x1c000000 0x04000000>,
|
||||||
|
<4 0 0 0x0c000000 0x04000000>,
|
||||||
|
<5 0 0 0x10000000 0x04000000>;
|
||||||
|
|
||||||
flash@0 {
|
flash@0 {
|
||||||
compatible = "arm,vexpress-flash", "cfi-flash";
|
compatible = "arm,vexpress-flash", "cfi-flash";
|
||||||
@ -130,7 +138,7 @@
|
|||||||
clock-names = "apb_pclk";
|
clock-names = "apb_pclk";
|
||||||
};
|
};
|
||||||
|
|
||||||
mmci@50000 {
|
mmc@50000 {
|
||||||
compatible = "arm,pl180", "arm,primecell";
|
compatible = "arm,pl180", "arm,primecell";
|
||||||
reg = <0x050000 0x1000>;
|
reg = <0x050000 0x1000>;
|
||||||
interrupts = <9>, <10>;
|
interrupts = <9>, <10>;
|
||||||
@ -190,7 +198,7 @@
|
|||||||
clock-names = "uartclk", "apb_pclk";
|
clock-names = "uartclk", "apb_pclk";
|
||||||
};
|
};
|
||||||
|
|
||||||
wdt@f0000 {
|
watchdog@f0000 {
|
||||||
compatible = "arm,sp805", "arm,primecell";
|
compatible = "arm,sp805", "arm,primecell";
|
||||||
reg = <0x0f0000 0x1000>;
|
reg = <0x0f0000 0x1000>;
|
||||||
interrupts = <0>;
|
interrupts = <0>;
|
||||||
|
@ -145,61 +145,6 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
smb: bus@8000000 {
|
smb: bus@8000000 {
|
||||||
compatible = "simple-bus";
|
ranges = <0x8000000 0 0x8000000 0x18000000>;
|
||||||
|
|
||||||
#address-cells = <2>;
|
|
||||||
#size-cells = <1>;
|
|
||||||
ranges = <0 0 0 0x08000000 0x04000000>,
|
|
||||||
<1 0 0 0x14000000 0x04000000>,
|
|
||||||
<2 0 0 0x18000000 0x04000000>,
|
|
||||||
<3 0 0 0x1c000000 0x04000000>,
|
|
||||||
<4 0 0 0x0c000000 0x04000000>,
|
|
||||||
<5 0 0 0x10000000 0x04000000>;
|
|
||||||
|
|
||||||
#interrupt-cells = <1>;
|
|
||||||
interrupt-map-mask = <0 0 63>;
|
|
||||||
interrupt-map = <0 0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 1 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 3 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 4 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 5 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 6 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 7 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 8 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 9 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 10 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 11 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 12 &gic GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 13 &gic GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 14 &gic GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 15 &gic GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 16 &gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 17 &gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 18 &gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 19 &gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 20 &gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 21 &gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 22 &gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 23 &gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 24 &gic GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 25 &gic GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 26 &gic GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 27 &gic GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 28 &gic GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 29 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 30 &gic GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 31 &gic GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 32 &gic GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 33 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 34 &gic GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 35 &gic GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 36 &gic GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 37 &gic GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 38 &gic GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 39 &gic GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 40 &gic GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 41 &gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<0 0 42 &gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
|
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
@ -405,9 +405,9 @@
|
|||||||
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clock-frequency = <0>; /* fixed up by bootloader */
|
clock-frequency = <0>; /* fixed up by bootloader */
|
||||||
clocks = <&clockgen QORIQ_CLK_HWACCEL 1>;
|
clocks = <&clockgen QORIQ_CLK_HWACCEL 1>;
|
||||||
voltage-ranges = <1800 1800 3300 3300>;
|
voltage-ranges = <1800 1800>;
|
||||||
sdhci,auto-cmd12;
|
sdhci,auto-cmd12;
|
||||||
broken-cd;
|
non-removable;
|
||||||
little-endian;
|
little-endian;
|
||||||
bus-width = <4>;
|
bus-width = <4>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
|
@ -91,7 +91,7 @@
|
|||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
compatible = "jedec,spi-nor";
|
compatible = "jedec,spi-nor";
|
||||||
spi-max-frequency = <80000000>;
|
spi-max-frequency = <80000000>;
|
||||||
spi-tx-bus-width = <4>;
|
spi-tx-bus-width = <1>;
|
||||||
spi-rx-bus-width = <4>;
|
spi-rx-bus-width = <4>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
@ -48,7 +48,7 @@
|
|||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
compatible = "jedec,spi-nor";
|
compatible = "jedec,spi-nor";
|
||||||
spi-max-frequency = <80000000>;
|
spi-max-frequency = <80000000>;
|
||||||
spi-tx-bus-width = <4>;
|
spi-tx-bus-width = <1>;
|
||||||
spi-rx-bus-width = <4>;
|
spi-rx-bus-width = <4>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
@ -102,6 +102,7 @@
|
|||||||
regulator-min-microvolt = <850000>;
|
regulator-min-microvolt = <850000>;
|
||||||
regulator-max-microvolt = <950000>;
|
regulator-max-microvolt = <950000>;
|
||||||
regulator-boot-on;
|
regulator-boot-on;
|
||||||
|
regulator-always-on;
|
||||||
regulator-ramp-delay = <3125>;
|
regulator-ramp-delay = <3125>;
|
||||||
nxp,dvs-run-voltage = <950000>;
|
nxp,dvs-run-voltage = <950000>;
|
||||||
nxp,dvs-standby-voltage = <850000>;
|
nxp,dvs-standby-voltage = <850000>;
|
||||||
|
@ -647,7 +647,7 @@
|
|||||||
pinctrl_hog: hoggrp {
|
pinctrl_hog: hoggrp {
|
||||||
fsl,pins = <
|
fsl,pins = <
|
||||||
MX8MM_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x40000159 /* M2_GDIS# */
|
MX8MM_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x40000159 /* M2_GDIS# */
|
||||||
MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x40000041 /* M2_RST# */
|
MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x40000041 /* M2_RST# */
|
||||||
MX8MM_IOMUXC_NAND_DATA01_GPIO3_IO7 0x40000119 /* M2_OFF# */
|
MX8MM_IOMUXC_NAND_DATA01_GPIO3_IO7 0x40000119 /* M2_OFF# */
|
||||||
MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x40000159 /* M2_WDIS# */
|
MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x40000159 /* M2_WDIS# */
|
||||||
MX8MM_IOMUXC_SAI1_TXD2_GPIO4_IO14 0x40000041 /* AMP GPIO1 */
|
MX8MM_IOMUXC_SAI1_TXD2_GPIO4_IO14 0x40000041 /* AMP GPIO1 */
|
||||||
|
@ -101,7 +101,7 @@
|
|||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
compatible = "jedec,spi-nor";
|
compatible = "jedec,spi-nor";
|
||||||
spi-max-frequency = <80000000>;
|
spi-max-frequency = <80000000>;
|
||||||
spi-tx-bus-width = <4>;
|
spi-tx-bus-width = <1>;
|
||||||
spi-rx-bus-width = <4>;
|
spi-rx-bus-width = <4>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
@ -633,7 +633,7 @@
|
|||||||
pinctrl_hog: hoggrp {
|
pinctrl_hog: hoggrp {
|
||||||
fsl,pins = <
|
fsl,pins = <
|
||||||
MX8MN_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x40000159 /* M2_GDIS# */
|
MX8MN_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x40000159 /* M2_GDIS# */
|
||||||
MX8MN_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x40000041 /* M2_RST# */
|
MX8MN_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x40000041 /* M2_RST# */
|
||||||
MX8MN_IOMUXC_NAND_DATA01_GPIO3_IO7 0x40000119 /* M2_OFF# */
|
MX8MN_IOMUXC_NAND_DATA01_GPIO3_IO7 0x40000119 /* M2_OFF# */
|
||||||
MX8MN_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x40000159 /* M2_WDIS# */
|
MX8MN_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x40000159 /* M2_WDIS# */
|
||||||
MX8MN_IOMUXC_SAI2_RXFS_GPIO4_IO21 0x40000041 /* APP GPIO1 */
|
MX8MN_IOMUXC_SAI2_RXFS_GPIO4_IO21 0x40000041 /* APP GPIO1 */
|
||||||
|
@ -74,7 +74,7 @@
|
|||||||
compatible = "jedec,spi-nor";
|
compatible = "jedec,spi-nor";
|
||||||
reg = <0>;
|
reg = <0>;
|
||||||
spi-max-frequency = <80000000>;
|
spi-max-frequency = <80000000>;
|
||||||
spi-tx-bus-width = <4>;
|
spi-tx-bus-width = <1>;
|
||||||
spi-rx-bus-width = <4>;
|
spi-rx-bus-width = <4>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
@ -337,6 +337,8 @@
|
|||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
compatible = "micron,n25q256a", "jedec,spi-nor";
|
compatible = "micron,n25q256a", "jedec,spi-nor";
|
||||||
spi-max-frequency = <29000000>;
|
spi-max-frequency = <29000000>;
|
||||||
|
spi-tx-bus-width = <1>;
|
||||||
|
spi-rx-bus-width = <4>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -281,7 +281,7 @@
|
|||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
reg = <0>;
|
reg = <0>;
|
||||||
spi-tx-bus-width = <4>;
|
spi-tx-bus-width = <1>;
|
||||||
spi-rx-bus-width = <4>;
|
spi-rx-bus-width = <4>;
|
||||||
m25p,fast-read;
|
m25p,fast-read;
|
||||||
spi-max-frequency = <50000000>;
|
spi-max-frequency = <50000000>;
|
||||||
|
@ -48,8 +48,10 @@
|
|||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
pon: power-on@800 {
|
pon: power-on@800 {
|
||||||
compatible = "qcom,pm8916-pon";
|
compatible = "qcom,pm8998-pon";
|
||||||
reg = <0x0800>;
|
reg = <0x0800>;
|
||||||
|
mode-bootloader = <0x2>;
|
||||||
|
mode-recovery = <0x1>;
|
||||||
|
|
||||||
pon_pwrkey: pwrkey {
|
pon_pwrkey: pwrkey {
|
||||||
compatible = "qcom,pm8941-pwrkey";
|
compatible = "qcom,pm8941-pwrkey";
|
||||||
|
@ -804,6 +804,16 @@
|
|||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
&pon_pwrkey {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&pon_resin {
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
linux,code = <KEY_VOLUMEDOWN>;
|
||||||
|
};
|
||||||
|
|
||||||
&qupv3_id_0 {
|
&qupv3_id_0 {
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
@ -273,7 +273,6 @@
|
|||||||
"Headphone Jack", "HPOL",
|
"Headphone Jack", "HPOL",
|
||||||
"Headphone Jack", "HPOR";
|
"Headphone Jack", "HPOR";
|
||||||
|
|
||||||
#sound-dai-cells = <0>;
|
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
@ -301,11 +300,11 @@
|
|||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
dai-link@2 {
|
dai-link@5 {
|
||||||
link-name = "MultiMedia2";
|
link-name = "MultiMedia2";
|
||||||
reg = <2>;
|
reg = <LPASS_DP_RX>;
|
||||||
cpu {
|
cpu {
|
||||||
sound-dai = <&lpass_cpu 2>;
|
sound-dai = <&lpass_cpu LPASS_DP_RX>;
|
||||||
};
|
};
|
||||||
|
|
||||||
codec {
|
codec {
|
||||||
@ -782,7 +781,7 @@ hp_i2c: &i2c9 {
|
|||||||
qcom,playback-sd-lines = <0>;
|
qcom,playback-sd-lines = <0>;
|
||||||
};
|
};
|
||||||
|
|
||||||
hdmi-primary@0 {
|
hdmi@5 {
|
||||||
reg = <LPASS_DP_RX>;
|
reg = <LPASS_DP_RX>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
@ -1850,9 +1850,9 @@
|
|||||||
|
|
||||||
cpufreq_hw: cpufreq@18591000 {
|
cpufreq_hw: cpufreq@18591000 {
|
||||||
compatible = "qcom,cpufreq-epss";
|
compatible = "qcom,cpufreq-epss";
|
||||||
reg = <0 0x18591100 0 0x900>,
|
reg = <0 0x18591000 0 0x1000>,
|
||||||
<0 0x18592100 0 0x900>,
|
<0 0x18592000 0 0x1000>,
|
||||||
<0 0x18593100 0 0x900>;
|
<0 0x18593000 0 0x1000>;
|
||||||
clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
|
clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
|
||||||
clock-names = "xo", "alternate";
|
clock-names = "xo", "alternate";
|
||||||
#freq-domain-cells = <1>;
|
#freq-domain-cells = <1>;
|
||||||
|
@ -654,9 +654,20 @@
|
|||||||
compatible = "qcom,sdm660-a2noc";
|
compatible = "qcom,sdm660-a2noc";
|
||||||
reg = <0x01704000 0xc100>;
|
reg = <0x01704000 0xc100>;
|
||||||
#interconnect-cells = <1>;
|
#interconnect-cells = <1>;
|
||||||
clock-names = "bus", "bus_a";
|
clock-names = "bus",
|
||||||
|
"bus_a",
|
||||||
|
"ipa",
|
||||||
|
"ufs_axi",
|
||||||
|
"aggre2_ufs_axi",
|
||||||
|
"aggre2_usb3_axi",
|
||||||
|
"cfg_noc_usb2_axi";
|
||||||
clocks = <&rpmcc RPM_SMD_AGGR2_NOC_CLK>,
|
clocks = <&rpmcc RPM_SMD_AGGR2_NOC_CLK>,
|
||||||
<&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>;
|
<&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>,
|
||||||
|
<&rpmcc RPM_SMD_IPA_CLK>,
|
||||||
|
<&gcc GCC_UFS_AXI_CLK>,
|
||||||
|
<&gcc GCC_AGGRE2_UFS_AXI_CLK>,
|
||||||
|
<&gcc GCC_AGGRE2_USB3_AXI_CLK>,
|
||||||
|
<&gcc GCC_CFG_NOC_USB2_AXI_CLK>;
|
||||||
};
|
};
|
||||||
|
|
||||||
mnoc: interconnect@1745000 {
|
mnoc: interconnect@1745000 {
|
||||||
|
@ -128,23 +128,28 @@
|
|||||||
no-map;
|
no-map;
|
||||||
};
|
};
|
||||||
|
|
||||||
wlan_msa_mem: memory@8c400000 {
|
ipa_fw_mem: memory@8c400000 {
|
||||||
reg = <0 0x8c400000 0 0x100000>;
|
reg = <0 0x8c400000 0 0x10000>;
|
||||||
no-map;
|
no-map;
|
||||||
};
|
};
|
||||||
|
|
||||||
gpu_mem: memory@8c515000 {
|
ipa_gsi_mem: memory@8c410000 {
|
||||||
reg = <0 0x8c515000 0 0x2000>;
|
reg = <0 0x8c410000 0 0x5000>;
|
||||||
no-map;
|
no-map;
|
||||||
};
|
};
|
||||||
|
|
||||||
ipa_fw_mem: memory@8c517000 {
|
gpu_mem: memory@8c415000 {
|
||||||
reg = <0 0x8c517000 0 0x5a000>;
|
reg = <0 0x8c415000 0 0x2000>;
|
||||||
no-map;
|
no-map;
|
||||||
};
|
};
|
||||||
|
|
||||||
adsp_mem: memory@8c600000 {
|
adsp_mem: memory@8c500000 {
|
||||||
reg = <0 0x8c600000 0 0x1a00000>;
|
reg = <0 0x8c500000 0 0x1a00000>;
|
||||||
|
no-map;
|
||||||
|
};
|
||||||
|
|
||||||
|
wlan_msa_mem: memory@8df00000 {
|
||||||
|
reg = <0 0x8df00000 0 0x100000>;
|
||||||
no-map;
|
no-map;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -16,6 +16,17 @@
|
|||||||
#include "sdm850.dtsi"
|
#include "sdm850.dtsi"
|
||||||
#include "pm8998.dtsi"
|
#include "pm8998.dtsi"
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Update following upstream (sdm845.dtsi) reserved
|
||||||
|
* memory mappings for firmware loading to succeed
|
||||||
|
* and enable the IPA device.
|
||||||
|
*/
|
||||||
|
/delete-node/ &ipa_fw_mem;
|
||||||
|
/delete-node/ &ipa_gsi_mem;
|
||||||
|
/delete-node/ &gpu_mem;
|
||||||
|
/delete-node/ &adsp_mem;
|
||||||
|
/delete-node/ &wlan_msa_mem;
|
||||||
|
|
||||||
/ {
|
/ {
|
||||||
model = "Lenovo Yoga C630";
|
model = "Lenovo Yoga C630";
|
||||||
compatible = "lenovo,yoga-c630", "qcom,sdm845";
|
compatible = "lenovo,yoga-c630", "qcom,sdm845";
|
||||||
@ -58,6 +69,29 @@
|
|||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
/* Reserved memory changes for IPA */
|
||||||
|
reserved-memory {
|
||||||
|
wlan_msa_mem: memory@8c400000 {
|
||||||
|
reg = <0 0x8c400000 0 0x100000>;
|
||||||
|
no-map;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpu_mem: memory@8c515000 {
|
||||||
|
reg = <0 0x8c515000 0 0x2000>;
|
||||||
|
no-map;
|
||||||
|
};
|
||||||
|
|
||||||
|
ipa_fw_mem: memory@8c517000 {
|
||||||
|
reg = <0 0x8c517000 0 0x5a000>;
|
||||||
|
no-map;
|
||||||
|
};
|
||||||
|
|
||||||
|
adsp_mem: memory@8c600000 {
|
||||||
|
reg = <0 0x8c600000 0 0x1a00000>;
|
||||||
|
no-map;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
sn65dsi86_refclk: sn65dsi86-refclk {
|
sn65dsi86_refclk: sn65dsi86-refclk {
|
||||||
compatible = "fixed-clock";
|
compatible = "fixed-clock";
|
||||||
#clock-cells = <0>;
|
#clock-cells = <0>;
|
||||||
|
@ -245,7 +245,6 @@ CONFIG_DEVTMPFS_MOUNT=y
|
|||||||
CONFIG_FW_LOADER_USER_HELPER=y
|
CONFIG_FW_LOADER_USER_HELPER=y
|
||||||
CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y
|
CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y
|
||||||
CONFIG_HISILICON_LPC=y
|
CONFIG_HISILICON_LPC=y
|
||||||
CONFIG_SIMPLE_PM_BUS=y
|
|
||||||
CONFIG_FSL_MC_BUS=y
|
CONFIG_FSL_MC_BUS=y
|
||||||
CONFIG_TEGRA_ACONNECT=m
|
CONFIG_TEGRA_ACONNECT=m
|
||||||
CONFIG_GNSS=m
|
CONFIG_GNSS=m
|
||||||
|
@ -43,7 +43,7 @@ void __init arm64_hugetlb_cma_reserve(void)
|
|||||||
#ifdef CONFIG_ARM64_4K_PAGES
|
#ifdef CONFIG_ARM64_4K_PAGES
|
||||||
order = PUD_SHIFT - PAGE_SHIFT;
|
order = PUD_SHIFT - PAGE_SHIFT;
|
||||||
#else
|
#else
|
||||||
order = CONT_PMD_SHIFT + PMD_SHIFT - PAGE_SHIFT;
|
order = CONT_PMD_SHIFT - PAGE_SHIFT;
|
||||||
#endif
|
#endif
|
||||||
/*
|
/*
|
||||||
* HugeTLB CMA reservation is required for gigantic
|
* HugeTLB CMA reservation is required for gigantic
|
||||||
|
@ -8,7 +8,7 @@ config CSKY
|
|||||||
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
|
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
|
||||||
select ARCH_USE_BUILTIN_BSWAP
|
select ARCH_USE_BUILTIN_BSWAP
|
||||||
select ARCH_USE_QUEUED_RWLOCKS
|
select ARCH_USE_QUEUED_RWLOCKS
|
||||||
select ARCH_WANT_FRAME_POINTERS if !CPU_CK610
|
select ARCH_WANT_FRAME_POINTERS if !CPU_CK610 && $(cc-option,-mbacktrace)
|
||||||
select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT
|
select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT
|
||||||
select COMMON_CLK
|
select COMMON_CLK
|
||||||
select CLKSRC_MMIO
|
select CLKSRC_MMIO
|
||||||
@ -241,6 +241,7 @@ endchoice
|
|||||||
|
|
||||||
menuconfig HAVE_TCM
|
menuconfig HAVE_TCM
|
||||||
bool "Tightly-Coupled/Sram Memory"
|
bool "Tightly-Coupled/Sram Memory"
|
||||||
|
depends on !COMPILE_TEST
|
||||||
help
|
help
|
||||||
The implementation are not only used by TCM (Tightly-Coupled Meory)
|
The implementation are not only used by TCM (Tightly-Coupled Meory)
|
||||||
but also used by sram on SOC bus. It follow existed linux tcm
|
but also used by sram on SOC bus. It follow existed linux tcm
|
||||||
|
@ -74,7 +74,6 @@ static __always_inline unsigned long __fls(unsigned long x)
|
|||||||
* bug fix, why only could use atomic!!!!
|
* bug fix, why only could use atomic!!!!
|
||||||
*/
|
*/
|
||||||
#include <asm-generic/bitops/non-atomic.h>
|
#include <asm-generic/bitops/non-atomic.h>
|
||||||
#define __clear_bit(nr, vaddr) clear_bit(nr, vaddr)
|
|
||||||
|
|
||||||
#include <asm-generic/bitops/le.h>
|
#include <asm-generic/bitops/le.h>
|
||||||
#include <asm-generic/bitops/ext2-atomic.h>
|
#include <asm-generic/bitops/ext2-atomic.h>
|
||||||
|
@ -99,7 +99,8 @@ static int gpr_set(struct task_struct *target,
|
|||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
regs.sr = task_pt_regs(target)->sr;
|
/* BIT(0) of regs.sr is Condition Code/Carry bit */
|
||||||
|
regs.sr = (regs.sr & BIT(0)) | (task_pt_regs(target)->sr & ~BIT(0));
|
||||||
#ifdef CONFIG_CPU_HAS_HILO
|
#ifdef CONFIG_CPU_HAS_HILO
|
||||||
regs.dcsr = task_pt_regs(target)->dcsr;
|
regs.dcsr = task_pt_regs(target)->dcsr;
|
||||||
#endif
|
#endif
|
||||||
|
@ -52,10 +52,14 @@ static long restore_sigcontext(struct pt_regs *regs,
|
|||||||
struct sigcontext __user *sc)
|
struct sigcontext __user *sc)
|
||||||
{
|
{
|
||||||
int err = 0;
|
int err = 0;
|
||||||
|
unsigned long sr = regs->sr;
|
||||||
|
|
||||||
/* sc_pt_regs is structured the same as the start of pt_regs */
|
/* sc_pt_regs is structured the same as the start of pt_regs */
|
||||||
err |= __copy_from_user(regs, &sc->sc_pt_regs, sizeof(struct pt_regs));
|
err |= __copy_from_user(regs, &sc->sc_pt_regs, sizeof(struct pt_regs));
|
||||||
|
|
||||||
|
/* BIT(0) of regs->sr is Condition Code/Carry bit */
|
||||||
|
regs->sr = (sr & ~1) | (regs->sr & 1);
|
||||||
|
|
||||||
/* Restore the floating-point state. */
|
/* Restore the floating-point state. */
|
||||||
err |= restore_fpu_state(sc);
|
err |= restore_fpu_state(sc);
|
||||||
|
|
||||||
|
@ -388,8 +388,6 @@ config CRASH_DUMP
|
|||||||
help
|
help
|
||||||
Generate crash dump after being started by kexec.
|
Generate crash dump after being started by kexec.
|
||||||
|
|
||||||
source "drivers/firmware/Kconfig"
|
|
||||||
|
|
||||||
endmenu
|
endmenu
|
||||||
|
|
||||||
menu "Power management and ACPI options"
|
menu "Power management and ACPI options"
|
||||||
|
@ -3316,8 +3316,6 @@ source "drivers/cpuidle/Kconfig"
|
|||||||
|
|
||||||
endmenu
|
endmenu
|
||||||
|
|
||||||
source "drivers/firmware/Kconfig"
|
|
||||||
|
|
||||||
source "arch/mips/kvm/Kconfig"
|
source "arch/mips/kvm/Kconfig"
|
||||||
|
|
||||||
source "arch/mips/vdso/Kconfig"
|
source "arch/mips/vdso/Kconfig"
|
||||||
|
@ -10,8 +10,6 @@
|
|||||||
#include <linux/io.h>
|
#include <linux/io.h>
|
||||||
#include <linux/types.h>
|
#include <linux/types.h>
|
||||||
|
|
||||||
#include <asm/mips-boards/launch.h>
|
|
||||||
|
|
||||||
extern unsigned long __cps_access_bad_size(void)
|
extern unsigned long __cps_access_bad_size(void)
|
||||||
__compiletime_error("Bad size for CPS accessor");
|
__compiletime_error("Bad size for CPS accessor");
|
||||||
|
|
||||||
@ -167,30 +165,11 @@ static inline uint64_t mips_cps_cluster_config(unsigned int cluster)
|
|||||||
*/
|
*/
|
||||||
static inline unsigned int mips_cps_numcores(unsigned int cluster)
|
static inline unsigned int mips_cps_numcores(unsigned int cluster)
|
||||||
{
|
{
|
||||||
unsigned int ncores;
|
|
||||||
|
|
||||||
if (!mips_cm_present())
|
if (!mips_cm_present())
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
/* Add one before masking to handle 0xff indicating no cores */
|
/* Add one before masking to handle 0xff indicating no cores */
|
||||||
ncores = (mips_cps_cluster_config(cluster) + 1) & CM_GCR_CONFIG_PCORES;
|
return (mips_cps_cluster_config(cluster) + 1) & CM_GCR_CONFIG_PCORES;
|
||||||
|
|
||||||
if (IS_ENABLED(CONFIG_SOC_MT7621)) {
|
|
||||||
struct cpulaunch *launch;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Ralink MT7621S SoC is single core, but the GCR_CONFIG method
|
|
||||||
* always reports 2 cores. Check the second core's LAUNCH_FREADY
|
|
||||||
* flag to detect if the second core is missing. This method
|
|
||||||
* only works before the core has been started.
|
|
||||||
*/
|
|
||||||
launch = (struct cpulaunch *)CKSEG0ADDR(CPULAUNCH);
|
|
||||||
launch += 2; /* MT7621 has 2 VPEs per core */
|
|
||||||
if (!(launch->flags & LAUNCH_FREADY))
|
|
||||||
ncores = 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
return ncores;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -384,6 +384,4 @@ config KEXEC_FILE
|
|||||||
|
|
||||||
endmenu
|
endmenu
|
||||||
|
|
||||||
source "drivers/firmware/Kconfig"
|
|
||||||
|
|
||||||
source "drivers/parisc/Kconfig"
|
source "drivers/parisc/Kconfig"
|
||||||
|
@ -154,7 +154,7 @@
|
|||||||
|
|
||||||
fm1mac3: ethernet@e4000 {
|
fm1mac3: ethernet@e4000 {
|
||||||
phy-handle = <&sgmii_aqr_phy3>;
|
phy-handle = <&sgmii_aqr_phy3>;
|
||||||
phy-connection-type = "sgmii-2500";
|
phy-connection-type = "2500base-x";
|
||||||
sleep = <&rcpm 0x20000000>;
|
sleep = <&rcpm 0x20000000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -136,6 +136,14 @@ static inline void kuap_kernel_restore(struct pt_regs *regs, unsigned long kuap)
|
|||||||
if (kuap_is_disabled())
|
if (kuap_is_disabled())
|
||||||
return;
|
return;
|
||||||
|
|
||||||
|
if (unlikely(kuap != KUAP_NONE)) {
|
||||||
|
current->thread.kuap = KUAP_NONE;
|
||||||
|
kuap_lock(kuap, false);
|
||||||
|
}
|
||||||
|
|
||||||
|
if (likely(regs->kuap == KUAP_NONE))
|
||||||
|
return;
|
||||||
|
|
||||||
current->thread.kuap = regs->kuap;
|
current->thread.kuap = regs->kuap;
|
||||||
|
|
||||||
kuap_unlock(regs->kuap, false);
|
kuap_unlock(regs->kuap, false);
|
||||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user