forked from Minki/linux
[media] pxa_camera: conversion to dmaengine
Convert pxa_camera to dmaengine. This removes all DMA registers manipulation in favor of the more generic dmaengine API. The functional level should be the same as before. The biggest change is in the sg_split() function, which splits a videobuf-dma into several scatterlists for 3 planes captures (Y, U, V). Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> [g.liakhovetski@gmx.de: fix a function prototype, use bool, struct init] Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
This commit is contained in:
Robert Jarzmik
Mauro Carvalho Chehab
parent
e5853918d6
commit
1e77d55ac9
@ -30,6 +30,7 @@ config VIDEO_PXA27x
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tristate "PXA27x Quick Capture Interface driver"
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depends on VIDEO_DEV && PXA27x && SOC_CAMERA
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select VIDEOBUF_DMA_SG
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select SG_SPLIT
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---help---
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This is a v4l2 driver for the PXA27x Quick Capture Interface
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@ -28,6 +28,9 @@
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#include <linux/clk.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <linux/dmaengine.h>
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#include <linux/dma-mapping.h>
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#include <linux/dma/pxa-dma.h>
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#include <media/v4l2-common.h>
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#include <media/v4l2-dev.h>
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@ -38,7 +41,6 @@
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#include <linux/videodev2.h>
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#include <mach/dma.h>
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#include <linux/platform_data/media/camera-pxa.h>
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#define PXA_CAM_VERSION "0.0.6"
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@ -175,21 +177,16 @@ enum pxa_camera_active_dma {
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DMA_V = 0x4,
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};
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/* descriptor needed for the PXA DMA engine */
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struct pxa_cam_dma {
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dma_addr_t sg_dma;
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struct pxa_dma_desc *sg_cpu;
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size_t sg_size;
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int sglen;
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};
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/* buffer for one video frame */
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struct pxa_buffer {
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/* common v4l buffer stuff -- must be first */
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struct videobuf_buffer vb;
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u32 code;
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/* our descriptor lists for Y, U and V channels */
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struct pxa_cam_dma dmas[3];
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struct dma_async_tx_descriptor *descs[3];
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dma_cookie_t cookie[3];
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struct scatterlist *sg[3];
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int sg_len[3];
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int inwork;
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enum pxa_camera_active_dma active_dma;
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};
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@ -207,7 +204,7 @@ struct pxa_camera_dev {
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void __iomem *base;
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int channels;
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unsigned int dma_chans[3];
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struct dma_chan *dma_chans[3];
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struct pxacamera_platform_data *pdata;
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struct resource *res;
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@ -222,7 +219,6 @@ struct pxa_camera_dev {
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spinlock_t lock;
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struct pxa_buffer *active;
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struct pxa_dma_desc *sg_tail[3];
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struct tasklet_struct task_eof;
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u32 save_cicr[5];
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@ -259,7 +255,6 @@ static int pxa_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
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static void free_buffer(struct videobuf_queue *vq, struct pxa_buffer *buf)
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{
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struct soc_camera_device *icd = vq->priv_data;
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struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
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struct videobuf_dmabuf *dma = videobuf_to_dma(&buf->vb);
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int i;
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@ -274,65 +269,44 @@ static void free_buffer(struct videobuf_queue *vq, struct pxa_buffer *buf)
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*/
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videobuf_waiton(vq, &buf->vb, 0, 0);
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for (i = 0; i < ARRAY_SIZE(buf->dmas); i++) {
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if (buf->dmas[i].sg_cpu)
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dma_free_coherent(ici->v4l2_dev.dev,
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buf->dmas[i].sg_size,
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buf->dmas[i].sg_cpu,
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buf->dmas[i].sg_dma);
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buf->dmas[i].sg_cpu = NULL;
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for (i = 0; i < 3 && buf->descs[i]; i++) {
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dmaengine_desc_free(buf->descs[i]);
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kfree(buf->sg[i]);
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buf->descs[i] = NULL;
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buf->sg[i] = NULL;
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buf->sg_len[i] = 0;
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}
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videobuf_dma_unmap(vq->dev, dma);
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videobuf_dma_free(dma);
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buf->vb.state = VIDEOBUF_NEEDS_INIT;
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dev_dbg(icd->parent, "%s end (vb=0x%p) 0x%08lx %d\n", __func__,
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&buf->vb, buf->vb.baddr, buf->vb.bsize);
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}
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static int calculate_dma_sglen(struct scatterlist *sglist, int sglen,
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int sg_first_ofs, int size)
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{
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int i, offset, dma_len, xfer_len;
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struct scatterlist *sg;
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offset = sg_first_ofs;
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for_each_sg(sglist, sg, sglen, i) {
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dma_len = sg_dma_len(sg);
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/* PXA27x Developer's Manual 27.4.4.1: round up to 8 bytes */
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xfer_len = roundup(min(dma_len - offset, size), 8);
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size = max(0, size - xfer_len);
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offset = 0;
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if (size == 0)
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break;
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}
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BUG_ON(size != 0);
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return i + 1;
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}
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static void pxa_camera_dma_irq(int channel, struct pxa_camera_dev *pcdev,
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static void pxa_camera_dma_irq(struct pxa_camera_dev *pcdev,
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enum pxa_camera_active_dma act_dma);
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static void pxa_camera_dma_irq_y(int channel, void *data)
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static void pxa_camera_dma_irq_y(void *data)
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{
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struct pxa_camera_dev *pcdev = data;
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pxa_camera_dma_irq(channel, pcdev, DMA_Y);
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pxa_camera_dma_irq(pcdev, DMA_Y);
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}
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static void pxa_camera_dma_irq_u(int channel, void *data)
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static void pxa_camera_dma_irq_u(void *data)
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{
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struct pxa_camera_dev *pcdev = data;
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pxa_camera_dma_irq(channel, pcdev, DMA_U);
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pxa_camera_dma_irq(pcdev, DMA_U);
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}
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static void pxa_camera_dma_irq_v(int channel, void *data)
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static void pxa_camera_dma_irq_v(void *data)
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{
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struct pxa_camera_dev *pcdev = data;
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pxa_camera_dma_irq(channel, pcdev, DMA_V);
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pxa_camera_dma_irq(pcdev, DMA_V);
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}
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/**
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@ -343,93 +317,53 @@ static void pxa_camera_dma_irq_v(int channel, void *data)
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* @channel: dma channel (0 => 'Y', 1 => 'U', 2 => 'V')
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* @cibr: camera Receive Buffer Register
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* @size: bytes to transfer
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* @sg_first: first element of sg_list
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* @sg_first_ofs: offset in first element of sg_list
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* @offset: offset in videobuffer of the first byte to transfer
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*
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* Prepares the pxa dma descriptors to transfer one camera channel.
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* Beware sg_first and sg_first_ofs are both input and output parameters.
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*
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* Returns 0 or -ENOMEM if no coherent memory is available
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* Returns 0 if success or -ENOMEM if no memory is available
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*/
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static int pxa_init_dma_channel(struct pxa_camera_dev *pcdev,
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struct pxa_buffer *buf,
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struct videobuf_dmabuf *dma, int channel,
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int cibr, int size,
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struct scatterlist **sg_first, int *sg_first_ofs)
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int cibr, int size, int offset)
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{
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struct pxa_cam_dma *pxa_dma = &buf->dmas[channel];
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struct device *dev = pcdev->soc_host.v4l2_dev.dev;
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struct scatterlist *sg;
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int i, offset, sglen;
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int dma_len = 0, xfer_len = 0;
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struct dma_chan *dma_chan = pcdev->dma_chans[channel];
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struct scatterlist *sg = buf->sg[channel];
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int sglen = buf->sg_len[channel];
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struct dma_async_tx_descriptor *tx;
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if (pxa_dma->sg_cpu)
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dma_free_coherent(dev, pxa_dma->sg_size,
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pxa_dma->sg_cpu, pxa_dma->sg_dma);
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sglen = calculate_dma_sglen(*sg_first, dma->sglen,
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*sg_first_ofs, size);
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pxa_dma->sg_size = (sglen + 1) * sizeof(struct pxa_dma_desc);
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pxa_dma->sg_cpu = dma_alloc_coherent(dev, pxa_dma->sg_size,
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&pxa_dma->sg_dma, GFP_KERNEL);
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if (!pxa_dma->sg_cpu)
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return -ENOMEM;
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pxa_dma->sglen = sglen;
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offset = *sg_first_ofs;
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dev_dbg(dev, "DMA: sg_first=%p, sglen=%d, ofs=%d, dma.desc=%x\n",
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*sg_first, sglen, *sg_first_ofs, pxa_dma->sg_dma);
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for_each_sg(*sg_first, sg, sglen, i) {
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dma_len = sg_dma_len(sg);
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/* PXA27x Developer's Manual 27.4.4.1: round up to 8 bytes */
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xfer_len = roundup(min(dma_len - offset, size), 8);
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size = max(0, size - xfer_len);
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pxa_dma->sg_cpu[i].dsadr = pcdev->res->start + cibr;
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pxa_dma->sg_cpu[i].dtadr = sg_dma_address(sg) + offset;
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pxa_dma->sg_cpu[i].dcmd =
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DCMD_FLOWSRC | DCMD_BURST8 | DCMD_INCTRGADDR | xfer_len;
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#ifdef DEBUG
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if (!i)
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pxa_dma->sg_cpu[i].dcmd |= DCMD_STARTIRQEN;
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#endif
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pxa_dma->sg_cpu[i].ddadr =
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pxa_dma->sg_dma + (i + 1) * sizeof(struct pxa_dma_desc);
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dev_vdbg(dev, "DMA: desc.%08x->@phys=0x%08x, len=%d\n",
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pxa_dma->sg_dma + i * sizeof(struct pxa_dma_desc),
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sg_dma_address(sg) + offset, xfer_len);
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offset = 0;
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if (size == 0)
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break;
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tx = dmaengine_prep_slave_sg(dma_chan, sg, sglen, DMA_DEV_TO_MEM,
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DMA_PREP_INTERRUPT | DMA_CTRL_REUSE);
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if (!tx) {
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dev_err(pcdev->soc_host.v4l2_dev.dev,
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"dmaengine_prep_slave_sg failed\n");
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goto fail;
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}
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pxa_dma->sg_cpu[sglen].ddadr = DDADR_STOP;
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pxa_dma->sg_cpu[sglen].dcmd = DCMD_FLOWSRC | DCMD_BURST8 | DCMD_ENDIRQEN;
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/*
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* Handle 1 special case :
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* - in 3 planes (YUV422P format), we might finish with xfer_len equal
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* to dma_len (end on PAGE boundary). In this case, the sg element
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* for next plane should be the next after the last used to store the
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* last scatter gather RAM page
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*/
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if (xfer_len >= dma_len) {
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*sg_first_ofs = xfer_len - dma_len;
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*sg_first = sg_next(sg);
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} else {
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*sg_first_ofs = xfer_len;
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*sg_first = sg;
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tx->callback_param = pcdev;
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switch (channel) {
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case 0:
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tx->callback = pxa_camera_dma_irq_y;
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break;
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case 1:
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tx->callback = pxa_camera_dma_irq_u;
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break;
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case 2:
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tx->callback = pxa_camera_dma_irq_v;
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break;
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}
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buf->descs[channel] = tx;
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return 0;
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fail:
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kfree(sg);
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dev_dbg(pcdev->soc_host.v4l2_dev.dev,
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"%s (vb=0x%p) dma_tx=%p\n",
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__func__, &buf->vb, tx);
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return -ENOMEM;
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}
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static void pxa_videobuf_set_actdma(struct pxa_camera_dev *pcdev,
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@ -456,6 +390,7 @@ static int pxa_videobuf_prepare(struct videobuf_queue *vq,
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struct pxa_buffer *buf = container_of(vb, struct pxa_buffer, vb);
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int ret;
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int size_y, size_u = 0, size_v = 0;
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size_t sizes[3];
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dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
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vb, vb->baddr, vb->bsize);
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@ -498,9 +433,7 @@ static int pxa_videobuf_prepare(struct videobuf_queue *vq,
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if (vb->state == VIDEOBUF_NEEDS_INIT) {
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int size = vb->size;
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int next_ofs = 0;
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struct videobuf_dmabuf *dma = videobuf_to_dma(vb);
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struct scatterlist *sg;
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ret = videobuf_iolock(vq, vb, NULL);
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if (ret)
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@ -513,11 +446,19 @@ static int pxa_videobuf_prepare(struct videobuf_queue *vq,
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size_y = size;
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}
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sg = dma->sglist;
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sizes[0] = size_y;
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sizes[1] = size_u;
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sizes[2] = size_v;
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ret = sg_split(dma->sglist, dma->sglen, 0, pcdev->channels,
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sizes, buf->sg, buf->sg_len, GFP_KERNEL);
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if (ret < 0) {
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dev_err(dev, "sg_split failed: %d\n", ret);
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goto fail;
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}
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/* init DMA for Y channel */
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ret = pxa_init_dma_channel(pcdev, buf, dma, 0, CIBR0, size_y,
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&sg, &next_ofs);
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ret = pxa_init_dma_channel(pcdev, buf, dma, 0, CIBR0,
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size_y, 0);
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if (ret) {
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dev_err(dev, "DMA initialization for Y/RGB failed\n");
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goto fail;
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@ -526,7 +467,7 @@ static int pxa_videobuf_prepare(struct videobuf_queue *vq,
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/* init DMA for U channel */
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if (size_u)
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ret = pxa_init_dma_channel(pcdev, buf, dma, 1, CIBR1,
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size_u, &sg, &next_ofs);
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size_u, size_y);
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if (ret) {
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dev_err(dev, "DMA initialization for U failed\n");
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goto fail;
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@ -535,7 +476,7 @@ static int pxa_videobuf_prepare(struct videobuf_queue *vq,
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/* init DMA for V channel */
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if (size_v)
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ret = pxa_init_dma_channel(pcdev, buf, dma, 2, CIBR2,
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size_v, &sg, &next_ofs);
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size_v, size_y + size_u);
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if (ret) {
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dev_err(dev, "DMA initialization for V failed\n");
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goto fail;
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@ -572,10 +513,8 @@ static void pxa_dma_start_channels(struct pxa_camera_dev *pcdev)
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for (i = 0; i < pcdev->channels; i++) {
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dev_dbg(pcdev->soc_host.v4l2_dev.dev,
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"%s (channel=%d) ddadr=%08x\n", __func__,
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i, active->dmas[i].sg_dma);
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DDADR(pcdev->dma_chans[i]) = active->dmas[i].sg_dma;
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DCSR(pcdev->dma_chans[i]) = DCSR_RUN;
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"%s (channel=%d)\n", __func__, i);
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dma_async_issue_pending(pcdev->dma_chans[i]);
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}
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}
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@ -586,7 +525,7 @@ static void pxa_dma_stop_channels(struct pxa_camera_dev *pcdev)
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for (i = 0; i < pcdev->channels; i++) {
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dev_dbg(pcdev->soc_host.v4l2_dev.dev,
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"%s (channel=%d)\n", __func__, i);
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DCSR(pcdev->dma_chans[i]) = 0;
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dmaengine_terminate_all(pcdev->dma_chans[i]);
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}
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}
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@ -594,18 +533,12 @@ static void pxa_dma_add_tail_buf(struct pxa_camera_dev *pcdev,
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struct pxa_buffer *buf)
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{
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int i;
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struct pxa_dma_desc *buf_last_desc;
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for (i = 0; i < pcdev->channels; i++) {
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buf_last_desc = buf->dmas[i].sg_cpu + buf->dmas[i].sglen;
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buf_last_desc->ddadr = DDADR_STOP;
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if (pcdev->sg_tail[i])
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/* Link the new buffer to the old tail */
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pcdev->sg_tail[i]->ddadr = buf->dmas[i].sg_dma;
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/* Update the channel tail */
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pcdev->sg_tail[i] = buf_last_desc;
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buf->cookie[i] = dmaengine_submit(buf->descs[i]);
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dev_dbg(pcdev->soc_host.v4l2_dev.dev,
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"%s (channel=%d) : submit vb=%p cookie=%d\n",
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__func__, i, buf, buf->descs[i]->cookie);
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}
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}
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@ -697,8 +630,6 @@ static void pxa_camera_wakeup(struct pxa_camera_dev *pcdev,
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struct videobuf_buffer *vb,
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struct pxa_buffer *buf)
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{
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int i;
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/* _init is used to debug races, see comment in pxa_camera_reqbufs() */
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list_del_init(&vb->queue);
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vb->state = VIDEOBUF_DONE;
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@ -710,8 +641,6 @@ static void pxa_camera_wakeup(struct pxa_camera_dev *pcdev,
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if (list_empty(&pcdev->capture)) {
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pxa_camera_stop_capture(pcdev);
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for (i = 0; i < pcdev->channels; i++)
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pcdev->sg_tail[i] = NULL;
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return;
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}
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||||
|
||||
@ -735,50 +664,41 @@ static void pxa_camera_wakeup(struct pxa_camera_dev *pcdev,
|
||||
*
|
||||
* Context: should only be called within the dma irq handler
|
||||
*/
|
||||
static void pxa_camera_check_link_miss(struct pxa_camera_dev *pcdev)
|
||||
static void pxa_camera_check_link_miss(struct pxa_camera_dev *pcdev,
|
||||
dma_cookie_t last_submitted,
|
||||
dma_cookie_t last_issued)
|
||||
{
|
||||
int i, is_dma_stopped = 1;
|
||||
bool is_dma_stopped = last_submitted != last_issued;
|
||||
|
||||
for (i = 0; i < pcdev->channels; i++)
|
||||
if (DDADR(pcdev->dma_chans[i]) != DDADR_STOP)
|
||||
is_dma_stopped = 0;
|
||||
dev_dbg(pcdev->soc_host.v4l2_dev.dev,
|
||||
"%s : top queued buffer=%p, dma_stopped=%d\n",
|
||||
"%s : top queued buffer=%p, is_dma_stopped=%d\n",
|
||||
__func__, pcdev->active, is_dma_stopped);
|
||||
|
||||
if (pcdev->active && is_dma_stopped)
|
||||
pxa_camera_start_capture(pcdev);
|
||||
}
|
||||
|
||||
static void pxa_camera_dma_irq(int channel, struct pxa_camera_dev *pcdev,
|
||||
static void pxa_camera_dma_irq(struct pxa_camera_dev *pcdev,
|
||||
enum pxa_camera_active_dma act_dma)
|
||||
{
|
||||
struct device *dev = pcdev->soc_host.v4l2_dev.dev;
|
||||
struct pxa_buffer *buf;
|
||||
struct pxa_buffer *buf, *last_buf;
|
||||
unsigned long flags;
|
||||
u32 status, camera_status, overrun;
|
||||
u32 camera_status, overrun;
|
||||
int chan;
|
||||
struct videobuf_buffer *vb;
|
||||
enum dma_status last_status;
|
||||
dma_cookie_t last_issued;
|
||||
|
||||
spin_lock_irqsave(&pcdev->lock, flags);
|
||||
|
||||
status = DCSR(channel);
|
||||
DCSR(channel) = status;
|
||||
|
||||
camera_status = __raw_readl(pcdev->base + CISR);
|
||||
dev_dbg(dev, "camera dma irq, cisr=0x%x dma=%d\n",
|
||||
camera_status, act_dma);
|
||||
overrun = CISR_IFO_0;
|
||||
if (pcdev->channels == 3)
|
||||
overrun |= CISR_IFO_1 | CISR_IFO_2;
|
||||
|
||||
if (status & DCSR_BUSERR) {
|
||||
dev_err(dev, "DMA Bus Error IRQ!\n");
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (!(status & (DCSR_ENDINTR | DCSR_STARTINTR))) {
|
||||
dev_err(dev, "Unknown DMA IRQ source, status: 0x%08x\n",
|
||||
status);
|
||||
goto out;
|
||||
}
|
||||
|
||||
/*
|
||||
* pcdev->active should not be NULL in DMA irq handler.
|
||||
*
|
||||
@ -798,28 +718,41 @@ static void pxa_camera_dma_irq(int channel, struct pxa_camera_dev *pcdev,
|
||||
buf = container_of(vb, struct pxa_buffer, vb);
|
||||
WARN_ON(buf->inwork || list_empty(&vb->queue));
|
||||
|
||||
dev_dbg(dev, "%s channel=%d %s%s(vb=0x%p) dma.desc=%x\n",
|
||||
__func__, channel, status & DCSR_STARTINTR ? "SOF " : "",
|
||||
status & DCSR_ENDINTR ? "EOF " : "", vb, DDADR(channel));
|
||||
|
||||
if (status & DCSR_ENDINTR) {
|
||||
/*
|
||||
* It's normal if the last frame creates an overrun, as there
|
||||
* are no more DMA descriptors to fetch from QCI fifos
|
||||
*/
|
||||
if (camera_status & overrun &&
|
||||
!list_is_last(pcdev->capture.next, &pcdev->capture)) {
|
||||
dev_dbg(dev, "FIFO overrun! CISR: %x\n",
|
||||
camera_status);
|
||||
pxa_camera_stop_capture(pcdev);
|
||||
pxa_camera_start_capture(pcdev);
|
||||
goto out;
|
||||
}
|
||||
buf->active_dma &= ~act_dma;
|
||||
if (!buf->active_dma) {
|
||||
pxa_camera_wakeup(pcdev, vb, buf);
|
||||
pxa_camera_check_link_miss(pcdev);
|
||||
}
|
||||
/*
|
||||
* It's normal if the last frame creates an overrun, as there
|
||||
* are no more DMA descriptors to fetch from QCI fifos
|
||||
*/
|
||||
switch (act_dma) {
|
||||
case DMA_U:
|
||||
chan = 1;
|
||||
break;
|
||||
case DMA_V:
|
||||
chan = 2;
|
||||
break;
|
||||
default:
|
||||
chan = 0;
|
||||
break;
|
||||
}
|
||||
last_buf = list_entry(pcdev->capture.prev,
|
||||
struct pxa_buffer, vb.queue);
|
||||
last_status = dma_async_is_tx_complete(pcdev->dma_chans[chan],
|
||||
last_buf->cookie[chan],
|
||||
NULL, &last_issued);
|
||||
if (camera_status & overrun &&
|
||||
last_status != DMA_COMPLETE) {
|
||||
dev_dbg(dev, "FIFO overrun! CISR: %x\n",
|
||||
camera_status);
|
||||
pxa_camera_stop_capture(pcdev);
|
||||
list_for_each_entry(buf, &pcdev->capture, vb.queue)
|
||||
pxa_dma_add_tail_buf(pcdev, buf);
|
||||
pxa_camera_start_capture(pcdev);
|
||||
goto out;
|
||||
}
|
||||
buf->active_dma &= ~act_dma;
|
||||
if (!buf->active_dma) {
|
||||
pxa_camera_wakeup(pcdev, vb, buf);
|
||||
pxa_camera_check_link_miss(pcdev, last_buf->cookie[chan],
|
||||
last_issued);
|
||||
}
|
||||
|
||||
out:
|
||||
@ -1006,10 +939,7 @@ static void pxa_camera_clock_stop(struct soc_camera_host *ici)
|
||||
__raw_writel(0x3ff, pcdev->base + CICR0);
|
||||
|
||||
/* Stop DMA engine */
|
||||
DCSR(pcdev->dma_chans[0]) = 0;
|
||||
DCSR(pcdev->dma_chans[1]) = 0;
|
||||
DCSR(pcdev->dma_chans[2]) = 0;
|
||||
|
||||
pxa_dma_stop_channels(pcdev);
|
||||
pxa_camera_deactivate(pcdev);
|
||||
}
|
||||
|
||||
@ -1636,10 +1566,6 @@ static int pxa_camera_resume(struct device *dev)
|
||||
struct pxa_camera_dev *pcdev = ici->priv;
|
||||
int i = 0, ret = 0;
|
||||
|
||||
DRCMR(68) = pcdev->dma_chans[0] | DRCMR_MAPVLD;
|
||||
DRCMR(69) = pcdev->dma_chans[1] | DRCMR_MAPVLD;
|
||||
DRCMR(70) = pcdev->dma_chans[2] | DRCMR_MAPVLD;
|
||||
|
||||
__raw_writel(pcdev->save_cicr[i++] & ~CICR0_ENB, pcdev->base + CICR0);
|
||||
__raw_writel(pcdev->save_cicr[i++], pcdev->base + CICR1);
|
||||
__raw_writel(pcdev->save_cicr[i++], pcdev->base + CICR2);
|
||||
@ -1745,8 +1671,15 @@ static int pxa_camera_probe(struct platform_device *pdev)
|
||||
struct pxa_camera_dev *pcdev;
|
||||
struct resource *res;
|
||||
void __iomem *base;
|
||||
struct dma_slave_config config = {
|
||||
.src_addr_width = 0,
|
||||
.src_maxburst = 8,
|
||||
.direction = DMA_DEV_TO_MEM,
|
||||
};
|
||||
dma_cap_mask_t mask;
|
||||
struct pxad_param params;
|
||||
int irq;
|
||||
int err = 0;
|
||||
int err = 0, i;
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
irq = platform_get_irq(pdev, 0);
|
||||
@ -1814,36 +1747,47 @@ static int pxa_camera_probe(struct platform_device *pdev)
|
||||
pcdev->base = base;
|
||||
|
||||
/* request dma */
|
||||
err = pxa_request_dma("CI_Y", DMA_PRIO_HIGH,
|
||||
pxa_camera_dma_irq_y, pcdev);
|
||||
if (err < 0) {
|
||||
dev_err(&pdev->dev, "Can't request DMA for Y\n");
|
||||
return err;
|
||||
}
|
||||
pcdev->dma_chans[0] = err;
|
||||
dev_dbg(&pdev->dev, "got DMA channel %d\n", pcdev->dma_chans[0]);
|
||||
dma_cap_zero(mask);
|
||||
dma_cap_set(DMA_SLAVE, mask);
|
||||
dma_cap_set(DMA_PRIVATE, mask);
|
||||
|
||||
err = pxa_request_dma("CI_U", DMA_PRIO_HIGH,
|
||||
pxa_camera_dma_irq_u, pcdev);
|
||||
if (err < 0) {
|
||||
dev_err(&pdev->dev, "Can't request DMA for U\n");
|
||||
params.prio = 0;
|
||||
params.drcmr = 68;
|
||||
pcdev->dma_chans[0] =
|
||||
dma_request_slave_channel_compat(mask, pxad_filter_fn,
|
||||
¶ms, &pdev->dev, "CI_Y");
|
||||
if (!pcdev->dma_chans[0]) {
|
||||
dev_err(&pdev->dev, "Can't request DMA for Y\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
params.drcmr = 69;
|
||||
pcdev->dma_chans[1] =
|
||||
dma_request_slave_channel_compat(mask, pxad_filter_fn,
|
||||
¶ms, &pdev->dev, "CI_U");
|
||||
if (!pcdev->dma_chans[1]) {
|
||||
dev_err(&pdev->dev, "Can't request DMA for Y\n");
|
||||
goto exit_free_dma_y;
|
||||
}
|
||||
pcdev->dma_chans[1] = err;
|
||||
dev_dbg(&pdev->dev, "got DMA channel (U) %d\n", pcdev->dma_chans[1]);
|
||||
|
||||
err = pxa_request_dma("CI_V", DMA_PRIO_HIGH,
|
||||
pxa_camera_dma_irq_v, pcdev);
|
||||
if (err < 0) {
|
||||
params.drcmr = 70;
|
||||
pcdev->dma_chans[2] =
|
||||
dma_request_slave_channel_compat(mask, pxad_filter_fn,
|
||||
¶ms, &pdev->dev, "CI_V");
|
||||
if (!pcdev->dma_chans[2]) {
|
||||
dev_err(&pdev->dev, "Can't request DMA for V\n");
|
||||
goto exit_free_dma_u;
|
||||
}
|
||||
pcdev->dma_chans[2] = err;
|
||||
dev_dbg(&pdev->dev, "got DMA channel (V) %d\n", pcdev->dma_chans[2]);
|
||||
|
||||
DRCMR(68) = pcdev->dma_chans[0] | DRCMR_MAPVLD;
|
||||
DRCMR(69) = pcdev->dma_chans[1] | DRCMR_MAPVLD;
|
||||
DRCMR(70) = pcdev->dma_chans[2] | DRCMR_MAPVLD;
|
||||
for (i = 0; i < 3; i++) {
|
||||
config.src_addr = pcdev->res->start + CIBR0 + i * 8;
|
||||
err = dmaengine_slave_config(pcdev->dma_chans[i], &config);
|
||||
if (err < 0) {
|
||||
dev_err(&pdev->dev, "dma slave config failed: %d\n",
|
||||
err);
|
||||
goto exit_free_dma;
|
||||
}
|
||||
}
|
||||
|
||||
/* request irq */
|
||||
err = devm_request_irq(&pdev->dev, pcdev->irq, pxa_camera_irq, 0,
|
||||
@ -1867,11 +1811,11 @@ static int pxa_camera_probe(struct platform_device *pdev)
|
||||
return 0;
|
||||
|
||||
exit_free_dma:
|
||||
pxa_free_dma(pcdev->dma_chans[2]);
|
||||
dma_release_channel(pcdev->dma_chans[2]);
|
||||
exit_free_dma_u:
|
||||
pxa_free_dma(pcdev->dma_chans[1]);
|
||||
dma_release_channel(pcdev->dma_chans[1]);
|
||||
exit_free_dma_y:
|
||||
pxa_free_dma(pcdev->dma_chans[0]);
|
||||
dma_release_channel(pcdev->dma_chans[0]);
|
||||
return err;
|
||||
}
|
||||
|
||||
@ -1881,9 +1825,9 @@ static int pxa_camera_remove(struct platform_device *pdev)
|
||||
struct pxa_camera_dev *pcdev = container_of(soc_host,
|
||||
struct pxa_camera_dev, soc_host);
|
||||
|
||||
pxa_free_dma(pcdev->dma_chans[0]);
|
||||
pxa_free_dma(pcdev->dma_chans[1]);
|
||||
pxa_free_dma(pcdev->dma_chans[2]);
|
||||
dma_release_channel(pcdev->dma_chans[0]);
|
||||
dma_release_channel(pcdev->dma_chans[1]);
|
||||
dma_release_channel(pcdev->dma_chans[2]);
|
||||
|
||||
soc_camera_host_unregister(soc_host);
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user