From 58b5c8acba12fdf375dd30074c07730e67b97c3f Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Mon, 4 Mar 2019 14:11:28 +0100 Subject: [PATCH 01/26] clk: meson-g12a: add cpu clock bindings Add Amlogic G12A Family CPU clocks bindings, only export CPU_CLK since it should be the only ID used. Signed-off-by: Neil Armstrong Reviewed-by: Martin Blumenstingl Reviewed-by: Rob Herring Acked-by: Jerome Brunet Link: https://lkml.kernel.org/r/20190304131129.7762-2-narmstrong@baylibre.com --- include/dt-bindings/clock/g12a-clkc.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/clock/g12a-clkc.h b/include/dt-bindings/clock/g12a-clkc.h index 83b657038d1e..d7bf0830c87d 100644 --- a/include/dt-bindings/clock/g12a-clkc.h +++ b/include/dt-bindings/clock/g12a-clkc.h @@ -131,5 +131,6 @@ #define CLKID_MALI_1 174 #define CLKID_MALI 175 #define CLKID_MPLL_5OM 177 +#define CLKID_CPU_CLK 187 #endif /* __G12A_CLKC_H */ From dc6276f57617344c9e78332c682ea1e982527e09 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Mon, 4 Mar 2019 11:53:58 +0100 Subject: [PATCH 02/26] clk: g12a-aoclk: re-export CLKID_AO_SAR_ADC_SEL clock id When submitted v2 of the G12A AO-CLK IDs, the SAR_ADC_SEL ID was moved to the internal non-exported bindings, but this clock is necessary and mandatory for the SAR ADC bindings. Export it back to the public bindings. Fixes: be3d960b0aeb ("dt-bindings: clk: add G12A AO Clock and Reset Bindings") Signed-off-by: Neil Armstrong Acked-by: Jerome Brunet Link: https://lkml.kernel.org/r/20190304105358.4987-1-narmstrong@baylibre.com --- drivers/clk/meson/g12a-aoclk.h | 1 - include/dt-bindings/clock/g12a-aoclkc.h | 1 + 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/meson/g12a-aoclk.h b/drivers/clk/meson/g12a-aoclk.h index 04b0d5506641..666b4493822c 100644 --- a/drivers/clk/meson/g12a-aoclk.h +++ b/drivers/clk/meson/g12a-aoclk.h @@ -16,7 +16,6 @@ * to expose, such as the internal muxes and dividers of composite clocks, * will remain defined here. */ -#define CLKID_AO_SAR_ADC_SEL 16 #define CLKID_AO_SAR_ADC_DIV 17 #define CLKID_AO_CTS_OSCIN 19 #define CLKID_AO_32K_PRE 20 diff --git a/include/dt-bindings/clock/g12a-aoclkc.h b/include/dt-bindings/clock/g12a-aoclkc.h index 8db01ffbeb06..5ac66a2eee0f 100644 --- a/include/dt-bindings/clock/g12a-aoclkc.h +++ b/include/dt-bindings/clock/g12a-aoclkc.h @@ -26,6 +26,7 @@ #define CLKID_AO_M4_FCLK 13 #define CLKID_AO_M4_HCLK 14 #define CLKID_AO_CLK81 15 +#define CLKID_AO_SAR_ADC_SEL 16 #define CLKID_AO_SAR_ADC_CLK 18 #define CLKID_AO_32K 23 #define CLKID_AO_CEC 27 From 17750f5218764a06172a294b23275a950e2adce9 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Thu, 7 Mar 2019 15:14:54 +0100 Subject: [PATCH 03/26] dt-bindings: clk: g12a-clkc: add PCIE PLL clock ID Add a clock ID for the reference clock feeding the USB3+PCIe Combo PHY. Signed-off-by: Neil Armstrong Acked-by: Jerome Brunet Link: https://lkml.kernel.org/r/20190307141455.23879-3-narmstrong@baylibre.com --- include/dt-bindings/clock/g12a-clkc.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/clock/g12a-clkc.h b/include/dt-bindings/clock/g12a-clkc.h index d7bf0830c87d..30303728fe09 100644 --- a/include/dt-bindings/clock/g12a-clkc.h +++ b/include/dt-bindings/clock/g12a-clkc.h @@ -132,5 +132,6 @@ #define CLKID_MALI 175 #define CLKID_MPLL_5OM 177 #define CLKID_CPU_CLK 187 +#define CLKID_PCIE_PLL 201 #endif /* __G12A_CLKC_H */ From a6256b3a92cbaf3f5ff034ce09d5665607e2d7a4 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Mon, 4 Mar 2019 11:49:16 +0100 Subject: [PATCH 04/26] dt-bindings: reset: meson-g12a: Add missing USB2 PHY resets The G12A Documentation lacked these 2 reset lines, but they are present and used for each USB 2 PHYs. Add them to the dt-bindings for the upcoming USB support. Fixes: dbfc54534dfc ("dt-bindings: reset: meson: add g12a bindings") Signed-off-by: Neil Armstrong Reviewed-by: Martin Blumenstingl Signed-off-by: Philipp Zabel --- include/dt-bindings/reset/amlogic,meson-g12a-reset.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/include/dt-bindings/reset/amlogic,meson-g12a-reset.h b/include/dt-bindings/reset/amlogic,meson-g12a-reset.h index 8063e8314eef..6d487c5eba2c 100644 --- a/include/dt-bindings/reset/amlogic,meson-g12a-reset.h +++ b/include/dt-bindings/reset/amlogic,meson-g12a-reset.h @@ -51,7 +51,10 @@ #define RESET_SD_EMMC_A 44 #define RESET_SD_EMMC_B 45 #define RESET_SD_EMMC_C 46 -/* 47-60 */ +/* 47 */ +#define RESET_USB_PHY20 48 +#define RESET_USB_PHY21 49 +/* 50-60 */ #define RESET_AUDIO_CODEC 61 /* 62-63 */ /* RESET2 */ From e4c1e95facf9ddf70bb1a737f8ab1c7d38acd234 Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Wed, 13 Feb 2019 10:58:35 +0100 Subject: [PATCH 05/26] dt-bindings: clock: axg-audio: unexpose controller inputs Remove the bindings ID of the clock input of the controller. These clocks are purely internal to the controller, exposing them was a mistake. Actually, these should not even be in the provider and have IDs to begin with. Unexpose these IDs before: * someone starts using them (even if there no valid reason to do so) * the actual clocks are removed. The fact that they exist is just the result of an ugly hack. This will be resolved in CCF when we can reference DT directly in parent table. Signed-off-by: Jerome Brunet Acked-by: Maxime Jourdan Reviewed-by: Rob Herring Signed-off-by: Neil Armstrong Link: https://lkml.kernel.org/r/20190213095835.17448-1-jbrunet@baylibre.com --- drivers/clk/meson/axg-audio.h | 20 ++++++++++++++++++++ include/dt-bindings/clock/axg-audio-clkc.h | 20 -------------------- 2 files changed, 20 insertions(+), 20 deletions(-) diff --git a/drivers/clk/meson/axg-audio.h b/drivers/clk/meson/axg-audio.h index 7191b39c9d65..644f0b0fddf2 100644 --- a/drivers/clk/meson/axg-audio.h +++ b/drivers/clk/meson/axg-audio.h @@ -60,6 +60,26 @@ #define AUD_CLKID_MST5 6 #define AUD_CLKID_MST6 7 #define AUD_CLKID_MST7 8 +#define AUD_CLKID_SLV_SCLK0 9 +#define AUD_CLKID_SLV_SCLK1 10 +#define AUD_CLKID_SLV_SCLK2 11 +#define AUD_CLKID_SLV_SCLK3 12 +#define AUD_CLKID_SLV_SCLK4 13 +#define AUD_CLKID_SLV_SCLK5 14 +#define AUD_CLKID_SLV_SCLK6 15 +#define AUD_CLKID_SLV_SCLK7 16 +#define AUD_CLKID_SLV_SCLK8 17 +#define AUD_CLKID_SLV_SCLK9 18 +#define AUD_CLKID_SLV_LRCLK0 19 +#define AUD_CLKID_SLV_LRCLK1 20 +#define AUD_CLKID_SLV_LRCLK2 21 +#define AUD_CLKID_SLV_LRCLK3 22 +#define AUD_CLKID_SLV_LRCLK4 23 +#define AUD_CLKID_SLV_LRCLK5 24 +#define AUD_CLKID_SLV_LRCLK6 25 +#define AUD_CLKID_SLV_LRCLK7 26 +#define AUD_CLKID_SLV_LRCLK8 27 +#define AUD_CLKID_SLV_LRCLK9 28 #define AUD_CLKID_MST_A_MCLK_SEL 59 #define AUD_CLKID_MST_B_MCLK_SEL 60 #define AUD_CLKID_MST_C_MCLK_SEL 61 diff --git a/include/dt-bindings/clock/axg-audio-clkc.h b/include/dt-bindings/clock/axg-audio-clkc.h index fd9c362099d9..eafb0de8466b 100644 --- a/include/dt-bindings/clock/axg-audio-clkc.h +++ b/include/dt-bindings/clock/axg-audio-clkc.h @@ -7,26 +7,6 @@ #ifndef __AXG_AUDIO_CLKC_BINDINGS_H #define __AXG_AUDIO_CLKC_BINDINGS_H -#define AUD_CLKID_SLV_SCLK0 9 -#define AUD_CLKID_SLV_SCLK1 10 -#define AUD_CLKID_SLV_SCLK2 11 -#define AUD_CLKID_SLV_SCLK3 12 -#define AUD_CLKID_SLV_SCLK4 13 -#define AUD_CLKID_SLV_SCLK5 14 -#define AUD_CLKID_SLV_SCLK6 15 -#define AUD_CLKID_SLV_SCLK7 16 -#define AUD_CLKID_SLV_SCLK8 17 -#define AUD_CLKID_SLV_SCLK9 18 -#define AUD_CLKID_SLV_LRCLK0 19 -#define AUD_CLKID_SLV_LRCLK1 20 -#define AUD_CLKID_SLV_LRCLK2 21 -#define AUD_CLKID_SLV_LRCLK3 22 -#define AUD_CLKID_SLV_LRCLK4 23 -#define AUD_CLKID_SLV_LRCLK5 24 -#define AUD_CLKID_SLV_LRCLK6 25 -#define AUD_CLKID_SLV_LRCLK7 26 -#define AUD_CLKID_SLV_LRCLK8 27 -#define AUD_CLKID_SLV_LRCLK9 28 #define AUD_CLKID_DDR_ARB 29 #define AUD_CLKID_PDM 30 #define AUD_CLKID_TDMIN_A 31 From 19478907951afef2249506acc8afec89c3133d9d Mon Sep 17 00:00:00 2001 From: Maxime Jourdan Date: Tue, 19 Mar 2019 11:11:37 +0100 Subject: [PATCH 06/26] dt-bindings: clk: g12a-clkc: add VDEC clock IDs Expose the three clocks related to the video decoder. Signed-off-by: Maxime Jourdan Reviewed-by: Rob Herring Signed-off-by: Neil Armstrong Link: https://lkml.kernel.org/r/20190319101138.27520-2-mjourdan@baylibre.com --- include/dt-bindings/clock/g12a-clkc.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/dt-bindings/clock/g12a-clkc.h b/include/dt-bindings/clock/g12a-clkc.h index 30303728fe09..82c9e0c020b2 100644 --- a/include/dt-bindings/clock/g12a-clkc.h +++ b/include/dt-bindings/clock/g12a-clkc.h @@ -133,5 +133,8 @@ #define CLKID_MPLL_5OM 177 #define CLKID_CPU_CLK 187 #define CLKID_PCIE_PLL 201 +#define CLKID_VDEC_1 204 +#define CLKID_VDEC_HEVC 207 +#define CLKID_VDEC_HEVCF 210 #endif /* __G12A_CLKC_H */ From 23e9ae2826466f17d4733b80bf1cc98645e90ef2 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Tue, 19 Mar 2019 22:41:23 +0100 Subject: [PATCH 07/26] dt-bindings: clock: meson8b: drop the "ABP" clock definition Commit 8e1dd17c8b0e3f ("dt-bindings: clock: meson8b: export the CPU post dividers") added a new clock ID "CLKID_ABP" which contains a typo. This was fixed by adding a new (typo-free) #define CLKID_APB in commit 40d08f774c17ad ("dt-bindings: clock: meson8b: add APB clock definition"). Now that the new #define is used by the driver we can remove the old one (because the old one is not used anywhere). Signed-off-by: Martin Blumenstingl Acked-by: Neil Armstrong Reviewed-by: Rob Herring Signed-off-by: Neil Armstrong Link: https://lkml.kernel.org/r/20190319214123.27219-2-martin.blumenstingl@googlemail.com --- include/dt-bindings/clock/meson8b-clkc.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/dt-bindings/clock/meson8b-clkc.h b/include/dt-bindings/clock/meson8b-clkc.h index 8067077a62ca..cd11628f50f8 100644 --- a/include/dt-bindings/clock/meson8b-clkc.h +++ b/include/dt-bindings/clock/meson8b-clkc.h @@ -103,7 +103,6 @@ #define CLKID_MPLL1 94 #define CLKID_MPLL2 95 #define CLKID_NAND_CLK 112 -#define CLKID_ABP 124 #define CLKID_APB 124 #define CLKID_PERIPH 126 #define CLKID_AXI 128 From 133bb341b99d096d332108f412234d0cf641c15d Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Thu, 21 Mar 2019 10:20:10 +0100 Subject: [PATCH 08/26] dt-bindings: clock: g12a-aoclk: expose CLKID_AO_CTS_OSCIN When submitted v2 of the G12A AO-CLK IDs, the CLKID_AO_CTS_OSCIN was moved to the internal non-exported bindings, but this clock is necessary for the second AO-CEC-B module since it embeds the 32768Hz dual-divider clock generator unlike the AO-CEC-A module. Export it back to the public bindings. Fixes: be3d960b0aeb ("dt-bindings: clk: add G12A AO Clock and Reset Bindings") Signed-off-by: Neil Armstrong Reviewed-by: Rob Herring Link: https://lkml.kernel.org/r/20190321092010.14382-1-narmstrong@baylibre.com --- drivers/clk/meson/g12a-aoclk.h | 1 - include/dt-bindings/clock/g12a-aoclkc.h | 1 + 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/meson/g12a-aoclk.h b/drivers/clk/meson/g12a-aoclk.h index 666b4493822c..a67c8a7cd7c4 100644 --- a/drivers/clk/meson/g12a-aoclk.h +++ b/drivers/clk/meson/g12a-aoclk.h @@ -17,7 +17,6 @@ * will remain defined here. */ #define CLKID_AO_SAR_ADC_DIV 17 -#define CLKID_AO_CTS_OSCIN 19 #define CLKID_AO_32K_PRE 20 #define CLKID_AO_32K_DIV 21 #define CLKID_AO_32K_SEL 22 diff --git a/include/dt-bindings/clock/g12a-aoclkc.h b/include/dt-bindings/clock/g12a-aoclkc.h index 5ac66a2eee0f..e916e49ff288 100644 --- a/include/dt-bindings/clock/g12a-aoclkc.h +++ b/include/dt-bindings/clock/g12a-aoclkc.h @@ -28,6 +28,7 @@ #define CLKID_AO_CLK81 15 #define CLKID_AO_SAR_ADC_SEL 16 #define CLKID_AO_SAR_ADC_CLK 18 +#define CLKID_AO_CTS_OSCIN 19 #define CLKID_AO_32K 23 #define CLKID_AO_CEC 27 #define CLKID_AO_CTS_RTC_OSCIN 28 From ba1ce88efa3af0c4b437c5d6aa3b1cae6bc42855 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sun, 24 Mar 2019 16:11:01 +0100 Subject: [PATCH 09/26] dt-bindings: clock: meson8b: export the VPU clock The VPU clock is an input the the "VPU" (Video Processing Unit), which is one of the components of the display controller. Signed-off-by: Martin Blumenstingl Reviewed-by: Rob Herring Acked-by: Jerome Brunet Signed-off-by: Neil Armstrong Link: https://lkml.kernel.org/r/20190324151104.18397-2-martin.blumenstingl@googlemail.com --- include/dt-bindings/clock/meson8b-clkc.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/clock/meson8b-clkc.h b/include/dt-bindings/clock/meson8b-clkc.h index cd11628f50f8..2ac9469a1c27 100644 --- a/include/dt-bindings/clock/meson8b-clkc.h +++ b/include/dt-bindings/clock/meson8b-clkc.h @@ -107,5 +107,6 @@ #define CLKID_PERIPH 126 #define CLKID_AXI 128 #define CLKID_L2_DRAM 130 +#define CLKID_VPU 190 #endif /* __MESON8B_CLKC_H */ From 77a725ff7a640ab24ff9cf9450e6eae072c49f16 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sun, 24 Mar 2019 16:14:22 +0100 Subject: [PATCH 10/26] dt-bindings: clock: meson8b: export the video decoder clocks Export the four video decoder clocks so they can be used by the video decoder driver: - VDEC_1 - VDEC_HCODEC - VDEC_2 - VDEC_HEVC Signed-off-by: Martin Blumenstingl Acked-by: Jerome Brunet Reviewed-by: Rob Herring Signed-off-by: Neil Armstrong Link: https://lkml.kernel.org/r/20190324151423.19063-2-martin.blumenstingl@googlemail.com --- include/dt-bindings/clock/meson8b-clkc.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/dt-bindings/clock/meson8b-clkc.h b/include/dt-bindings/clock/meson8b-clkc.h index 2ac9469a1c27..47556539f0ee 100644 --- a/include/dt-bindings/clock/meson8b-clkc.h +++ b/include/dt-bindings/clock/meson8b-clkc.h @@ -108,5 +108,9 @@ #define CLKID_AXI 128 #define CLKID_L2_DRAM 130 #define CLKID_VPU 190 +#define CLKID_VDEC_1 196 +#define CLKID_VDEC_HCODEC 199 +#define CLKID_VDEC_2 202 +#define CLKID_VDEC_HEVC 206 #endif /* __MESON8B_CLKC_H */ From d5ff1adb3809e2f74a3b57cea2e57c8e37d693c4 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Fri, 15 Mar 2019 14:56:54 +0100 Subject: [PATCH 11/26] dt-bindings: gpu: mali-midgard: Add resets property The Amlogic ARM Mali Midgard requires reset controls to power on and software reset the GPU, adds these as optional in the bindings. Signed-off-by: Neil Armstrong Reviewed-by: Rob Herring Signed-off-by: Kevin Hilman --- .../devicetree/bindings/gpu/arm,mali-midgard.txt | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt index 18a2cde2e5f3..1b1a74129141 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt @@ -37,6 +37,20 @@ Optional properties: - operating-points-v2 : Refer to Documentation/devicetree/bindings/opp/opp.txt for details. +- resets : Phandle of the GPU reset line. + +Vendor-specific bindings +------------------------ + +The Mali GPU is integrated very differently from one SoC to +another. In order to accomodate those differences, you have the option +to specify one more vendor-specific compatible, among: + +- "amlogic,meson-gxm-mali" + Required properties: + - resets : Should contain phandles of : + + GPU reset line + + GPU APB glue reset line Example for a Mali-T760: From 11f8e119ed22c750ac5ac0b195b5ecd17868e0e9 Mon Sep 17 00:00:00 2001 From: Christian Hewitt Date: Fri, 15 Mar 2019 14:56:55 +0100 Subject: [PATCH 12/26] arm64: dts: meson-gxm: Add Mali-T820 node The Amlogic Meson GXM SoC embeds an ARM Mali T820 GPU. This patch adds the node with all the needed properties to power on the GPU. This has been tested with the work-in-progress PanFrost project aiming support for ARM Mali Midgard and later GPUs. Signed-off-by: Christian Hewitt Signed-off-by: Neil Armstrong Signed-off-by: Kevin Hilman --- arch/arm64/boot/dts/amlogic/meson-gxm.dtsi | 27 ++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi index ed3a3d5adf31..7a85a82bf65d 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi @@ -91,6 +91,33 @@ reset-names = "phy"; status = "okay"; }; + + mali: gpu@c0000 { + compatible = "amlogic,meson-gxm-mali", "arm,mali-t820"; + reg = <0x0 0xc0000 0x0 0x40000>; + interrupt-parent = <&gic>; + interrupts = , + , + ; + interrupt-names = "gpu", "mmu", "job"; + clocks = <&clkc CLKID_MALI>; + resets = <&reset RESET_MALI_CAPB3>, <&reset RESET_MALI>; + + /* + * Mali clocking is provided by two identical clock paths + * MALI_0 and MALI_1 muxed to a single clock by a glitch + * free mux to safely change frequency while running. + */ + assigned-clocks = <&clkc CLKID_MALI_0_SEL>, + <&clkc CLKID_MALI_0>, + <&clkc CLKID_MALI>; /* Glitch free mux */ + assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>, + <0>, /* Do Nothing */ + <&clkc CLKID_MALI_0>; + assigned-clock-rates = <0>, /* Do Nothing */ + <666666666>, + <0>; /* Do Nothing */ + }; }; &clkc_AO { From 55d76e83a39d2cba7ed686327498efb386b7e8f7 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Wed, 13 Mar 2019 15:10:30 +0100 Subject: [PATCH 13/26] dt-bindings: power: amlogic, meson-gx-pwrc: Add G12A compatible The Amlogic G12A has a slighly different Power Control, but uses the same address space and sysctrl registers. Signed-off-by: Neil Armstrong Reviewed-by: Rob Herring Signed-off-by: Kevin Hilman --- .../devicetree/bindings/power/amlogic,meson-gx-pwrc.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-gx-pwrc.txt b/Documentation/devicetree/bindings/power/amlogic,meson-gx-pwrc.txt index 1cd050b4054c..0fdc3dd1125e 100644 --- a/Documentation/devicetree/bindings/power/amlogic,meson-gx-pwrc.txt +++ b/Documentation/devicetree/bindings/power/amlogic,meson-gx-pwrc.txt @@ -16,7 +16,9 @@ Device Tree Bindings: --------------------- Required properties: -- compatible: should be "amlogic,meson-gx-pwrc-vpu" for the Meson GX SoCs +- compatible: should be one of the following : + - "amlogic,meson-gx-pwrc-vpu" for the Meson GX SoCs + - "amlogic,meson-g12a-pwrc-vpu" for the Meson G12A SoCs - #power-domain-cells: should be 0 - amlogic,hhi-sysctrl: phandle to the HHI sysctrl node - resets: phandles to the reset lines needed for this power demain sequence From 820873cf38daaf965b37018028c5cc7015735745 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Mon, 25 Mar 2019 11:03:37 +0100 Subject: [PATCH 14/26] arm64: dts: meson: g12a: Add SAR ADC node This patch adds the SAR ADC controller node. Signed-off-by: Neil Armstrong Reviewed-by: Martin Blumenstingl Signed-off-by: Kevin Hilman --- arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi index d6ca0bbd8f74..9c666e2a45b0 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi @@ -5,6 +5,7 @@ #include #include +#include #include #include @@ -290,6 +291,20 @@ clock-names = "xtal", "pclk", "baud"; status = "disabled"; }; + + saradc: adc@9000 { + compatible = "amlogic,meson-g12a-saradc", + "amlogic,meson-saradc"; + reg = <0x0 0x9000 0x0 0x48>; + #io-channel-cells = <1>; + interrupts = ; + clocks = <&xtal>, + <&clkc_AO CLKID_AO_SAR_ADC>, + <&clkc_AO CLKID_AO_SAR_ADC_CLK>, + <&clkc_AO CLKID_AO_SAR_ADC_SEL>; + clock-names = "clkin", "core", "adc_clk", "adc_sel"; + status = "disabled"; + }; }; gic: interrupt-controller@ffc01000 { From 9baf7d6be730cbd996eb56d6047ff1d5147cbff0 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Mon, 25 Mar 2019 11:03:38 +0100 Subject: [PATCH 15/26] arm64: dts: meson: g12a: Add G12A USB nodes This patch adds the nodes for the USB Complex found in the Amlogic G12A SoC. It includes the : - 2 USB2 PHYs - 1 USB3 + PCIE Combo PHY - the USB Glue with it's DWC2 and DWC3 sub-nodes Signed-off-by: Neil Armstrong Reviewed-by: Martin Blumenstingl Signed-off-by: Kevin Hilman --- arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 75 +++++++++++++++++++++ 1 file changed, 75 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi index 9c666e2a45b0..d4dc1a6caab5 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi @@ -3,11 +3,13 @@ * Copyright (c) 2018 Amlogic, Inc. All rights reserved. */ +#include #include #include #include #include #include +#include / { compatible = "amlogic,g12a"; @@ -183,6 +185,26 @@ }; }; + usb2_phy0: phy@36000 { + compatible = "amlogic,g12a-usb2-phy"; + reg = <0x0 0x36000 0x0 0x2000>; + clocks = <&xtal>; + clock-names = "xtal"; + resets = <&reset RESET_USB_PHY20>; + reset-names = "phy"; + #phy-cells = <0>; + }; + + usb2_phy1: phy@3a000 { + compatible = "amlogic,g12a-usb2-phy"; + reg = <0x0 0x3a000 0x0 0x2000>; + clocks = <&xtal>; + clock-names = "xtal"; + resets = <&reset RESET_USB_PHY21>; + reset-names = "phy"; + #phy-cells = <0>; + }; + hiu: bus@3c000 { compatible = "simple-bus"; reg = <0x0 0x3c000 0x0 0x1400>; @@ -203,6 +225,18 @@ }; }; }; + + usb3_pcie_phy: phy@46000 { + compatible = "amlogic,g12a-usb3-pcie-phy"; + reg = <0x0 0x46000 0x0 0x2000>; + clocks = <&clkc CLKID_PCIE_PLL>; + clock-names = "ref_clk"; + resets = <&reset RESET_PCIE_PHY>; + reset-names = "phy"; + assigned-clocks = <&clkc CLKID_PCIE_PLL>; + assigned-clock-rates = <100000000>; + #phy-cells = <1>; + }; }; aobus: bus@ff800000 { @@ -366,6 +400,47 @@ status = "disabled"; }; }; + + usb: usb@ffe09000 { + status = "disabled"; + compatible = "amlogic,meson-g12a-usb-ctrl"; + reg = <0x0 0xffe09000 0x0 0xa0>; + interrupts = ; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + clocks = <&clkc CLKID_USB>; + resets = <&reset RESET_USB>; + + dr_mode = "otg"; + + phys = <&usb2_phy0>, <&usb2_phy1>, + <&usb3_pcie_phy PHY_TYPE_USB3>; + phy-names = "usb2-phy0", "usb2-phy1", "usb3-phy0"; + + dwc2: usb@ff400000 { + compatible = "amlogic,meson-g12a-usb", "snps,dwc2"; + reg = <0x0 0xff400000 0x0 0x40000>; + interrupts = ; + clocks = <&clkc CLKID_USB1_DDR_BRIDGE>; + clock-names = "ddr"; + phys = <&usb2_phy1>; + dr_mode = "peripheral"; + g-rx-fifo-size = <192>; + g-np-tx-fifo-size = <128>; + g-tx-fifo-size = <128 128 16 16 16>; + }; + + dwc3: usb@ff500000 { + compatible = "snps,dwc3"; + reg = <0x0 0xff500000 0x0 0x100000>; + interrupts = ; + dr_mode = "host"; + snps,dis_u2_susphy_quirk; + snps,quirk-frame-length-adjustment; + }; + }; }; timer { From 2607fd087370777fd2ae2ff7c1681fe1fb02566d Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Mon, 25 Mar 2019 11:03:39 +0100 Subject: [PATCH 16/26] arm64: dts: meson: g12a: Add mali-g31 gpu node This patch adds the ARM Mali G31 GPU node. Signed-off-by: Neil Armstrong Signed-off-by: Kevin Hilman --- arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 27 +++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi index d4dc1a6caab5..858ddd68665c 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi @@ -441,6 +441,33 @@ snps,quirk-frame-length-adjustment; }; }; + + mali: gpu@ffe40000 { + compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost"; + reg = <0x0 0xffe40000 0x0 0x40000>; + interrupt-parent = <&gic>; + interrupts = , + , + ; + interrupt-names = "gpu", "mmu", "job"; + clocks = <&clkc CLKID_MALI>; + resets = <&reset RESET_DVALIN_CAPB3>, <&reset RESET_DVALIN>; + + /* + * Mali clocking is provided by two identical clock paths + * MALI_0 and MALI_1 muxed to a single clock by a glitch + * free mux to safely change frequency while running. + */ + assigned-clocks = <&clkc CLKID_MALI_0_SEL>, + <&clkc CLKID_MALI_0>, + <&clkc CLKID_MALI>; /* Glitch free mux */ + assigned-clock-parents = <&clkc CLKID_FCLK_DIV2P5>, + <0>, /* Do Nothing */ + <&clkc CLKID_MALI_0>; + assigned-clock-rates = <0>, /* Do Nothing */ + <800000000>, + <0>; /* Do Nothing */ + }; }; timer { From aa77657b018fbd0eebfc78ee3f8b07fec4f5cda7 Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Mon, 18 Mar 2019 11:04:51 +0100 Subject: [PATCH 17/26] arm64: dts: meson-g12a-u200: add regulators Add system regulators for the S905D U200 reference design. Add some regulators. Still missing * VDD_EE (0.8V - PWM controlled) * VDD_CPU (PWM controlled) Signed-off-by: Jerome Brunet Signed-off-by: Neil Armstrong Acked-by: Martin Blumenstingl Signed-off-by: Kevin Hilman --- .../boot/dts/amlogic/meson-g12a-u200.dts | 79 +++++++++++++++++++ 1 file changed, 79 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts index f2afd0bf3e28..c69328d16333 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts +++ b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts @@ -6,6 +6,8 @@ /dts-v1/; #include "meson-g12a.dtsi" +#include +#include / { compatible = "amlogic,u200", "amlogic,g12a"; @@ -21,6 +23,83 @@ device_type = "memory"; reg = <0x0 0x0 0x0 0x40000000>; }; + + flash_1v8: regulator-flash_1v8 { + compatible = "regulator-fixed"; + regulator-name = "FLASH_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_3v3>; + regulator-always-on; + }; + + main_12v: regulator-main_12v { + compatible = "regulator-fixed"; + regulator-name = "12V"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-always-on; + }; + + vcc_1v8: regulator-vcc_1v8 { + compatible = "regulator-fixed"; + regulator-name = "VCC_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_3v3>; + regulator-always-on; + }; + + vcc_3v3: regulator-vcc_3v3 { + compatible = "regulator-fixed"; + regulator-name = "VCC_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vddao_3v3>; + regulator-always-on; + /* FIXME: actually controlled by VDDCPU_B_EN */ + }; + + vcc_5v: regulator-vcc_5v { + compatible = "regulator-fixed"; + regulator-name = "VCC_5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&main_12v>; + + gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>; + enable-active-high; + }; + + usb_pwr_en: regulator-usb_pwr_en { + compatible = "regulator-fixed"; + regulator-name = "USB_PWR_EN"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc_5v>; + + gpio = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vddao_1v8: regulator-vddao_1v8 { + compatible = "regulator-fixed"; + regulator-name = "VDDAO_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vddao_3v3>; + regulator-always-on; + }; + + vddao_3v3: regulator-vddao_3v3 { + compatible = "regulator-fixed"; + regulator-name = "VDDAO_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&main_12v>; + regulator-always-on; + }; + }; &uart_AO { From d1c023af198835833203f64160d3aefe1fbb45e8 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Mon, 25 Mar 2019 11:14:50 +0100 Subject: [PATCH 18/26] arm64: dts: meson-g12a-sei510: Add ADC Key and BT support Add support for the : - ADC Touch key - Bluetooth Module on UART A Signed-off-by: Neil Armstrong Acked-by: Martin Blumenstingl Signed-off-by: Kevin Hilman --- .../boot/dts/amlogic/meson-g12a-sei510.dts | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts index 43d57e20294a..ebdad5a192f1 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts +++ b/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts @@ -7,6 +7,7 @@ #include "meson-g12a.dtsi" #include +#include #include / { @@ -17,6 +18,19 @@ serial0 = &uart_AO; }; + adc_keys { + compatible = "adc-keys"; + io-channels = <&saradc 0>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + + button-onoff { + label = "On/Off"; + linux,code = ; + press-threshold-microvolt = <1700000>; + }; + }; + ao_5v: regulator-ao_5v { compatible = "regulator-fixed"; regulator-name = "AO_5V"; @@ -87,7 +101,23 @@ vin-supply = <&vddao_3v3>; regulator-always-on; }; +}; +&saradc { + status = "okay"; + vref-supply = <&vddio_ao1v8>; +}; + +&uart_A { + status = "okay"; + pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; + pinctrl-names = "default"; + uart-has-rtscts; + + bluetooth { + compatible = "brcm,bcm43438-bt"; + shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; + }; }; &uart_AO { From 41cc4551f45470c6052c84615af81873122cf158 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Mon, 25 Mar 2019 11:14:51 +0100 Subject: [PATCH 19/26] arm64: dts: meson-g12a-sei510: Enable USB Enable the USB2 and USB3 Host ports on the SEI520 Set-Top-Box. Signed-off-by: Neil Armstrong Reviewed-by: Martin Blumenstingl Signed-off-by: Kevin Hilman --- arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts index ebdad5a192f1..c350a0165d44 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts +++ b/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts @@ -125,3 +125,8 @@ pinctrl-0 = <&uart_ao_a_pins>; pinctrl-names = "default"; }; + +&usb { + status = "okay"; + dr_mode = "host"; +}; From 8ad7624453cf1c6788b726e51727a2c7c4f7abd3 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Mon, 25 Mar 2019 11:14:52 +0100 Subject: [PATCH 20/26] arm64: dts: meson-g12a-u200: Enable USB Enable the USB2 OTG and USB3 Host ports on the S905D2 Reference Design. Signed-off-by: Neil Armstrong Acked-by: Martin Blumenstingl Signed-off-by: Kevin Hilman --- arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts index c69328d16333..2240e365af27 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts +++ b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts @@ -108,3 +108,15 @@ pinctrl-names = "default"; }; +&usb { + status = "okay"; + vbus-supply = <&usb_pwr_en>; +}; + +&usb2_phy0 { + phy-supply = <&vcc_5v>; +}; + +&usb2_phy1 { + phy-supply = <&vcc_5v>; +}; From 45b72126022923ebdcd9f9b58af1ff47f73452fa Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Mon, 25 Mar 2019 11:14:53 +0100 Subject: [PATCH 21/26] arm64: dts: meson-g12a-x96-max: Enable USB Enable the USB2 and USB3 Host ports on the X96 Max Set-Top-Box. Signed-off-by: Neil Armstrong Reviewed-by: Martin Blumenstingl Signed-off-by: Kevin Hilman --- arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts index 0a6919523ba9..b5b88262c06a 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts +++ b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts @@ -107,3 +107,8 @@ pinctrl-0 = <&uart_ao_a_pins>; pinctrl-names = "default"; }; + +&usb { + status = "okay"; + dr_mode = "host"; +}; From 083feecd854833dcee8f1e98d7197195f5fd3649 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Mon, 8 Apr 2019 11:31:35 +0200 Subject: [PATCH 22/26] arm64: dts: meson-g12a: Add VPU and HDMI related nodes Add VPU and HDMI display support. Signed-off-by: Neil Armstrong Signed-off-by: Kevin Hilman --- arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 131 ++++++++++++++++++++ 1 file changed, 131 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi index 858ddd68665c..a696612f8f44 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi @@ -109,6 +109,37 @@ #size-cells = <2>; ranges = <0x0 0x0 0x0 0xff600000 0x0 0x200000>; + hdmi_tx: hdmi-tx@0 { + compatible = "amlogic,meson-g12a-dw-hdmi"; + reg = <0x0 0x0 0x0 0x10000>; + interrupts = ; + resets = <&reset RESET_HDMITX_CAPB3>, + <&reset RESET_HDMITX_PHY>, + <&reset RESET_HDMITX>; + reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy"; + clocks = <&clkc CLKID_HDMI>, + <&clkc CLKID_HTX_PCLK>, + <&clkc CLKID_VPU_INTR>; + clock-names = "isfr", "iahb", "venci"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + /* VPU VENC Input */ + hdmi_tx_venc_port: port@0 { + reg = <0>; + + hdmi_tx_in: endpoint { + remote-endpoint = <&hdmi_tx_out>; + }; + }; + + /* TMDS Output */ + hdmi_tx_tmds_port: port@1 { + reg = <1>; + }; + }; + periphs: bus@34400 { compatible = "simple-bus"; reg = <0x0 0x34400 0x0 0x400>; @@ -138,6 +169,23 @@ gpio-ranges = <&periphs_pinctrl 0 0 86>; }; + hdmitx_ddc_pins: hdmitx_ddc { + mux { + groups = "hdmitx_sda", + "hdmitx_sck"; + function = "hdmitx"; + bias-disable; + }; + }; + + hdmitx_hpd_pins: hdmitx_hpd { + mux { + groups = "hdmitx_hpd_in"; + function = "hdmitx"; + bias-disable; + }; + }; + uart_a_pins: uart-a { mux { groups = "uart_a_tx", @@ -195,6 +243,19 @@ #phy-cells = <0>; }; + dmc: bus@38000 { + compatible = "simple-bus"; + reg = <0x0 0x38000 0x0 0x400>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0x38000 0x0 0x400>; + + canvas: video-lut@48 { + compatible = "amlogic,canvas"; + reg = <0x0 0x48 0x0 0x14>; + }; + }; + usb2_phy1: phy@3a000 { compatible = "amlogic,g12a-usb2-phy"; reg = <0x0 0x3a000 0x0 0x2000>; @@ -262,6 +323,50 @@ clock-names = "xtal", "mpeg-clk"; }; + pwrc_vpu: power-controller-vpu { + compatible = "amlogic,meson-g12a-pwrc-vpu"; + #power-domain-cells = <0>; + amlogic,hhi-sysctrl = <&hhi>; + resets = <&reset RESET_VIU>, + <&reset RESET_VENC>, + <&reset RESET_VCBUS>, + <&reset RESET_BT656>, + <&reset RESET_RDMA>, + <&reset RESET_VENCI>, + <&reset RESET_VENCP>, + <&reset RESET_VDAC>, + <&reset RESET_VDI6>, + <&reset RESET_VENCL>, + <&reset RESET_VID_LOCK>; + clocks = <&clkc CLKID_VPU>, + <&clkc CLKID_VAPB>; + clock-names = "vpu", "vapb"; + /* + * VPU clocking is provided by two identical clock paths + * VPU_0 and VPU_1 muxed to a single clock by a glitch + * free mux to safely change frequency while running. + * Same for VAPB but with a final gate after the glitch free mux. + */ + assigned-clocks = <&clkc CLKID_VPU_0_SEL>, + <&clkc CLKID_VPU_0>, + <&clkc CLKID_VPU>, /* Glitch free mux */ + <&clkc CLKID_VAPB_0_SEL>, + <&clkc CLKID_VAPB_0>, + <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */ + assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>, + <0>, /* Do Nothing */ + <&clkc CLKID_VPU_0>, + <&clkc CLKID_FCLK_DIV4>, + <0>, /* Do Nothing */ + <&clkc CLKID_VAPB_0>; + assigned-clock-rates = <0>, /* Do Nothing */ + <666666666>, + <0>, /* Do Nothing */ + <0>, /* Do Nothing */ + <250000000>, + <0>; /* Do Nothing */ + }; + ao_pinctrl: pinctrl@14 { compatible = "amlogic,meson-g12a-aobus-pinctrl"; #address-cells = <2>; @@ -341,6 +446,32 @@ }; }; + vpu: vpu@ff900000 { + compatible = "amlogic,meson-g12a-vpu"; + reg = <0x0 0xff900000 0x0 0x100000>, + <0x0 0xff63c000 0x0 0x1000>; + reg-names = "vpu", "hhi"; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + amlogic,canvas = <&canvas>; + power-domains = <&pwrc_vpu>; + + /* CVBS VDAC output port */ + cvbs_vdac_port: port@0 { + reg = <0>; + }; + + /* HDMI-TX output port */ + hdmi_tx_port: port@1 { + reg = <1>; + + hdmi_tx_out: endpoint { + remote-endpoint = <&hdmi_tx_in>; + }; + }; + }; + gic: interrupt-controller@ffc01000 { compatible = "arm,gic-400"; reg = <0x0 0xffc01000 0 0x1000>, From 91516e5419cf91947213b4d9c62b4728701063e9 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Mon, 8 Apr 2019 11:31:36 +0200 Subject: [PATCH 23/26] arm64: dts: meson-g12a: Add AO-CEC nodes Amlogic G12A embeds 2 CEC controllers : - AO-CEC-A the same controller as in GXBB, GXL & GXM SoCs - AO-CEC-B is a new controller Note, the two controller can work simultanously since 2 Pads can handle CEC, thus this SoC can handle 2 distinct CEC busses. This patch adds the nodes for the AO-CEC-A and AO-CEC-B controllers. Signed-off-by: Neil Armstrong Signed-off-by: Kevin Hilman --- arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 34 +++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi index a696612f8f44..9f72396ba710 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi @@ -169,6 +169,22 @@ gpio-ranges = <&periphs_pinctrl 0 0 86>; }; + cec_ao_a_h_pins: cec_ao_a_h { + mux { + groups = "cec_ao_a_h"; + function = "cec_ao_a_h"; + bias-disable; + }; + }; + + cec_ao_b_h_pins: cec_ao_b_h { + mux { + groups = "cec_ao_b_h"; + function = "cec_ao_b_h"; + bias-disable; + }; + }; + hdmitx_ddc_pins: hdmitx_ddc { mux { groups = "hdmitx_sda", @@ -405,12 +421,30 @@ }; }; + cec_AO: cec@100 { + compatible = "amlogic,meson-gx-ao-cec"; + reg = <0x0 0x00100 0x0 0x14>; + interrupts = ; + clocks = <&clkc_AO CLKID_AO_CEC>; + clock-names = "core"; + status = "disabled"; + }; + sec_AO: ao-secure@140 { compatible = "amlogic,meson-gx-ao-secure", "syscon"; reg = <0x0 0x140 0x0 0x140>; amlogic,has-chip-id; }; + cecb_AO: cec@280 { + compatible = "amlogic,meson-g12a-ao-cec"; + reg = <0x0 0x00280 0x0 0x1c>; + interrupts = ; + clocks = <&clkc_AO CLKID_AO_CTS_OSCIN>; + clock-names = "oscin"; + status = "disabled"; + }; + uart_AO: serial@3000 { compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; From b0be96160a55701af4748bcebbe0cd5fb7aec697 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Mon, 8 Apr 2019 11:31:37 +0200 Subject: [PATCH 24/26] arm64: dts: meson-g12a-x96-max: Add support for Video Display This patch adds the HDMI, CVBS and CEC attributes and nodes to support full display on the X96 Max STB. AO-CEC-B is used by default and AO-CEC-A is disabled. Signed-off-by: Neil Armstrong Signed-off-by: Kevin Hilman --- .../boot/dts/amlogic/meson-g12a-x96-max.dts | 54 +++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts index b5b88262c06a..b3d913f28f12 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts +++ b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts @@ -24,6 +24,27 @@ reg = <0x0 0x0 0x0 0x40000000>; }; + cvbs-connector { + compatible = "composite-video-connector"; + + port { + cvbs_connector_in: endpoint { + remote-endpoint = <&cvbs_vdac_out>; + }; + }; + }; + + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi_tx_tmds_out>; + }; + }; + }; + flash_1v8: regulator-flash_1v8 { compatible = "regulator-fixed"; regulator-name = "FLASH_1V8"; @@ -90,6 +111,39 @@ }; }; +&cec_AO { + pinctrl-0 = <&cec_ao_a_h_pins>; + pinctrl-names = "default"; + status = "disabled"; + hdmi-phandle = <&hdmi_tx>; +}; + +&cecb_AO { + pinctrl-0 = <&cec_ao_b_h_pins>; + pinctrl-names = "default"; + status = "okay"; + hdmi-phandle = <&hdmi_tx>; +}; + +&cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; + }; +}; + +&hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; + pinctrl-names = "default"; + hdmi-supply = <&vcc_5v>; +}; + +&hdmi_tx_tmds_port { + hdmi_tx_tmds_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; +}; + &uart_A { status = "okay"; pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; From 912a3395df3a80fe789ebc406e595314ebefc45e Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Mon, 8 Apr 2019 11:31:38 +0200 Subject: [PATCH 25/26] arm64: dts: meson-g12a-sei510: Add support for Video Display This patch adds the HDMI, CVBS and CEC attributes and nodes to support full display on the SEI510 STB. AO-CEC-B is used by default and AO-CEC-A is disabled. Signed-off-by: Neil Armstrong Signed-off-by: Kevin Hilman --- .../boot/dts/amlogic/meson-g12a-sei510.dts | 53 +++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts index c350a0165d44..34b40587e5ef 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts +++ b/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts @@ -44,6 +44,16 @@ stdout-path = "serial0:115200n8"; }; + cvbs-connector { + compatible = "composite-video-connector"; + + port { + cvbs_connector_in: endpoint { + remote-endpoint = <&cvbs_vdac_out>; + }; + }; + }; + dc_in: regulator-dc_in { compatible = "regulator-fixed"; regulator-name = "DC_IN"; @@ -61,6 +71,17 @@ regulator-always-on; }; + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi_tx_tmds_out>; + }; + }; + }; + memory@0 { device_type = "memory"; reg = <0x0 0x0 0x0 0x40000000>; @@ -103,6 +124,26 @@ }; }; +&cec_AO { + pinctrl-0 = <&cec_ao_a_h_pins>; + pinctrl-names = "default"; + status = "disabled"; + hdmi-phandle = <&hdmi_tx>; +}; + +&cecb_AO { + pinctrl-0 = <&cec_ao_b_h_pins>; + pinctrl-names = "default"; + status = "okay"; + hdmi-phandle = <&hdmi_tx>; +}; + +&cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; + }; +}; + &saradc { status = "okay"; vref-supply = <&vddio_ao1v8>; @@ -120,6 +161,18 @@ }; }; +&hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; + pinctrl-names = "default"; +}; + +&hdmi_tx_tmds_port { + hdmi_tx_tmds_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; +}; + &uart_AO { status = "okay"; pinctrl-0 = <&uart_ao_a_pins>; From 659f2563d323b09ca12b0e70bb6a50c1b25af3ee Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Mon, 8 Apr 2019 11:31:39 +0200 Subject: [PATCH 26/26] arm64: dts: meson-g12a-u200: Add support for Video Display This patch adds the HDMI, CVBS and CEC attributes and nodes to support full display on the U200 Reference Design. AO-CEC-B is used by default and AO-CEC-A is disabled. Signed-off-by: Neil Armstrong Signed-off-by: Kevin Hilman --- .../boot/dts/amlogic/meson-g12a-u200.dts | 54 +++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts index 2240e365af27..0e8045b8a915 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts +++ b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts @@ -24,6 +24,16 @@ reg = <0x0 0x0 0x0 0x40000000>; }; + cvbs-connector { + compatible = "composite-video-connector"; + + port { + cvbs_connector_in: endpoint { + remote-endpoint = <&cvbs_vdac_out>; + }; + }; + }; + flash_1v8: regulator-flash_1v8 { compatible = "regulator-fixed"; regulator-name = "FLASH_1V8"; @@ -33,6 +43,17 @@ regulator-always-on; }; + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi_tx_tmds_out>; + }; + }; + }; + main_12v: regulator-main_12v { compatible = "regulator-fixed"; regulator-name = "12V"; @@ -102,6 +123,39 @@ }; +&cec_AO { + pinctrl-0 = <&cec_ao_a_h_pins>; + pinctrl-names = "default"; + status = "disabled"; + hdmi-phandle = <&hdmi_tx>; +}; + +&cecb_AO { + pinctrl-0 = <&cec_ao_b_h_pins>; + pinctrl-names = "default"; + status = "okay"; + hdmi-phandle = <&hdmi_tx>; +}; + +&cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; + }; +}; + +&hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; + pinctrl-names = "default"; + hdmi-supply = <&vcc_5v>; +}; + +&hdmi_tx_tmds_port { + hdmi_tx_tmds_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; +}; + &uart_AO { status = "okay"; pinctrl-0 = <&uart_ao_a_pins>;