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mmc: sdhci-msm: Update DDR_CONFIG as per device tree file

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Certain platforms require different settings in the
SDCC_HC_REG_DDR_CONFIG register. This setting can change from platform
to platform. So the driver should check whether a particular platform
require a different setting by reading the device tree file and use it.

Signed-off-by: Bao D. Nguyen <nguyenb@codeaurora.org>
Signed-off-by: Sarthak Garg <sartgarg@codeaurora.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/1590139950-7288-6-git-send-email-sartgarg@codeaurora.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
Sarthak Garg
2020-05-22 15:02:27 +05:30
committed by Ulf Hansson
parent 04816e672d
commit 1dfbe3ff81
1 changed files with 16 additions and 1 deletions
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17
drivers/mmc/host/sdhci-msm.c
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@@ -275,6 +275,7 @@ struct sdhci_msm_host {
u32 transfer_mode; u32 transfer_mode;
bool updated_ddr_cfg; bool updated_ddr_cfg;
bool uses_tassadar_dll; bool uses_tassadar_dll;
u32 ddr_config;
}; };
static const struct sdhci_msm_offset *sdhci_priv_msm_offset(struct sdhci_host *host) static const struct sdhci_msm_offset *sdhci_priv_msm_offset(struct sdhci_host *host)
@@ -987,7 +988,7 @@ static int sdhci_msm_cm_dll_sdc4_calibration(struct sdhci_host *host)
ddr_cfg_offset = msm_offset->core_ddr_config; ddr_cfg_offset = msm_offset->core_ddr_config;
else else
ddr_cfg_offset = msm_offset->core_ddr_config_old; ddr_cfg_offset = msm_offset->core_ddr_config_old;
writel_relaxed(DDR_CONFIG_POR_VAL, host->ioaddr + ddr_cfg_offset); writel_relaxed(msm_host->ddr_config, host->ioaddr + ddr_cfg_offset);
if (mmc->ios.enhanced_strobe) { if (mmc->ios.enhanced_strobe) {
config = readl_relaxed(host->ioaddr + config = readl_relaxed(host->ioaddr +
@@ -1933,6 +1934,19 @@ static const struct sdhci_pltfm_data sdhci_msm_pdata = {
.ops = &sdhci_msm_ops, .ops = &sdhci_msm_ops,
}; };
static inline void sdhci_msm_get_of_property(struct platform_device *pdev,
struct sdhci_host *host)
{
struct device_node *node = pdev->dev.of_node;
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);
if (of_property_read_u32(node, "qcom,ddr-config",
&msm_host->ddr_config))
msm_host->ddr_config = DDR_CONFIG_POR_VAL;
}
static int sdhci_msm_probe(struct platform_device *pdev) static int sdhci_msm_probe(struct platform_device *pdev)
{ {
struct sdhci_host *host; struct sdhci_host *host;
@@ -1976,6 +1990,7 @@ static int sdhci_msm_probe(struct platform_device *pdev)
msm_offset = msm_host->offset; msm_offset = msm_host->offset;
sdhci_get_of_property(pdev); sdhci_get_of_property(pdev);
sdhci_msm_get_of_property(pdev, host);
msm_host->saved_tuning_phase = INVALID_TUNING_PHASE; msm_host->saved_tuning_phase = INVALID_TUNING_PHASE;