forked from Minki/linux
net: dsa: b53: Implement ARL add/del/dump operations
Adds support for FDB add/delete/dump using the ARL read/write logic and the ARL search logic for faster dumps. The code is made flexible enough it could support devices with a different register layout like BCM5325 and BCM5365 which have fewer number of entries or pack values into a single 64 bits register. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Florian Fainelli
David S. Miller
parent
0830c9802e
commit
1da6df85c6
@ -26,7 +26,9 @@
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#include <linux/module.h>
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#include <linux/platform_data/b53.h>
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#include <linux/phy.h>
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#include <linux/etherdevice.h>
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#include <net/dsa.h>
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#include <net/switchdev.h>
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#include "b53_regs.h"
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#include "b53_priv.h"
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@ -777,6 +779,246 @@ static void b53_adjust_link(struct dsa_switch *ds, int port,
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}
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}
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/* Address Resolution Logic routines */
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static int b53_arl_op_wait(struct b53_device *dev)
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{
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unsigned int timeout = 10;
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u8 reg;
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do {
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b53_read8(dev, B53_ARLIO_PAGE, B53_ARLTBL_RW_CTRL, ®);
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if (!(reg & ARLTBL_START_DONE))
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return 0;
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usleep_range(1000, 2000);
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} while (timeout--);
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dev_warn(dev->dev, "timeout waiting for ARL to finish: 0x%02x\n", reg);
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return -ETIMEDOUT;
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}
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static int b53_arl_rw_op(struct b53_device *dev, unsigned int op)
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{
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u8 reg;
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if (op > ARLTBL_RW)
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return -EINVAL;
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b53_read8(dev, B53_ARLIO_PAGE, B53_ARLTBL_RW_CTRL, ®);
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reg |= ARLTBL_START_DONE;
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if (op)
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reg |= ARLTBL_RW;
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else
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reg &= ~ARLTBL_RW;
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b53_write8(dev, B53_ARLIO_PAGE, B53_ARLTBL_RW_CTRL, reg);
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return b53_arl_op_wait(dev);
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}
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static int b53_arl_read(struct b53_device *dev, u64 mac,
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u16 vid, struct b53_arl_entry *ent, u8 *idx,
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bool is_valid)
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{
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unsigned int i;
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int ret;
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ret = b53_arl_op_wait(dev);
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if (ret)
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return ret;
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/* Read the bins */
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for (i = 0; i < dev->num_arl_entries; i++) {
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u64 mac_vid;
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u32 fwd_entry;
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b53_read64(dev, B53_ARLIO_PAGE,
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B53_ARLTBL_MAC_VID_ENTRY(i), &mac_vid);
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b53_read32(dev, B53_ARLIO_PAGE,
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B53_ARLTBL_DATA_ENTRY(i), &fwd_entry);
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b53_arl_to_entry(ent, mac_vid, fwd_entry);
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if (!(fwd_entry & ARLTBL_VALID))
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continue;
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if ((mac_vid & ARLTBL_MAC_MASK) != mac)
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continue;
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*idx = i;
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}
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return -ENOENT;
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}
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static int b53_arl_op(struct b53_device *dev, int op, int port,
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const unsigned char *addr, u16 vid, bool is_valid)
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{
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struct b53_arl_entry ent;
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u32 fwd_entry;
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u64 mac, mac_vid = 0;
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u8 idx = 0;
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int ret;
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/* Convert the array into a 64-bit MAC */
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mac = b53_mac_to_u64(addr);
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/* Perform a read for the given MAC and VID */
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b53_write48(dev, B53_ARLIO_PAGE, B53_MAC_ADDR_IDX, mac);
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b53_write16(dev, B53_ARLIO_PAGE, B53_VLAN_ID_IDX, vid);
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/* Issue a read operation for this MAC */
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ret = b53_arl_rw_op(dev, 1);
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if (ret)
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return ret;
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ret = b53_arl_read(dev, mac, vid, &ent, &idx, is_valid);
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/* If this is a read, just finish now */
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if (op)
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return ret;
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/* We could not find a matching MAC, so reset to a new entry */
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if (ret) {
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fwd_entry = 0;
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idx = 1;
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}
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memset(&ent, 0, sizeof(ent));
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ent.port = port;
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ent.is_valid = is_valid;
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ent.vid = vid;
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ent.is_static = true;
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memcpy(ent.mac, addr, ETH_ALEN);
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b53_arl_from_entry(&mac_vid, &fwd_entry, &ent);
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b53_write64(dev, B53_ARLIO_PAGE,
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B53_ARLTBL_MAC_VID_ENTRY(idx), mac_vid);
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b53_write32(dev, B53_ARLIO_PAGE,
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B53_ARLTBL_DATA_ENTRY(idx), fwd_entry);
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return b53_arl_rw_op(dev, 0);
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}
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static int b53_fdb_prepare(struct dsa_switch *ds, int port,
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const struct switchdev_obj_port_fdb *fdb,
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struct switchdev_trans *trans)
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{
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struct b53_device *priv = ds_to_priv(ds);
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/* 5325 and 5365 require some more massaging, but could
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* be supported eventually
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*/
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if (is5325(priv) || is5365(priv))
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return -EOPNOTSUPP;
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return 0;
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}
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static void b53_fdb_add(struct dsa_switch *ds, int port,
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const struct switchdev_obj_port_fdb *fdb,
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struct switchdev_trans *trans)
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{
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struct b53_device *priv = ds_to_priv(ds);
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if (b53_arl_op(priv, 0, port, fdb->addr, fdb->vid, true))
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pr_err("%s: failed to add MAC address\n", __func__);
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}
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static int b53_fdb_del(struct dsa_switch *ds, int port,
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const struct switchdev_obj_port_fdb *fdb)
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{
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struct b53_device *priv = ds_to_priv(ds);
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return b53_arl_op(priv, 0, port, fdb->addr, fdb->vid, false);
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}
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static int b53_arl_search_wait(struct b53_device *dev)
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{
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unsigned int timeout = 1000;
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u8 reg;
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do {
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b53_read8(dev, B53_ARLIO_PAGE, B53_ARL_SRCH_CTL, ®);
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if (!(reg & ARL_SRCH_STDN))
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return 0;
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if (reg & ARL_SRCH_VLID)
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return 0;
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usleep_range(1000, 2000);
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} while (timeout--);
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return -ETIMEDOUT;
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}
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static void b53_arl_search_rd(struct b53_device *dev, u8 idx,
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struct b53_arl_entry *ent)
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{
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u64 mac_vid;
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u32 fwd_entry;
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b53_read64(dev, B53_ARLIO_PAGE,
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B53_ARL_SRCH_RSTL_MACVID(idx), &mac_vid);
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b53_read32(dev, B53_ARLIO_PAGE,
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B53_ARL_SRCH_RSTL(idx), &fwd_entry);
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b53_arl_to_entry(ent, mac_vid, fwd_entry);
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}
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static int b53_fdb_copy(struct net_device *dev, int port,
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const struct b53_arl_entry *ent,
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struct switchdev_obj_port_fdb *fdb,
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int (*cb)(struct switchdev_obj *obj))
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{
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if (!ent->is_valid)
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return 0;
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if (port != ent->port)
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return 0;
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ether_addr_copy(fdb->addr, ent->mac);
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fdb->vid = ent->vid;
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fdb->ndm_state = ent->is_static ? NUD_NOARP : NUD_REACHABLE;
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return cb(&fdb->obj);
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}
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static int b53_fdb_dump(struct dsa_switch *ds, int port,
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struct switchdev_obj_port_fdb *fdb,
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int (*cb)(struct switchdev_obj *obj))
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{
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struct b53_device *priv = ds_to_priv(ds);
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struct net_device *dev = ds->ports[port].netdev;
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struct b53_arl_entry results[2];
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unsigned int count = 0;
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int ret;
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u8 reg;
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/* Start search operation */
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reg = ARL_SRCH_STDN;
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b53_write8(priv, B53_ARLIO_PAGE, B53_ARL_SRCH_CTL, reg);
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do {
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ret = b53_arl_search_wait(priv);
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if (ret)
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return ret;
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b53_arl_search_rd(priv, 0, &results[0]);
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ret = b53_fdb_copy(dev, port, &results[0], fdb, cb);
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if (ret)
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return ret;
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if (priv->num_arl_entries > 2) {
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b53_arl_search_rd(priv, 1, &results[1]);
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ret = b53_fdb_copy(dev, port, &results[1], fdb, cb);
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if (ret)
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return ret;
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if (!results[0].is_valid && !results[1].is_valid)
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break;
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}
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} while (count++ < 1024);
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return 0;
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}
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static struct dsa_switch_driver b53_switch_ops = {
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.tag_protocol = DSA_TAG_PROTO_NONE,
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.setup = b53_setup,
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@ -789,6 +1031,10 @@ static struct dsa_switch_driver b53_switch_ops = {
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.adjust_link = b53_adjust_link,
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.port_enable = b53_enable_port,
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.port_disable = b53_disable_port,
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.port_fdb_prepare = b53_fdb_prepare,
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.port_fdb_dump = b53_fdb_dump,
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.port_fdb_add = b53_fdb_add,
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.port_fdb_del = b53_fdb_del,
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};
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struct b53_chip_data {
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@ -798,6 +1044,7 @@ struct b53_chip_data {
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u16 enabled_ports;
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u8 cpu_port;
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u8 vta_regs[3];
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u8 arl_entries;
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u8 duplex_reg;
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u8 jumbo_pm_reg;
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u8 jumbo_size_reg;
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@ -816,6 +1063,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
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.dev_name = "BCM5325",
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.vlans = 16,
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.enabled_ports = 0x1f,
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.arl_entries = 2,
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.cpu_port = B53_CPU_PORT_25,
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.duplex_reg = B53_DUPLEX_STAT_FE,
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},
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@ -824,6 +1072,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
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.dev_name = "BCM5365",
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.vlans = 256,
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.enabled_ports = 0x1f,
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.arl_entries = 2,
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.cpu_port = B53_CPU_PORT_25,
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.duplex_reg = B53_DUPLEX_STAT_FE,
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},
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@ -832,6 +1081,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
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.dev_name = "BCM5395",
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.vlans = 4096,
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.enabled_ports = 0x1f,
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.arl_entries = 4,
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.cpu_port = B53_CPU_PORT,
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.vta_regs = B53_VTA_REGS,
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.duplex_reg = B53_DUPLEX_STAT_GE,
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@ -843,6 +1093,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
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.dev_name = "BCM5397",
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.vlans = 4096,
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.enabled_ports = 0x1f,
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.arl_entries = 4,
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.cpu_port = B53_CPU_PORT,
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.vta_regs = B53_VTA_REGS_9798,
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.duplex_reg = B53_DUPLEX_STAT_GE,
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@ -854,6 +1105,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
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.dev_name = "BCM5398",
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.vlans = 4096,
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.enabled_ports = 0x7f,
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.arl_entries = 4,
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.cpu_port = B53_CPU_PORT,
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.vta_regs = B53_VTA_REGS_9798,
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.duplex_reg = B53_DUPLEX_STAT_GE,
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@ -865,6 +1117,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
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.dev_name = "BCM53115",
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.vlans = 4096,
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.enabled_ports = 0x1f,
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.arl_entries = 4,
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.vta_regs = B53_VTA_REGS,
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.cpu_port = B53_CPU_PORT,
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.duplex_reg = B53_DUPLEX_STAT_GE,
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@ -887,6 +1140,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
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.dev_name = "BCM53128",
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.vlans = 4096,
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.enabled_ports = 0x1ff,
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.arl_entries = 4,
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.cpu_port = B53_CPU_PORT,
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.vta_regs = B53_VTA_REGS,
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.duplex_reg = B53_DUPLEX_STAT_GE,
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@ -898,6 +1152,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
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.dev_name = "BCM63xx",
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.vlans = 4096,
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.enabled_ports = 0, /* pdata must provide them */
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.arl_entries = 4,
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.cpu_port = B53_CPU_PORT,
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.vta_regs = B53_VTA_REGS_63XX,
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.duplex_reg = B53_DUPLEX_STAT_63XX,
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@ -909,6 +1164,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
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.dev_name = "BCM53010",
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.vlans = 4096,
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.enabled_ports = 0x1f,
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.arl_entries = 4,
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.cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */
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.vta_regs = B53_VTA_REGS,
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.duplex_reg = B53_DUPLEX_STAT_GE,
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@ -920,6 +1176,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
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.dev_name = "BCM53011",
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.vlans = 4096,
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.enabled_ports = 0x1bf,
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.arl_entries = 4,
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.cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */
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.vta_regs = B53_VTA_REGS,
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.duplex_reg = B53_DUPLEX_STAT_GE,
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@ -931,6 +1188,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
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.dev_name = "BCM53012",
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.vlans = 4096,
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.enabled_ports = 0x1bf,
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.arl_entries = 4,
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.cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */
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.vta_regs = B53_VTA_REGS,
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.duplex_reg = B53_DUPLEX_STAT_GE,
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@ -942,6 +1200,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
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.dev_name = "BCM53018",
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.vlans = 4096,
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.enabled_ports = 0x1f,
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.arl_entries = 4,
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.cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */
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.vta_regs = B53_VTA_REGS,
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.duplex_reg = B53_DUPLEX_STAT_GE,
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@ -953,6 +1212,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
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.dev_name = "BCM53019",
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.vlans = 4096,
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.enabled_ports = 0x1f,
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.arl_entries = 4,
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.cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */
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.vta_regs = B53_VTA_REGS,
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.duplex_reg = B53_DUPLEX_STAT_GE,
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@ -982,6 +1242,7 @@ static int b53_switch_init(struct b53_device *dev)
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ds->drv = &b53_switch_ops;
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dev->cpu_port = chip->cpu_port;
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dev->num_vlans = chip->vlans;
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dev->num_arl_entries = chip->arl_entries;
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break;
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}
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}
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@ -24,6 +24,8 @@
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#include <linux/phy.h>
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#include <net/dsa.h>
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#include "b53_regs.h"
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struct b53_device;
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struct b53_io_ops {
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@ -81,6 +83,7 @@ struct b53_device {
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u8 jumbo_pm_reg;
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u8 jumbo_size_reg;
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int reset_gpio;
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u8 num_arl_entries;
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/* used ports mask */
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u16 enabled_ports;
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@ -296,6 +299,60 @@ static inline int b53_write64(struct b53_device *dev, u8 page, u8 reg,
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return ret;
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}
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struct b53_arl_entry {
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u8 port;
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u8 mac[ETH_ALEN];
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u16 vid;
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u8 is_valid:1;
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u8 is_age:1;
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u8 is_static:1;
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};
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static inline void b53_mac_from_u64(u64 src, u8 *dst)
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{
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unsigned int i;
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for (i = 0; i < ETH_ALEN; i++)
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dst[ETH_ALEN - 1 - i] = (src >> (8 * i)) & 0xff;
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}
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static inline u64 b53_mac_to_u64(const u8 *src)
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{
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unsigned int i;
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u64 dst = 0;
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for (i = 0; i < ETH_ALEN; i++)
|
||||
dst |= (u64)src[ETH_ALEN - 1 - i] << (8 * i);
|
||||
|
||||
return dst;
|
||||
}
|
||||
|
||||
static inline void b53_arl_to_entry(struct b53_arl_entry *ent,
|
||||
u64 mac_vid, u32 fwd_entry)
|
||||
{
|
||||
memset(ent, 0, sizeof(*ent));
|
||||
ent->port = fwd_entry & ARLTBL_DATA_PORT_ID_MASK;
|
||||
ent->is_valid = !!(fwd_entry & ARLTBL_VALID);
|
||||
ent->is_age = !!(fwd_entry & ARLTBL_AGE);
|
||||
ent->is_static = !!(fwd_entry & ARLTBL_STATIC);
|
||||
b53_mac_from_u64(mac_vid, ent->mac);
|
||||
ent->vid = mac_vid >> ARLTBL_VID_S;
|
||||
}
|
||||
|
||||
static inline void b53_arl_from_entry(u64 *mac_vid, u32 *fwd_entry,
|
||||
const struct b53_arl_entry *ent)
|
||||
{
|
||||
*mac_vid = b53_mac_to_u64(ent->mac);
|
||||
*mac_vid |= (u64)(ent->vid & ARLTBL_VID_MASK) << ARLTBL_VID_S;
|
||||
*fwd_entry = ent->port & ARLTBL_DATA_PORT_ID_MASK;
|
||||
if (ent->is_valid)
|
||||
*fwd_entry |= ARLTBL_VALID;
|
||||
if (ent->is_static)
|
||||
*fwd_entry |= ARLTBL_STATIC;
|
||||
if (ent->is_age)
|
||||
*fwd_entry |= ARLTBL_AGE;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_BCM47XX
|
||||
|
||||
#include <linux/version.h>
|
||||
|
||||
@ -226,6 +226,70 @@
|
||||
#define VTE_UNTAG_S 9
|
||||
#define VTE_UNTAG (0x1ff << 9)
|
||||
|
||||
/*************************************************************************
|
||||
* ARL I/O Registers
|
||||
*************************************************************************/
|
||||
|
||||
/* ARL Table Read/Write Register (8 bit) */
|
||||
#define B53_ARLTBL_RW_CTRL 0x00
|
||||
#define ARLTBL_RW BIT(0)
|
||||
#define ARLTBL_START_DONE BIT(7)
|
||||
|
||||
/* MAC Address Index Register (48 bit) */
|
||||
#define B53_MAC_ADDR_IDX 0x02
|
||||
|
||||
/* VLAN ID Index Register (16 bit) */
|
||||
#define B53_VLAN_ID_IDX 0x08
|
||||
|
||||
/* ARL Table MAC/VID Entry N Registers (64 bit)
|
||||
*
|
||||
* BCM5325 and BCM5365 share most definitions below
|
||||
*/
|
||||
#define B53_ARLTBL_MAC_VID_ENTRY(n) (0x10 * (n))
|
||||
#define ARLTBL_MAC_MASK 0xffffffffffff
|
||||
#define ARLTBL_VID_S 48
|
||||
#define ARLTBL_VID_MASK_25 0xff
|
||||
#define ARLTBL_VID_MASK 0xfff
|
||||
#define ARLTBL_DATA_PORT_ID_S_25 48
|
||||
#define ARLTBL_DATA_PORT_ID_MASK_25 0xf
|
||||
#define ARLTBL_AGE_25 BIT(61)
|
||||
#define ARLTBL_STATIC_25 BIT(62)
|
||||
#define ARLTBL_VALID_25 BIT(63)
|
||||
|
||||
/* ARL Table Data Entry N Registers (32 bit) */
|
||||
#define B53_ARLTBL_DATA_ENTRY(n) ((0x10 * (n)) + 0x08)
|
||||
#define ARLTBL_DATA_PORT_ID_MASK 0x1ff
|
||||
#define ARLTBL_TC(tc) ((3 & tc) << 11)
|
||||
#define ARLTBL_AGE BIT(14)
|
||||
#define ARLTBL_STATIC BIT(15)
|
||||
#define ARLTBL_VALID BIT(16)
|
||||
|
||||
/* ARL Search Control Register (8 bit) */
|
||||
#define B53_ARL_SRCH_CTL 0x50
|
||||
#define B53_ARL_SRCH_CTL_25 0x20
|
||||
#define ARL_SRCH_VLID BIT(0)
|
||||
#define ARL_SRCH_STDN BIT(7)
|
||||
|
||||
/* ARL Search Address Register (16 bit) */
|
||||
#define B53_ARL_SRCH_ADDR 0x51
|
||||
#define B53_ARL_SRCH_ADDR_25 0x22
|
||||
#define B53_ARL_SRCH_ADDR_65 0x24
|
||||
#define ARL_ADDR_MASK GENMASK(14, 0)
|
||||
|
||||
/* ARL Search MAC/VID Result (64 bit) */
|
||||
#define B53_ARL_SRCH_RSTL_0_MACVID 0x60
|
||||
|
||||
/* Single register search result on 5325 */
|
||||
#define B53_ARL_SRCH_RSTL_0_MACVID_25 0x24
|
||||
/* Single register search result on 5365 */
|
||||
#define B53_ARL_SRCH_RSTL_0_MACVID_65 0x30
|
||||
|
||||
/* ARL Search Data Result (32 bit) */
|
||||
#define B53_ARL_SRCH_RSTL_0 0x68
|
||||
|
||||
#define B53_ARL_SRCH_RSTL_MACVID(x) (B53_ARL_SRCH_RSTL_0_MACVID + ((x) * 0x10))
|
||||
#define B53_ARL_SRCH_RSTL(x) (B53_ARL_SRCH_RSTL_0 + ((x) * 0x10))
|
||||
|
||||
/*************************************************************************
|
||||
* Port VLAN Registers
|
||||
*************************************************************************/
|
||||
|
||||
Loading…
Reference in New Issue
Block a user