forked from Minki/linux
drm/i915: Enable aspect/centering panel fitting for Ironlake.
v2: Hook in DP paths to keep FULLSCREEN panel fitting on eDP. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
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1d8e1c75ff
@ -19,6 +19,7 @@ i915-y := i915_drv.o i915_dma.o i915_irq.o i915_mem.o \
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intel_hdmi.o \
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intel_sdvo.o \
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intel_modes.o \
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intel_panel.o \
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intel_i2c.o \
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intel_fb.o \
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intel_tv.o \
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@ -614,6 +614,8 @@ typedef struct drm_i915_private {
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struct sdvo_device_mapping sdvo_mappings[2];
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/* indicate whether the LVDS_BORDER should be enabled or not */
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unsigned int lvds_border_bits;
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/* Panel fitter placement and size for Ironlake+ */
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u32 pch_pf_pos, pch_pf_size;
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struct drm_crtc *plane_to_crtc_mapping[2];
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struct drm_crtc *pipe_to_crtc_mapping[2];
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@ -2005,15 +2005,13 @@ static void ironlake_crtc_dpms(struct drm_crtc *crtc, int mode)
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/* Enable panel fitting for LVDS */
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if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)
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|| HAS_eDP || intel_pch_has_edp(crtc)) {
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temp = I915_READ(pf_ctl_reg);
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I915_WRITE(pf_ctl_reg, temp | PF_ENABLE | PF_FILTER_MED_3x3);
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/* currently full aspect */
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I915_WRITE(pf_win_pos, 0);
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I915_WRITE(pf_win_size,
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(dev_priv->panel_fixed_mode->hdisplay << 16) |
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(dev_priv->panel_fixed_mode->vdisplay));
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if (dev_priv->pch_pf_size) {
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temp = I915_READ(pf_ctl_reg);
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I915_WRITE(pf_ctl_reg, temp | PF_ENABLE | PF_FILTER_MED_3x3);
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I915_WRITE(pf_win_pos, dev_priv->pch_pf_pos);
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I915_WRITE(pf_win_size, dev_priv->pch_pf_size);
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} else
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I915_WRITE(pf_ctl_reg, temp & ~PF_ENABLE);
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}
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/* Enable CPU pipe */
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@ -523,21 +523,9 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
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if ((IS_eDP(intel_dp) || IS_PCH_eDP(intel_dp)) &&
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dev_priv->panel_fixed_mode) {
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struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode;
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adjusted_mode->hdisplay = fixed_mode->hdisplay;
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adjusted_mode->hsync_start = fixed_mode->hsync_start;
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adjusted_mode->hsync_end = fixed_mode->hsync_end;
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adjusted_mode->htotal = fixed_mode->htotal;
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adjusted_mode->vdisplay = fixed_mode->vdisplay;
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adjusted_mode->vsync_start = fixed_mode->vsync_start;
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adjusted_mode->vsync_end = fixed_mode->vsync_end;
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adjusted_mode->vtotal = fixed_mode->vtotal;
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adjusted_mode->clock = fixed_mode->clock;
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drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
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intel_fixed_panel_mode(dev_priv->panel_fixed_mode, adjusted_mode);
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intel_pch_panel_fitting(dev, DRM_MODE_SCALE_FULLSCREEN,
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mode, adjusted_mode);
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/*
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* the mode->clock is used to calculate the Data&Link M/N
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* of the pipe. For the eDP the fixed clock should be used.
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@ -572,8 +560,10 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
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"count %d clock %d\n",
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intel_dp->link_bw, intel_dp->lane_count,
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adjusted_mode->clock);
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return true;
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}
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return false;
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}
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@ -186,6 +186,13 @@ extern bool intel_dpd_is_edp(struct drm_device *dev);
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extern void intel_edp_link_config (struct intel_encoder *, int *, int *);
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extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
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struct drm_display_mode *adjusted_mode);
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extern void intel_pch_panel_fitting(struct drm_device *dev,
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int fitting_mode,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode);
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extern int intel_panel_fitter_pipe (struct drm_device *dev);
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extern void intel_crtc_load_lut(struct drm_crtc *crtc);
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extern void intel_encoder_prepare (struct drm_encoder *encoder);
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@ -246,26 +246,20 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
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/* If we don't have a panel mode, there is nothing we can do */
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if (dev_priv->panel_fixed_mode == NULL)
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return true;
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/*
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* We have timings from the BIOS for the panel, put them in
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* to the adjusted mode. The CRTC will be set up for this mode,
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* with the panel scaling set up to source from the H/VDisplay
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* of the original mode.
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*/
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adjusted_mode->hdisplay = dev_priv->panel_fixed_mode->hdisplay;
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adjusted_mode->hsync_start =
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dev_priv->panel_fixed_mode->hsync_start;
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adjusted_mode->hsync_end =
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dev_priv->panel_fixed_mode->hsync_end;
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adjusted_mode->htotal = dev_priv->panel_fixed_mode->htotal;
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adjusted_mode->vdisplay = dev_priv->panel_fixed_mode->vdisplay;
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adjusted_mode->vsync_start =
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dev_priv->panel_fixed_mode->vsync_start;
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adjusted_mode->vsync_end =
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dev_priv->panel_fixed_mode->vsync_end;
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adjusted_mode->vtotal = dev_priv->panel_fixed_mode->vtotal;
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adjusted_mode->clock = dev_priv->panel_fixed_mode->clock;
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drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
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intel_fixed_panel_mode(dev_priv->panel_fixed_mode, adjusted_mode);
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if (HAS_PCH_SPLIT(dev)) {
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intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
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mode, adjusted_mode);
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return true;
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}
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/* Make sure pre-965s set dither correctly */
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if (!IS_I965G(dev)) {
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@ -278,10 +272,6 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
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adjusted_mode->vdisplay == mode->vdisplay)
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goto out;
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/* full screen scale for now */
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if (HAS_PCH_SPLIT(dev))
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goto out;
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/* 965+ wants fuzzy fitting */
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if (IS_I965G(dev))
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pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
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@ -293,10 +283,8 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
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* to register description and PRM.
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* Change the value here to see the borders for debugging
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*/
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if (!HAS_PCH_SPLIT(dev)) {
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I915_WRITE(BCLRPAT_A, 0);
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I915_WRITE(BCLRPAT_B, 0);
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}
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I915_WRITE(BCLRPAT_A, 0);
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I915_WRITE(BCLRPAT_B, 0);
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switch (intel_lvds->fitting_mode) {
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case DRM_MODE_SCALE_CENTER:
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111
drivers/gpu/drm/i915/intel_panel.c
Normal file
111
drivers/gpu/drm/i915/intel_panel.c
Normal file
@ -0,0 +1,111 @@
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/*
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* Copyright © 2006-2010 Intel Corporation
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* Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Eric Anholt <eric@anholt.net>
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* Dave Airlie <airlied@linux.ie>
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* Jesse Barnes <jesse.barnes@intel.com>
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* Chris Wilson <chris@chris-wilson.co.uk>
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*/
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#include "intel_drv.h"
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void
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intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
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struct drm_display_mode *adjusted_mode)
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{
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adjusted_mode->hdisplay = fixed_mode->hdisplay;
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adjusted_mode->hsync_start = fixed_mode->hsync_start;
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adjusted_mode->hsync_end = fixed_mode->hsync_end;
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adjusted_mode->htotal = fixed_mode->htotal;
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adjusted_mode->vdisplay = fixed_mode->vdisplay;
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adjusted_mode->vsync_start = fixed_mode->vsync_start;
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adjusted_mode->vsync_end = fixed_mode->vsync_end;
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adjusted_mode->vtotal = fixed_mode->vtotal;
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adjusted_mode->clock = fixed_mode->clock;
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drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
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}
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/* adjusted_mode has been preset to be the panel's fixed mode */
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void
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intel_pch_panel_fitting(struct drm_device *dev,
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int fitting_mode,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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int x, y, width, height;
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x = y = width = height = 0;
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/* Native modes don't need fitting */
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if (adjusted_mode->hdisplay == mode->hdisplay &&
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adjusted_mode->vdisplay == mode->vdisplay)
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goto done;
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switch (fitting_mode) {
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case DRM_MODE_SCALE_CENTER:
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width = mode->hdisplay;
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height = mode->vdisplay;
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x = (adjusted_mode->hdisplay - width + 1)/2;
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y = (adjusted_mode->vdisplay - height + 1)/2;
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break;
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case DRM_MODE_SCALE_ASPECT:
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/* Scale but preserve the aspect ratio */
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{
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u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
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u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
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if (scaled_width > scaled_height) { /* pillar */
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width = scaled_height / mode->vdisplay;
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x = (adjusted_mode->hdisplay - width + 1) / 2;
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y = 0;
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height = adjusted_mode->vdisplay;
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} else if (scaled_width < scaled_height) { /* letter */
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height = scaled_width / mode->hdisplay;
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y = (adjusted_mode->vdisplay - height + 1) / 2;
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x = 0;
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width = adjusted_mode->hdisplay;
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} else {
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x = y = 0;
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width = adjusted_mode->hdisplay;
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height = adjusted_mode->vdisplay;
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}
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}
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break;
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default:
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case DRM_MODE_SCALE_FULLSCREEN:
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x = y = 0;
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width = adjusted_mode->hdisplay;
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height = adjusted_mode->vdisplay;
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break;
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}
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done:
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dev_priv->pch_pf_pos = (x << 16) | y;
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dev_priv->pch_pf_size = (width << 16) | height;
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}
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