sh: Clock framework tidying.
This syncs up the SH clock framework with the linux/clk.h API, for which there were only some minor changes required, namely the clk_get() dev_id and subsequent callsites. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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				| @ -5,9 +5,11 @@ | ||||
|  * | ||||
|  * This clock framework is derived from the OMAP version by: | ||||
|  * | ||||
|  *	Copyright (C) 2004 Nokia Corporation | ||||
|  *	Copyright (C) 2004 - 2005 Nokia Corporation | ||||
|  *	Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> | ||||
|  * | ||||
|  *  Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com> | ||||
|  * | ||||
|  * This file is subject to the terms and conditions of the GNU General Public | ||||
|  * License.  See the file "COPYING" in the main directory of this archive | ||||
|  * for more details. | ||||
| @ -20,6 +22,7 @@ | ||||
| #include <linux/kref.h> | ||||
| #include <linux/seq_file.h> | ||||
| #include <linux/err.h> | ||||
| #include <linux/platform_device.h> | ||||
| #include <asm/clock.h> | ||||
| #include <asm/timer.h> | ||||
| 
 | ||||
| @ -195,17 +198,37 @@ void clk_recalc_rate(struct clk *clk) | ||||
| 		propagate_rate(clk); | ||||
| } | ||||
| 
 | ||||
| struct clk *clk_get(const char *id) | ||||
| /*
 | ||||
|  * Returns a clock. Note that we first try to use device id on the bus | ||||
|  * and clock name. If this fails, we try to use clock name only. | ||||
|  */ | ||||
| struct clk *clk_get(struct device *dev, const char *id) | ||||
| { | ||||
| 	struct clk *p, *clk = ERR_PTR(-ENOENT); | ||||
| 	int idno; | ||||
| 
 | ||||
| 	if (dev == NULL || dev->bus != &platform_bus_type) | ||||
| 		idno = -1; | ||||
| 	else | ||||
| 		idno = to_platform_device(dev)->id; | ||||
| 
 | ||||
| 	mutex_lock(&clock_list_sem); | ||||
| 	list_for_each_entry(p, &clock_list, node) { | ||||
| 		if (p->id == idno && | ||||
| 		    strcmp(id, p->name) == 0 && try_module_get(p->owner)) { | ||||
| 			clk = p; | ||||
| 			goto found; | ||||
| 		} | ||||
| 	} | ||||
| 
 | ||||
| 	list_for_each_entry(p, &clock_list, node) { | ||||
| 		if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) { | ||||
| 			clk = p; | ||||
| 			break; | ||||
| 		} | ||||
| 	} | ||||
| 
 | ||||
| found: | ||||
| 	mutex_unlock(&clock_list_sem); | ||||
| 
 | ||||
| 	return clk; | ||||
|  | ||||
| @ -24,7 +24,7 @@ static int pfc_divisors[]    = { 1, 2, 4, 1, 3, 6, 1, 1 }; | ||||
| 
 | ||||
| static void set_bus_parent(struct clk *clk) | ||||
| { | ||||
| 	struct clk *bus_clk = clk_get("bus_clk"); | ||||
| 	struct clk *bus_clk = clk_get(NULL, "bus_clk"); | ||||
| 	clk->parent = bus_clk; | ||||
| 	clk_put(bus_clk); | ||||
| } | ||||
|  | ||||
| @ -97,7 +97,7 @@ static void shoc_clk_recalc(struct clk *clk) | ||||
| 
 | ||||
| static int shoc_clk_verify_rate(struct clk *clk, unsigned long rate) | ||||
| { | ||||
| 	struct clk *bclk = clk_get("bus_clk"); | ||||
| 	struct clk *bclk = clk_get(NULL, "bus_clk"); | ||||
| 	unsigned long bclk_rate = clk_get_rate(bclk); | ||||
| 
 | ||||
| 	clk_put(bclk); | ||||
| @ -151,7 +151,7 @@ static struct clk *sh4202_onchip_clocks[] = { | ||||
| 
 | ||||
| static int __init sh4202_clk_init(void) | ||||
| { | ||||
| 	struct clk *clk = clk_get("master_clk"); | ||||
| 	struct clk *clk = clk_get(NULL, "master_clk"); | ||||
| 	int i; | ||||
| 
 | ||||
| 	for (i = 0; i < ARRAY_SIZE(sh4202_onchip_clocks); i++) { | ||||
|  | ||||
| @ -98,7 +98,7 @@ static struct clk *sh7780_onchip_clocks[] = { | ||||
| 
 | ||||
| static int __init sh7780_clk_init(void) | ||||
| { | ||||
| 	struct clk *clk = clk_get("master_clk"); | ||||
| 	struct clk *clk = clk_get(NULL, "master_clk"); | ||||
| 	int i; | ||||
| 
 | ||||
| 	for (i = 0; i < ARRAY_SIZE(sh7780_onchip_clocks); i++) { | ||||
|  | ||||
| @ -124,7 +124,7 @@ static void cmt_clk_init(struct clk *clk) | ||||
| 	u8 divisor = CMT_CMCSR_INIT & 0x3; | ||||
| 	ctrl_inw(CMT_CMCSR_0); | ||||
| 	ctrl_outw(CMT_CMCSR_INIT, CMT_CMCSR_0); | ||||
| 	clk->parent = clk_get("module_clk"); | ||||
| 	clk->parent = clk_get(NULL, "module_clk"); | ||||
| 	clk->rate = clk->parent->rate / (8 << (divisor << 1)); | ||||
| } | ||||
| 
 | ||||
| @ -164,7 +164,7 @@ static int cmt_timer_init(void) | ||||
| 
 | ||||
| 	setup_irq(CONFIG_SH_TIMER_IRQ, &cmt_irq); | ||||
| 
 | ||||
| 	cmt0_clk.parent = clk_get("module_clk"); | ||||
| 	cmt0_clk.parent = clk_get(NULL, "module_clk"); | ||||
| 
 | ||||
| 	cmt_timer_stop(); | ||||
| 
 | ||||
|  | ||||
| @ -161,7 +161,7 @@ static int mtu2_timer_init(void) | ||||
| 
 | ||||
| 	setup_irq(CONFIG_SH_TIMER_IRQ, &mtu2_irq); | ||||
| 
 | ||||
| 	mtu2_clk1.parent = clk_get("module_clk"); | ||||
| 	mtu2_clk1.parent = clk_get(NULL, "module_clk"); | ||||
| 
 | ||||
| 	ctrl_outb(ctrl_inb(STBCR3) & (~0x20), STBCR3); | ||||
| 
 | ||||
|  | ||||
| @ -144,7 +144,7 @@ static int tmu_timer_init(void) | ||||
| 
 | ||||
| 	setup_irq(CONFIG_SH_TIMER_IRQ, &tmu_irq); | ||||
| 
 | ||||
| 	tmu0_clk.parent = clk_get("module_clk"); | ||||
| 	tmu0_clk.parent = clk_get(NULL, "module_clk"); | ||||
| 
 | ||||
| 	/* Start TMU0 */ | ||||
| 	tmu_timer_stop(); | ||||
|  | ||||
| @ -775,7 +775,7 @@ static int sci_notifier(struct notifier_block *self, | ||||
| 			 * | ||||
| 			 * Clean this up later.. | ||||
| 			 */ | ||||
| 			clk = clk_get("module_clk"); | ||||
| 			clk = clk_get(NULL, "module_clk"); | ||||
| 			port->uartclk = clk_get_rate(clk) * 16; | ||||
| 			clk_put(clk); | ||||
| 		} | ||||
| @ -960,7 +960,7 @@ static void sci_set_termios(struct uart_port *port, struct termios *termios, | ||||
| 		default: | ||||
| 		{ | ||||
| #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) | ||||
| 			struct clk *clk = clk_get("module_clk"); | ||||
| 			struct clk *clk = clk_get(NULL, "module_clk"); | ||||
| 			t = SCBRR_VALUE(baud, clk_get_rate(clk)); | ||||
| 			clk_put(clk); | ||||
| #else | ||||
| @ -1128,7 +1128,7 @@ static void __init sci_init_ports(void) | ||||
| 		 * XXX: We should use a proper SCI/SCIF clock | ||||
| 		 */ | ||||
| 		{ | ||||
| 			struct clk *clk = clk_get("module_clk"); | ||||
| 			struct clk *clk = clk_get(NULL, "module_clk"); | ||||
| 			sci_ports[i].port.uartclk = clk_get_rate(clk) * 16; | ||||
| 			clk_put(clk); | ||||
| 		} | ||||
|  | ||||
| @ -4,6 +4,7 @@ | ||||
| #include <linux/kref.h> | ||||
| #include <linux/list.h> | ||||
| #include <linux/seq_file.h> | ||||
| #include <linux/clk.h> | ||||
| 
 | ||||
| struct clk; | ||||
| 
 | ||||
| @ -18,7 +19,7 @@ struct clk_ops { | ||||
| struct clk { | ||||
| 	struct list_head	node; | ||||
| 	const char		*name; | ||||
| 
 | ||||
| 	int			id; | ||||
| 	struct module		*owner; | ||||
| 
 | ||||
| 	struct clk		*parent; | ||||
| @ -40,22 +41,13 @@ void arch_init_clk_ops(struct clk_ops **, int type); | ||||
| int clk_init(void); | ||||
| 
 | ||||
| int __clk_enable(struct clk *); | ||||
| int clk_enable(struct clk *); | ||||
| 
 | ||||
| void __clk_disable(struct clk *); | ||||
| void clk_disable(struct clk *); | ||||
| 
 | ||||
| int clk_set_rate(struct clk *, unsigned long rate); | ||||
| unsigned long clk_get_rate(struct clk *); | ||||
| void clk_recalc_rate(struct clk *); | ||||
| 
 | ||||
| struct clk *clk_get(const char *id); | ||||
| void clk_put(struct clk *); | ||||
| 
 | ||||
| int clk_register(struct clk *); | ||||
| void clk_unregister(struct clk *); | ||||
| 
 | ||||
| int show_clocks(struct seq_file *m); | ||||
| 
 | ||||
| #endif /* __ASM_SH_CLOCK_H */ | ||||
| 
 | ||||
|  | ||||
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