Merge branch 'pci/dpc'
- Defer DPC event handling to work queue (Keith Busch) - Use threaded IRQ for DPC bottom half (Keith Busch) - Print AER status while handling DPC events (Keith Busch) * pci/dpc: PCI/DPC: Remove indirection waiting for inactive link PCI/DPC: Use threaded IRQ for bottom half handling PCI/DPC: Print AER status in DPC event handling PCI/DPC: Remove rp_pio_status from dpc struct PCI/DPC: Defer event handling to work queue PCI/DPC: Leave interrupts enabled while handling event
This commit is contained in:
Bjorn Helgaas
commit
1ca358a8e3
@ -6,6 +6,7 @@
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* Copyright (C) 2016 Intel Corp.
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*/
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#include <linux/aer.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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@ -16,10 +17,8 @@
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struct dpc_dev {
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struct pcie_device *dev;
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struct work_struct work;
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u16 cap_pos;
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bool rp_extensions;
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u32 rp_pio_status;
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u8 rp_log_size;
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};
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@ -65,19 +64,13 @@ static int dpc_wait_rp_inactive(struct dpc_dev *dpc)
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return 0;
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}
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static void dpc_wait_link_inactive(struct dpc_dev *dpc)
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{
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struct pci_dev *pdev = dpc->dev->port;
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pcie_wait_for_link(pdev, false);
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}
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static pci_ers_result_t dpc_reset_link(struct pci_dev *pdev)
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{
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struct dpc_dev *dpc;
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struct pcie_device *pciedev;
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struct device *devdpc;
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u16 cap, ctl;
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u16 cap;
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/*
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* DPC disables the Link automatically in hardware, so it has
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@ -92,34 +85,17 @@ static pci_ers_result_t dpc_reset_link(struct pci_dev *pdev)
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* Wait until the Link is inactive, then clear DPC Trigger Status
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* to allow the Port to leave DPC.
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*/
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dpc_wait_link_inactive(dpc);
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pcie_wait_for_link(pdev, false);
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if (dpc->rp_extensions && dpc_wait_rp_inactive(dpc))
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return PCI_ERS_RESULT_DISCONNECT;
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if (dpc->rp_extensions && dpc->rp_pio_status) {
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pci_write_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_STATUS,
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dpc->rp_pio_status);
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dpc->rp_pio_status = 0;
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}
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pci_write_config_word(pdev, cap + PCI_EXP_DPC_STATUS,
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PCI_EXP_DPC_STATUS_TRIGGER);
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pci_read_config_word(pdev, cap + PCI_EXP_DPC_CTL, &ctl);
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pci_write_config_word(pdev, cap + PCI_EXP_DPC_CTL,
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ctl | PCI_EXP_DPC_CTL_INT_EN);
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return PCI_ERS_RESULT_RECOVERED;
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}
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static void dpc_work(struct work_struct *work)
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{
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struct dpc_dev *dpc = container_of(work, struct dpc_dev, work);
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struct pci_dev *pdev = dpc->dev->port;
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/* We configure DPC so it only triggers on ERR_FATAL */
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pcie_do_fatal_recovery(pdev, PCIE_PORT_SERVICE_DPC);
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}
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static void dpc_process_rp_pio_error(struct dpc_dev *dpc)
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{
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@ -134,8 +110,6 @@ static void dpc_process_rp_pio_error(struct dpc_dev *dpc)
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dev_err(dev, "rp_pio_status: %#010x, rp_pio_mask: %#010x\n",
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status, mask);
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dpc->rp_pio_status = status;
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pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_SEVERITY, &sev);
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pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_SYSERROR, &syserr);
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pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_EXCEPTION, &exc);
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@ -146,15 +120,14 @@ static void dpc_process_rp_pio_error(struct dpc_dev *dpc)
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pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &dpc_status);
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first_error = (dpc_status & 0x1f00) >> 8;
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status &= ~mask;
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for (i = 0; i < ARRAY_SIZE(rp_pio_error_string); i++) {
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if (status & (1 << i))
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if ((status & ~mask) & (1 << i))
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dev_err(dev, "[%2d] %s%s\n", i, rp_pio_error_string[i],
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first_error == i ? " (First)" : "");
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}
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if (dpc->rp_log_size < 4)
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return;
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goto clear_status;
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pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_HEADER_LOG,
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&dw0);
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pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_HEADER_LOG + 4,
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@ -167,7 +140,7 @@ static void dpc_process_rp_pio_error(struct dpc_dev *dpc)
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dw0, dw1, dw2, dw3);
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if (dpc->rp_log_size < 5)
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return;
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goto clear_status;
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pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_IMPSPEC_LOG, &log);
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dev_err(dev, "RP PIO ImpSpec Log %#010x\n", log);
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@ -176,43 +149,26 @@ static void dpc_process_rp_pio_error(struct dpc_dev *dpc)
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cap + PCI_EXP_DPC_RP_PIO_TLPPREFIX_LOG, &prefix);
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dev_err(dev, "TLP Prefix Header: dw%d, %#010x\n", i, prefix);
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}
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clear_status:
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pci_write_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_STATUS, status);
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}
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static irqreturn_t dpc_irq(int irq, void *context)
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static irqreturn_t dpc_handler(int irq, void *context)
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{
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struct dpc_dev *dpc = (struct dpc_dev *)context;
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struct aer_err_info info;
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struct dpc_dev *dpc = context;
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struct pci_dev *pdev = dpc->dev->port;
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struct device *dev = &dpc->dev->device;
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u16 cap = dpc->cap_pos, ctl, status, source, reason, ext_reason;
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pci_read_config_word(pdev, cap + PCI_EXP_DPC_CTL, &ctl);
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if (!(ctl & PCI_EXP_DPC_CTL_INT_EN) || ctl == (u16)(~0))
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return IRQ_NONE;
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u16 cap = dpc->cap_pos, status, source, reason, ext_reason;
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pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &status);
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if (!(status & PCI_EXP_DPC_STATUS_INTERRUPT))
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return IRQ_NONE;
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if (!(status & PCI_EXP_DPC_STATUS_TRIGGER)) {
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pci_write_config_word(pdev, cap + PCI_EXP_DPC_STATUS,
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PCI_EXP_DPC_STATUS_INTERRUPT);
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return IRQ_HANDLED;
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}
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pci_write_config_word(pdev, cap + PCI_EXP_DPC_CTL,
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ctl & ~PCI_EXP_DPC_CTL_INT_EN);
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pci_read_config_word(pdev, cap + PCI_EXP_DPC_SOURCE_ID,
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&source);
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pci_read_config_word(pdev, cap + PCI_EXP_DPC_SOURCE_ID, &source);
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dev_info(dev, "DPC containment event, status:%#06x source:%#06x\n",
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status, source);
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status, source);
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reason = (status & PCI_EXP_DPC_STATUS_TRIGGER_RSN) >> 1;
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ext_reason = (status & PCI_EXP_DPC_STATUS_TRIGGER_RSN_EXT) >> 5;
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dev_warn(dev, "DPC %s detected, remove downstream devices\n",
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(reason == 0) ? "unmasked uncorrectable error" :
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(reason == 1) ? "ERR_NONFATAL" :
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@ -220,15 +176,36 @@ static irqreturn_t dpc_irq(int irq, void *context)
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(ext_reason == 0) ? "RP PIO error" :
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(ext_reason == 1) ? "software trigger" :
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"reserved error");
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/* show RP PIO error detail information */
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if (dpc->rp_extensions && reason == 3 && ext_reason == 0)
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dpc_process_rp_pio_error(dpc);
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else if (reason == 0 && aer_get_device_error_info(pdev, &info)) {
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aer_print_error(pdev, &info);
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pci_cleanup_aer_uncorrect_error_status(pdev);
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}
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/* We configure DPC so it only triggers on ERR_FATAL */
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pcie_do_fatal_recovery(pdev, PCIE_PORT_SERVICE_DPC);
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return IRQ_HANDLED;
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}
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static irqreturn_t dpc_irq(int irq, void *context)
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{
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struct dpc_dev *dpc = (struct dpc_dev *)context;
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struct pci_dev *pdev = dpc->dev->port;
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u16 cap = dpc->cap_pos, status;
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pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &status);
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if (!(status & PCI_EXP_DPC_STATUS_INTERRUPT) || status == (u16)(~0))
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return IRQ_NONE;
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pci_write_config_word(pdev, cap + PCI_EXP_DPC_STATUS,
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PCI_EXP_DPC_STATUS_INTERRUPT);
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schedule_work(&dpc->work);
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if (status & PCI_EXP_DPC_STATUS_TRIGGER)
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return IRQ_WAKE_THREAD;
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return IRQ_HANDLED;
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}
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@ -250,11 +227,11 @@ static int dpc_probe(struct pcie_device *dev)
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dpc->cap_pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_DPC);
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dpc->dev = dev;
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INIT_WORK(&dpc->work, dpc_work);
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set_service_data(dev, dpc);
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status = devm_request_irq(device, dev->irq, dpc_irq, IRQF_SHARED,
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"pcie-dpc", dpc);
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status = devm_request_threaded_irq(device, dev->irq, dpc_irq,
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dpc_handler, IRQF_SHARED,
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"pcie-dpc", dpc);
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if (status) {
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dev_warn(device, "request IRQ%d failed: %d\n", dev->irq,
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status);
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