clk: pass parent_rate into .set_rate
For most of .set_rate implementation, parent_rate will be used, so just like passing parent_rate into .recalc_rate, let's pass parent_rate into .set_rate too. It also updates the kernel doc for .set_rate ops. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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@ -111,14 +111,15 @@ static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,
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return *prate / div;
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return *prate / div;
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}
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}
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static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate)
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static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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{
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struct clk_divider *divider = to_clk_divider(hw);
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struct clk_divider *divider = to_clk_divider(hw);
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unsigned int div;
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unsigned int div;
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unsigned long flags = 0;
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unsigned long flags = 0;
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u32 val;
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u32 val;
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div = __clk_get_rate(__clk_get_parent(hw->clk)) / rate;
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div = parent_rate / rate;
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if (!(divider->flags & CLK_DIVIDER_ONE_BASED))
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if (!(divider->flags & CLK_DIVIDER_ONE_BASED))
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div--;
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div--;
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@ -848,7 +848,7 @@ static void clk_change_rate(struct clk *clk)
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old_rate = clk->rate;
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old_rate = clk->rate;
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if (clk->ops->set_rate)
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if (clk->ops->set_rate)
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clk->ops->set_rate(clk->hw, clk->new_rate);
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clk->ops->set_rate(clk->hw, clk->new_rate, clk->parent->rate);
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if (clk->ops->recalc_rate)
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if (clk->ops->recalc_rate)
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clk->rate = clk->ops->recalc_rate(clk->hw,
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clk->rate = clk->ops->recalc_rate(clk->hw,
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@ -88,19 +88,11 @@ struct clk_hw {
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* array index into the value programmed into the hardware.
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* array index into the value programmed into the hardware.
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* Returns 0 on success, -EERROR otherwise.
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* Returns 0 on success, -EERROR otherwise.
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*
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*
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* @set_rate: Change the rate of this clock. If this callback returns
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* @set_rate: Change the rate of this clock. The requested rate is specified
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* CLK_SET_RATE_PARENT, the rate change will be propagated to the
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* by the second argument, which should typically be the return
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* parent clock (which may propagate again if the parent clock
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* of .round_rate call. The third argument gives the parent rate
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* also sets this flag). The requested rate of the parent is
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* which is likely helpful for most .set_rate implementation.
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* passed back from the callback in the second 'unsigned long *'
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* Returns 0 on success, -EERROR otherwise.
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* argument. Note that it is up to the hardware clock's set_rate
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* implementation to insure that clocks do not run out of spec
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* when propgating the call to set_rate up to the parent. One way
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* to do this is to gate the clock (via clk_disable and/or
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* clk_unprepare) before calling clk_set_rate, then ungating it
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* afterward. If your clock also has the CLK_GATE_SET_RATE flag
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* set then this will insure safety. Returns 0 on success,
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* -EERROR otherwise.
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*
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*
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* The clk_enable/clk_disable and clk_prepare/clk_unprepare pairs allow
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* The clk_enable/clk_disable and clk_prepare/clk_unprepare pairs allow
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* implementations to split any work between atomic (enable) and sleepable
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* implementations to split any work between atomic (enable) and sleepable
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@ -125,7 +117,8 @@ struct clk_ops {
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unsigned long *);
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unsigned long *);
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int (*set_parent)(struct clk_hw *hw, u8 index);
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int (*set_parent)(struct clk_hw *hw, u8 index);
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u8 (*get_parent)(struct clk_hw *hw);
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u8 (*get_parent)(struct clk_hw *hw);
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int (*set_rate)(struct clk_hw *hw, unsigned long);
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int (*set_rate)(struct clk_hw *hw, unsigned long,
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unsigned long);
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void (*init)(struct clk_hw *hw);
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void (*init)(struct clk_hw *hw);
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};
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};
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