forked from Minki/linux
ASoC: fsl_spdif: Add support for higher sample rates
Add 88200Hz and 176400Hz sample rates support for TX. Add 88200Hz, 176400Hz, 192000Hz sample rates support for RX. Signed-off-by: Viorel Suman <viorel.suman@nxp.com> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Acked-by: Nicolin Chen <nicoleotsuka@gmail.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Link: https://lore.kernel.org/r/1602557360-18795-1-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
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1bfa3eaa45
@ -459,10 +459,18 @@ static int spdif_set_sample_rate(struct snd_pcm_substream *substream,
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rate = SPDIF_TXRATE_48000;
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csfs = IEC958_AES3_CON_FS_48000;
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break;
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case 88200:
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rate = SPDIF_TXRATE_88200;
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csfs = IEC958_AES3_CON_FS_88200;
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break;
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case 96000:
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rate = SPDIF_TXRATE_96000;
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csfs = IEC958_AES3_CON_FS_96000;
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break;
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case 176400:
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rate = SPDIF_TXRATE_176400;
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csfs = IEC958_AES3_CON_FS_176400;
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break;
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case 192000:
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rate = SPDIF_TXRATE_192000;
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csfs = IEC958_AES3_CON_FS_192000;
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@ -857,7 +865,7 @@ static int fsl_spdif_rxrate_info(struct snd_kcontrol *kcontrol,
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uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
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uinfo->count = 1;
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uinfo->value.integer.min = 16000;
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uinfo->value.integer.max = 96000;
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uinfo->value.integer.max = 192000;
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return 0;
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}
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@ -1175,7 +1183,8 @@ static u32 fsl_spdif_txclk_caldiv(struct fsl_spdif_priv *spdif_priv,
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struct clk *clk, u64 savesub,
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enum spdif_txrate index, bool round)
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{
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static const u32 rate[] = { 32000, 44100, 48000, 96000, 192000 };
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static const u32 rate[] = { 32000, 44100, 48000, 88200, 96000, 176400,
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192000, };
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bool is_sysclk = clk_is_match(clk, spdif_priv->sysclk);
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u64 rate_ideal, rate_actual, sub;
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u32 arate;
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@ -1235,7 +1244,8 @@ out:
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static int fsl_spdif_probe_txclk(struct fsl_spdif_priv *spdif_priv,
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enum spdif_txrate index)
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{
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static const u32 rate[] = { 32000, 44100, 48000, 96000, 192000 };
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static const u32 rate[] = { 32000, 44100, 48000, 88200, 96000, 176400,
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192000, };
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struct platform_device *pdev = spdif_priv->pdev;
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struct device *dev = &pdev->dev;
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u64 savesub = 100000, ret;
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@ -163,7 +163,9 @@ enum spdif_txrate {
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SPDIF_TXRATE_32000 = 0,
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SPDIF_TXRATE_44100,
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SPDIF_TXRATE_48000,
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SPDIF_TXRATE_88200,
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SPDIF_TXRATE_96000,
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SPDIF_TXRATE_176400,
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SPDIF_TXRATE_192000,
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};
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#define SPDIF_TXRATE_MAX (SPDIF_TXRATE_192000 + 1)
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@ -177,15 +179,20 @@ enum spdif_txrate {
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#define FSL_SPDIF_RATES_PLAYBACK (SNDRV_PCM_RATE_32000 | \
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SNDRV_PCM_RATE_44100 | \
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SNDRV_PCM_RATE_48000 | \
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SNDRV_PCM_RATE_88200 | \
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SNDRV_PCM_RATE_96000 | \
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SNDRV_PCM_RATE_176400 | \
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SNDRV_PCM_RATE_192000)
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#define FSL_SPDIF_RATES_CAPTURE (SNDRV_PCM_RATE_16000 | \
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SNDRV_PCM_RATE_32000 | \
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SNDRV_PCM_RATE_44100 | \
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SNDRV_PCM_RATE_48000 | \
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SNDRV_PCM_RATE_88200 | \
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SNDRV_PCM_RATE_64000 | \
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SNDRV_PCM_RATE_96000)
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SNDRV_PCM_RATE_96000 | \
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SNDRV_PCM_RATE_176400 | \
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SNDRV_PCM_RATE_192000)
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#define FSL_SPDIF_FORMATS_PLAYBACK (SNDRV_PCM_FMTBIT_S16_LE | \
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SNDRV_PCM_FMTBIT_S20_3LE | \
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