ASoC: Intel: Skylake: Reset DSP pipe in skl_pcm_hw_free
Currently during destroy pipeline the gateway is disabled before DMA completion. This leads to improper draining of data and subsequently causing issues on HD-Audio DMA. Hence added a new pipe reset IPC in skl_pcm_hw_free in which the Gateway Enable(GEN bit) is reset to 0 after DMA completion in skl_pcm_trigger. Signed-off-by: Divya Prakash <divya1.prakash@intel.com> Signed-off-by: Sriram Periyasamy <sriramx.periyasamy@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -366,9 +366,21 @@ static int skl_pcm_hw_free(struct snd_pcm_substream *substream,
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{
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struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
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struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
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struct skl *skl = get_skl_ctx(dai->dev);
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struct skl_module_cfg *mconfig;
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int ret;
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dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
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mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
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if (mconfig) {
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ret = skl_reset_pipe(skl->skl_sst, mconfig->pipe);
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if (ret < 0)
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dev_err(dai->dev, "%s:Reset failed ret =%d",
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__func__, ret);
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}
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snd_hdac_stream_cleanup(hdac_stream(stream));
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hdac_stream(stream)->prepared = 0;
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