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[media] s5p-jpeg: Document sclk-jpeg clock for Exynos3250 SoC
JPEG IP on Exynos3250 SoC requires enabling two clock gates for its operation. This patch documents this requirement. Signed-off-by: Jacek Anaszewski <j.anaszewski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
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@ -3,9 +3,13 @@ Samsung S5P/EXYNOS SoC series JPEG codec
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Required properties:
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- compatible : should be one of:
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"samsung,s5pv210-jpeg", "samsung,exynos4210-jpeg";
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"samsung,s5pv210-jpeg", "samsung,exynos4210-jpeg",
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"samsung,exynos3250-jpeg";
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- reg : address and length of the JPEG codec IP register set;
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- interrupts : specifies the JPEG codec IP interrupt;
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- clocks : should contain the JPEG codec IP gate clock specifier, from the
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common clock bindings;
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- clock-names : should contain "jpeg" entry.
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- clock-names : should contain:
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- "jpeg" for the core gate clock,
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- "sclk" for the special clock (optional).
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- clocks : should contain the clock specifier and clock ID list
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matching entries in the clock-names property; from
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the common clock bindings.
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