mmc: mmci: add optional reset property
This patch adds a optional reset management. STM32 sdmmc variant needs to reset hardware block during the power cycle procedure (for re-initialization). Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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committed by
Ulf Hansson
parent
c86a988885
commit
15878e5846
@@ -36,6 +36,7 @@
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#include <linux/pm_runtime.h>
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#include <linux/pm_runtime.h>
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#include <linux/types.h>
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#include <linux/types.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/reset.h>
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#include <asm/div64.h>
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#include <asm/div64.h>
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#include <asm/io.h>
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#include <asm/io.h>
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@@ -1882,6 +1883,12 @@ static int mmci_probe(struct amba_device *dev,
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dev_dbg(mmc_dev(mmc), "clocking block at %u Hz\n", mmc->f_max);
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dev_dbg(mmc_dev(mmc), "clocking block at %u Hz\n", mmc->f_max);
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host->rst = devm_reset_control_get_optional_exclusive(&dev->dev, NULL);
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if (IS_ERR(host->rst)) {
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ret = PTR_ERR(host->rst);
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goto clk_disable;
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}
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/* Get regulators and the supported OCR mask */
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/* Get regulators and the supported OCR mask */
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ret = mmc_regulator_get_supply(mmc);
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ret = mmc_regulator_get_supply(mmc);
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if (ret)
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if (ret)
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@@ -318,6 +318,8 @@ struct mmci_host {
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struct clk *clk;
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struct clk *clk;
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u8 singleirq:1;
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u8 singleirq:1;
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struct reset_control *rst;
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spinlock_t lock;
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spinlock_t lock;
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unsigned int mclk;
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unsigned int mclk;
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