arm64: dts: juno: Add cache-level property to L2 caches

Add the missing cache-level property to L2 caches. This is needed if
we need to find the last level cache directly from the device tree cache
node.

Link: https://lore.kernel.org/r/20220629095959.1115587-1-sudeep.holla@arm.com
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Lorenzo Pieralisi <lpieralisi@kernel.org>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
This commit is contained in:
Sudeep Holla
2022-06-29 10:59:59 +01:00
parent a0bf153f26
commit 156c90415b
3 changed files with 6 additions and 0 deletions

View File

@@ -192,6 +192,7 @@
cache-size = <0x200000>;
cache-line-size = <64>;
cache-sets = <2048>;
cache-level = <2>;
};
A53_L2: l2-cache1 {
@@ -199,6 +200,7 @@
cache-size = <0x100000>;
cache-line-size = <64>;
cache-sets = <1024>;
cache-level = <2>;
};
};

View File

@@ -198,6 +198,7 @@
cache-size = <0x200000>;
cache-line-size = <64>;
cache-sets = <2048>;
cache-level = <2>;
};
A53_L2: l2-cache1 {
@@ -205,6 +206,7 @@
cache-size = <0x100000>;
cache-line-size = <64>;
cache-sets = <1024>;
cache-level = <2>;
};
};

View File

@@ -197,6 +197,7 @@
cache-size = <0x200000>;
cache-line-size = <64>;
cache-sets = <2048>;
cache-level = <2>;
};
A53_L2: l2-cache1 {
@@ -204,6 +205,7 @@
cache-size = <0x100000>;
cache-line-size = <64>;
cache-sets = <1024>;
cache-level = <2>;
};
};