forked from Minki/linux
ath9k_hw: Fix incorrect Tx control power in AR9003 template
CTL power data incorrect in ctlPowerData_2G field of ar9300_eeprom. Setting incorrect CTL power in calibration is causing lower tx power. Tx power was reported as 3dBm while operating in channel 6 HT40+/ in channel 11 HT40- due to CTL powers in the calibration is set to zero. Cc: stable@kernel.org Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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15052f81d2
@ -307,7 +307,7 @@ static const struct ar9300_eeprom ar9300_default = {
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{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
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{ { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 1) } },
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{ { CTL(60, 1), CTL(60, 0), CTL(0, 0), CTL(0, 0) } },
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{ { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0) } },
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{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
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{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
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@ -884,7 +884,7 @@ static const struct ar9300_eeprom ar9300_x113 = {
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{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
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{ { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 1) } },
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{ { CTL(60, 1), CTL(60, 0), CTL(0, 0), CTL(0, 0) } },
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{ { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0) } },
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{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
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{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
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@ -2040,7 +2040,7 @@ static const struct ar9300_eeprom ar9300_x112 = {
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{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
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{ { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 1) } },
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{ { CTL(60, 1), CTL(60, 0), CTL(0, 0), CTL(0, 0) } },
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{ { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0) } },
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{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
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{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
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