forked from Minki/linux
V4L/DVB (10952): cx25840: prepare it to be used by cx231xx module
cx231xx has a cx25840 inside the chip. However, some different initializations are used for this variant. Signed-off-by: Srinivasa Deevi <srinivasa.deevi@conexant.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Sri Deevi
Mauro Carvalho Chehab
parent
073d696d54
commit
149783b581
@ -32,7 +32,7 @@ static int set_audclk_freq(struct i2c_client *client, u32 freq)
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/* common for all inputs and rates */
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/* SA_MCLK_SEL=1, SA_MCLK_DIV=0x10 */
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if (!state->is_cx23885)
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if (!state->is_cx23885 && !state->is_cx231xx)
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cx25840_write(client, 0x127, 0x50);
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if (state->aud_input != CX25840_AUDIO_SERIAL) {
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@ -43,11 +43,15 @@ static int set_audclk_freq(struct i2c_client *client, u32 freq)
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* so avoid destroying registers. */
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break;
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}
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/* VID_PLL and AUX_PLL */
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cx25840_write4(client, 0x108, 0x1006040f);
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/* AUX_PLL_FRAC */
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cx25840_write4(client, 0x110, 0x01bb39ee);
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if (!state->is_cx231xx) {
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/* VID_PLL and AUX_PLL */
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cx25840_write4(client, 0x108, 0x1006040f);
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/* AUX_PLL_FRAC */
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cx25840_write4(client, 0x110, 0x01bb39ee);
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}
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if (state->is_cx25836)
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break;
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@ -64,11 +68,15 @@ static int set_audclk_freq(struct i2c_client *client, u32 freq)
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* so avoid destroying registers. */
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break;
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}
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/* VID_PLL and AUX_PLL */
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cx25840_write4(client, 0x108, 0x1009040f);
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/* AUX_PLL_FRAC */
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cx25840_write4(client, 0x110, 0x00ec6bd6);
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if (!state->is_cx231xx) {
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/* VID_PLL and AUX_PLL */
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cx25840_write4(client, 0x108, 0x1009040f);
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/* AUX_PLL_FRAC */
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cx25840_write4(client, 0x110, 0x00ec6bd6);
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}
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if (state->is_cx25836)
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break;
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@ -85,11 +93,15 @@ static int set_audclk_freq(struct i2c_client *client, u32 freq)
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* so avoid destroying registers. */
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break;
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}
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if (!state->is_cx231xx) {
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/* VID_PLL and AUX_PLL */
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cx25840_write4(client, 0x108, 0x100a040f);
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/* AUX_PLL_FRAC */
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cx25840_write4(client, 0x110, 0x0098d6e5);
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}
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if (state->is_cx25836)
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break;
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@ -108,11 +120,15 @@ static int set_audclk_freq(struct i2c_client *client, u32 freq)
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* so avoid destroying registers. */
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break;
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}
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if (!state->is_cx231xx) {
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/* VID_PLL and AUX_PLL */
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cx25840_write4(client, 0x108, 0x1e08040f);
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/* AUX_PLL_FRAC */
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cx25840_write4(client, 0x110, 0x012a0869);
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}
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if (state->is_cx25836)
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break;
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@ -136,11 +152,15 @@ static int set_audclk_freq(struct i2c_client *client, u32 freq)
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break;
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}
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if (!state->is_cx231xx) {
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/* VID_PLL and AUX_PLL */
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cx25840_write4(client, 0x108, 0x1809040f);
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/* AUX_PLL_FRAC */
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cx25840_write4(client, 0x110, 0x00ec6bd6);
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}
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if (state->is_cx25836)
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break;
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@ -155,7 +175,7 @@ static int set_audclk_freq(struct i2c_client *client, u32 freq)
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break;
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case 48000:
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if (!state->is_cx23885) {
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if (!state->is_cx23885 && !state->is_cx231xx) {
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/* VID_PLL and AUX_PLL */
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cx25840_write4(client, 0x108, 0x180a040f);
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@ -166,7 +186,7 @@ static int set_audclk_freq(struct i2c_client *client, u32 freq)
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if (state->is_cx25836)
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break;
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if (!state->is_cx23885) {
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if (!state->is_cx23885 && !state->is_cx231xx) {
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/* src1_ctl */
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cx25840_write4(client, 0x8f8, 0x08018000);
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@ -227,7 +247,7 @@ void cx25840_audio_set_path(struct i2c_client *client)
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/* deassert soft reset */
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cx25840_and_or(client, 0x810, ~0x1, 0x00);
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if (state->is_cx23885) {
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if (state->is_cx23885 || state->is_cx231xx) {
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/* Ensure the controller is running when we exit */
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cx25840_and_or(client, 0x803, ~0x10, 0x10);
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}
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@ -345,6 +345,81 @@ static void cx23885_initialize(struct i2c_client *client)
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/* ----------------------------------------------------------------------- */
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static void cx231xx_initialize(struct i2c_client *client)
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{
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DEFINE_WAIT(wait);
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struct cx25840_state *state = to_state(i2c_get_clientdata(client));
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struct workqueue_struct *q;
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/* Internal Reset */
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cx25840_and_or(client, 0x102, ~0x01, 0x01);
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cx25840_and_or(client, 0x102, ~0x01, 0x00);
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/* Stop microcontroller */
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cx25840_and_or(client, 0x803, ~0x10, 0x00);
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/* DIF in reset? */
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cx25840_write(client, 0x398, 0);
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/* Trust the default xtal, no division */
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/* This changes for the cx23888 products */
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cx25840_write(client, 0x2, 0x76);
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/* Bring down the regulator for AUX clk */
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cx25840_write(client, 0x1, 0x40);
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/* Disable DIF bypass */
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cx25840_write4(client, 0x33c, 0x00000001);
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/* DIF Src phase inc */
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cx25840_write4(client, 0x340, 0x0df7df83);
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/* Luma */
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cx25840_write4(client, 0x414, 0x00107d12);
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/* Chroma */
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cx25840_write4(client, 0x420, 0x3d008282);
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/* ADC2 input select */
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cx25840_write(client, 0x102, 0x10);
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/* VIN1 & VIN5 */
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cx25840_write(client, 0x103, 0x11);
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/* Enable format auto detect */
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cx25840_write(client, 0x400, 0);
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/* Fast subchroma lock */
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/* White crush, Chroma AGC & Chroma Killer enabled */
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cx25840_write(client, 0x401, 0xe8);
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/* Do the firmware load in a work handler to prevent.
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Otherwise the kernel is blocked waiting for the
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bit-banging i2c interface to finish uploading the
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firmware. */
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INIT_WORK(&state->fw_work, cx25840_work_handler);
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init_waitqueue_head(&state->fw_wait);
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q = create_singlethread_workqueue("cx25840_fw");
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prepare_to_wait(&state->fw_wait, &wait, TASK_UNINTERRUPTIBLE);
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queue_work(q, &state->fw_work);
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schedule();
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finish_wait(&state->fw_wait, &wait);
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destroy_workqueue(q);
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cx25840_std_setup(client);
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/* (re)set input */
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set_input(client, state->vid_input, state->aud_input);
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/* start microcontroller */
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cx25840_and_or(client, 0x803, ~0x10, 0x10);
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}
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/* ----------------------------------------------------------------------- */
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void cx25840_std_setup(struct i2c_client *client)
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{
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struct cx25840_state *state = to_state(i2c_get_clientdata(client));
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@ -414,6 +489,7 @@ void cx25840_std_setup(struct i2c_client *client)
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}
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/* DEBUG: Displays configured PLL frequency */
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if (!state->is_cx231xx) {
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pll_int = cx25840_read(client, 0x108);
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pll_frac = cx25840_read4(client, 0x10c) & 0x1ffffff;
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pll_post = cx25840_read(client, 0x109);
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@ -448,6 +524,7 @@ void cx25840_std_setup(struct i2c_client *client)
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hblank, hactive, vblank, vactive, vblank656,
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src_decimation, burst, luma_lpf, uv_lpf, comb, sc);
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}
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}
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/* Sets horizontal blanking delay and active lines */
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cx25840_write(client, 0x470, hblank);
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@ -596,7 +673,7 @@ static int set_input(struct i2c_client *client, enum cx25840_video_input vid_inp
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* configuration in reg (for the cx23885) so we have no
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* need to attempt to flip bits for earlier av decoders.
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*/
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if (!state->is_cx23885) {
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if (!state->is_cx23885 && !state->is_cx231xx) {
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switch (aud_input) {
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case CX25840_AUDIO_SERIAL:
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/* do nothing, use serial audio input */
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@ -619,7 +696,7 @@ static int set_input(struct i2c_client *client, enum cx25840_video_input vid_inp
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/* Set INPUT_MODE to Composite (0) or S-Video (1) */
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cx25840_and_or(client, 0x401, ~0x6, is_composite ? 0 : 0x02);
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if (!state->is_cx23885) {
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if (!state->is_cx23885 && !state->is_cx231xx) {
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/* Set CH_SEL_ADC2 to 1 if input comes from CH3 */
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cx25840_and_or(client, 0x102, ~0x2, (reg & 0x80) == 0 ? 2 : 0);
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/* Set DUAL_MODE_ADC2 to 1 if input comes from both CH2&CH3 */
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@ -653,6 +730,19 @@ static int set_input(struct i2c_client *client, enum cx25840_video_input vid_inp
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/* I2S_IN_CTL: I2S_IN_SONY_MODE, LEFT SAMPLE on WS=1 */
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cx25840_write(client, 0x914, 0xa0);
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/* I2S_OUT_CTL:
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* I2S_IN_SONY_MODE, LEFT SAMPLE on WS=1
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* I2S_OUT_MASTER_MODE = Master
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*/
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cx25840_write(client, 0x918, 0xa0);
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cx25840_write(client, 0x919, 0x01);
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} else if (state->is_cx231xx) {
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/* Audio channel 1 src : Parallel 1 */
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cx25840_write(client, 0x124, 0x03);
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/* I2S_IN_CTL: I2S_IN_SONY_MODE, LEFT SAMPLE on WS=1 */
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cx25840_write(client, 0x914, 0xa0);
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/* I2S_OUT_CTL:
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* I2S_IN_SONY_MODE, LEFT SAMPLE on WS=1
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* I2S_OUT_MASTER_MODE = Master
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@ -719,7 +809,7 @@ static int set_v4lstd(struct i2c_client *client)
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static int cx25840_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
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{
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struct cx25840_state *state = to_state(sd);
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struct cx25840_state *state = to_state(sd);
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struct i2c_client *client = v4l2_get_subdevdata(sd);
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switch (ctrl->id) {
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@ -786,7 +876,7 @@ static int cx25840_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
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static int cx25840_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
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{
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struct cx25840_state *state = to_state(sd);
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struct cx25840_state *state = to_state(sd);
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struct i2c_client *client = v4l2_get_subdevdata(sd);
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switch (ctrl->id) {
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@ -1118,6 +1208,8 @@ static int cx25840_init(struct v4l2_subdev *sd, u32 val)
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cx25836_initialize(client);
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else if (state->is_cx23885)
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cx23885_initialize(client);
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else if (state->is_cx231xx)
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cx231xx_initialize(client);
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else
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cx25840_initialize(client);
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}
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@ -1159,7 +1251,7 @@ static int cx25840_s_stream(struct v4l2_subdev *sd, int enable)
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v4l_dbg(1, cx25840_debug, client, "%s output\n",
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enable ? "enable" : "disable");
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if (enable) {
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if (state->is_cx23885) {
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if (state->is_cx23885 || state->is_cx231xx) {
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u8 v = (cx25840_read(client, 0x421) | 0x0b);
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cx25840_write(client, 0x421, v);
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} else {
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@ -1169,7 +1261,7 @@ static int cx25840_s_stream(struct v4l2_subdev *sd, int enable)
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state->is_cx25836 ? 0x04 : 0x07);
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}
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} else {
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if (state->is_cx23885) {
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if (state->is_cx23885 || state->is_cx231xx) {
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u8 v = cx25840_read(client, 0x421) & ~(0x0b);
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cx25840_write(client, 0x421, v);
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} else {
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@ -1350,6 +1442,8 @@ static int cx25840_reset(struct v4l2_subdev *sd, u32 val)
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cx25836_initialize(client);
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else if (state->is_cx23885)
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cx23885_initialize(client);
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else if (state->is_cx231xx)
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cx231xx_initialize(client);
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else
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cx25840_initialize(client);
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return 0;
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@ -1445,10 +1539,12 @@ static int cx25840_probe(struct i2c_client *client,
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}
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else if ((device_id & 0xff00) == 0x8400) {
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id = V4L2_IDENT_CX25840 + ((device_id >> 4) & 0xf);
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} else if (device_id == 0x0000) {
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} /* else if (device_id == 0x0000) {
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id = V4L2_IDENT_CX25836 + ((device_id >> 4) & 0xf) - 6;
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} else if (device_id == 0x1313) {
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} */ else if (device_id == 0x1313) {
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id = V4L2_IDENT_CX25836 + ((device_id >> 4) & 0xf) - 6;
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} else if ((device_id & 0xfff0) == 0x5A30) {
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id = V4L2_IDENT_CX25840 + ((device_id >> 4) & 0xf);
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}
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else {
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v4l_dbg(1, cx25840_debug, client, "cx25840 not found\n");
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@ -1471,6 +1567,7 @@ static int cx25840_probe(struct i2c_client *client,
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state->c = client;
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state->is_cx25836 = ((device_id & 0xff00) == 0x8300);
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state->is_cx23885 = (device_id == 0x0000) || (device_id == 0x1313);
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state->is_cx231xx = (device_id == 0x5A3E);
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state->vid_input = CX25840_COMPOSITE7;
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state->aud_input = CX25840_AUDIO8;
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state->audclk_freq = 48000;
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@ -50,6 +50,7 @@ struct cx25840_state {
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u32 rev;
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int is_cx25836;
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int is_cx23885;
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int is_cx231xx;
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int is_initialized;
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wait_queue_head_t fw_wait; /* wake up when the fw load is finished */
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struct work_struct fw_work; /* work entry for fw load */
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@ -25,6 +25,7 @@
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#define FWFILE "v4l-cx25840.fw"
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#define FWFILE_CX23885 "v4l-cx23885-avcore-01.fw"
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#define FWFILE_CX231XX "v4l-cx231xx-avcore-01.fw"
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/*
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* Mike Isely <isely@pobox.com> - The FWSEND parameter controls the
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@ -96,9 +97,17 @@ int cx25840_loadfw(struct i2c_client *client)
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u8 buffer[FWSEND];
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const u8 *ptr;
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int size, retval;
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int MAX_BUF_SIZE = FWSEND;
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if (state->is_cx23885)
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firmware = FWFILE_CX23885;
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else if ( state->is_cx231xx)
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firmware = FWFILE_CX231XX;
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if( (state->is_cx231xx) && MAX_BUF_SIZE > 16) {
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printk(" Firmware download size changed to 16 bytes max length\n");
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MAX_BUF_SIZE = 16; /* cx231xx cannot accept more than 16 bytes at a time */
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}
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if (request_firmware(&fw, firmware, FWDEV(client)) != 0) {
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v4l_err(client, "unable to open firmware %s\n", firmware);
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@ -113,7 +122,7 @@ int cx25840_loadfw(struct i2c_client *client)
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size = fw->size;
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ptr = fw->data;
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while (size > 0) {
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int len = min(FWSEND - 2, size);
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int len = min(MAX_BUF_SIZE - 2, size);
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memcpy(buffer + 2, ptr, len);
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