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microblaze: Introduce TLB skip size

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TLB skip size direct how many TLBs is skipped.
Currently TLB0 and TLB1 are used for Linux kernel mapping
that's why their are skipped.

Signed-off-by: Michal Simek <monstr@monstr.eu>
This commit is contained in:
Michal Simek 2011-04-04 15:46:03 +02:00
parent 95b0f9ea66
commit 1451d1d88b
3 changed files with 7 additions and 5 deletions
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1
arch/microblaze/include/asm/mmu.h
View File

@ -68,6 +68,7 @@ extern void _tlbia(void); /* invalidate all TLB entries */
*/ */
# define MICROBLAZE_TLB_SIZE 64 # define MICROBLAZE_TLB_SIZE 64
# define MICROBLAZE_TLB_SKIP 2
/* /*
* TLB entries are defined by a "high" tag portion and a "low" data * TLB entries are defined by a "high" tag portion and a "low" data

7
arch/microblaze/kernel/hw_exception_handler.S
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@ -821,18 +821,19 @@ ex_handler_done:
* A common place to load the TLB. * A common place to load the TLB.
*/ */
tlb_index: tlb_index:
.long 1 /* MS: storing last used tlb index */ /* MS: storing last used tlb index */
.long (MICROBLAZE_TLB_SKIP - 1)
finish_tlb_load: finish_tlb_load:
/* MS: load the last used TLB index. */ /* MS: load the last used TLB index. */
lwi r5, r0, TOPHYS(tlb_index) lwi r5, r0, TOPHYS(tlb_index)
addik r5, r5, 1 /* MS: inc tlb_index -> use next one */ addik r5, r5, 1 /* MS: inc tlb_index -> use next one */
/* MS: FIXME this is potential fault, because this is mask not count */ /* MS: FIXME this is potential fault, because this is mask not count */
andi r5, r5, (MICROBLAZE_TLB_SIZE-1) andi r5, r5, MICROBLAZE_TLB_SIZE - 1
ori r6, r0, 1 ori r6, r0, 1
cmp r31, r5, r6 cmp r31, r5, r6
blti r31, ex12 blti r31, ex12
addik r5, r6, 1 addik r5, r6, MICROBLAZE_TLB_SKIP - 1
ex12: ex12:
/* MS: save back current TLB index */ /* MS: save back current TLB index */
swi r5, r0, TOPHYS(tlb_index) swi r5, r0, TOPHYS(tlb_index)

4
arch/microblaze/kernel/misc.S
View File

@ -36,7 +36,7 @@ _tlbia_1:
nop nop
mts rtlbhi, r0 /* flush: ensure V is clear */ mts rtlbhi, r0 /* flush: ensure V is clear */
nop nop
addik r11, r12, -2 addik r11, r12, -MICROBLAZE_TLB_SKIP
bneid r11, _tlbia_1 /* loop for all entries */ bneid r11, _tlbia_1 /* loop for all entries */
addik r12, r12, -1 addik r12, r12, -1
/* sync */ /* sync */
@ -75,7 +75,7 @@ early_console_reg_tlb_alloc:
* Load a TLB entry for the UART, so that microblaze_progress() can use * Load a TLB entry for the UART, so that microblaze_progress() can use
* the UARTs nice and early. We use a 4k real==virtual mapping. * the UARTs nice and early. We use a 4k real==virtual mapping.
*/ */
ori r4, r0, MICROBLAZE_TLB_SIZE - 1 ori r4, r0, 63
mts rtlbx, r4 /* TLB slot 63 */ mts rtlbx, r4 /* TLB slot 63 */
or r4,r5,r0 or r4,r5,r0