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Merge branch 'parisc-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux

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Pull parisc updates from Helge Deller:

 - limit usage of processor-internal cr16 clocksource to UP systems only

 - segfault info lines in syslog were too long, split those up

 - drop own TIF_RESTORE_SIGMASK flag and switch to generic code

* 'parisc-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux:
  parisc: Add line-break when printing segfault info
  parisc: Drop TIF_RESTORE_SIGMASK and switch to generic code
  parisc: Mark cr16 clocksource unstable on SMP systems
This commit is contained in:
Linus Torvalds 2017-01-03 10:50:05 -08:00
commit 0f64df3012
3 changed files with 21 additions and 5 deletions
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1
arch/parisc/include/asm/thread_info.h
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@ -49,7 +49,6 @@ struct thread_info {
#define TIF_POLLING_NRFLAG 3 /* true if poll_idle() is polling TIF_NEED_RESCHED */ #define TIF_POLLING_NRFLAG 3 /* true if poll_idle() is polling TIF_NEED_RESCHED */
#define TIF_32BIT 4 /* 32 bit binary */ #define TIF_32BIT 4 /* 32 bit binary */
#define TIF_MEMDIE 5 /* is terminating due to OOM killer */ #define TIF_MEMDIE 5 /* is terminating due to OOM killer */
#define TIF_RESTORE_SIGMASK 6 /* restore saved signal mask */
#define TIF_SYSCALL_AUDIT 7 /* syscall auditing active */ #define TIF_SYSCALL_AUDIT 7 /* syscall auditing active */
#define TIF_NOTIFY_RESUME 8 /* callback before returning to user */ #define TIF_NOTIFY_RESUME 8 /* callback before returning to user */
#define TIF_SINGLESTEP 9 /* single stepping? */ #define TIF_SINGLESTEP 9 /* single stepping? */

23
arch/parisc/kernel/time.c
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@ -235,9 +235,26 @@ void __init time_init(void)
cr16_hz = 100 * PAGE0->mem_10msec; /* Hz */ cr16_hz = 100 * PAGE0->mem_10msec; /* Hz */
/* register at clocksource framework */
clocksource_register_hz(&clocksource_cr16, cr16_hz);
/* register as sched_clock source */ /* register as sched_clock source */
sched_clock_register(read_cr16_sched_clock, BITS_PER_LONG, cr16_hz); sched_clock_register(read_cr16_sched_clock, BITS_PER_LONG, cr16_hz);
} }
static int __init init_cr16_clocksource(void)
{
/*
* The cr16 interval timers are not syncronized across CPUs, so mark
* them unstable and lower rating on SMP systems.
*/
if (num_online_cpus() > 1) {
clocksource_cr16.flags = CLOCK_SOURCE_UNSTABLE;
clocksource_cr16.rating = 0;
}
/* register at clocksource framework */
clocksource_register_hz(&clocksource_cr16,
100 * PAGE0->mem_10msec);
return 0;
}
device_initcall(init_cr16_clocksource);

2
arch/parisc/mm/fault.c
View File

@ -234,7 +234,7 @@ show_signal_msg(struct pt_regs *regs, unsigned long code,
tsk->comm, code, address); tsk->comm, code, address);
print_vma_addr(KERN_CONT " in ", regs->iaoq[0]); print_vma_addr(KERN_CONT " in ", regs->iaoq[0]);
pr_cont(" trap #%lu: %s%c", code, trap_name(code), pr_cont("\ntrap #%lu: %s%c", code, trap_name(code),
vma ? ',':'\n'); vma ? ',':'\n');
if (vma) if (vma)