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arm: return both physical and virtual addresses from addruart

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Rather than checking the MMU status in every instance of addruart, do it
once in kernel/debug.S, and change the existing addruart macros to
return both physical and virtual addresses. The main debug code can then
select the appropriate address to use.

This will also allow us to retreive the address of a uart for the MMU
state that we're not current in.

Updated with fixes for OMAP from Jason Wang <jason77.wang@gmail.com>
and Tony Lindgren <tony@atomide.com>, and fix for versatile express from
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>.

Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Jason Wang <jason77.wang@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
This commit is contained in:
Jeremy Kerr 2010-07-06 18:30:06 +08:00 committed by Nicolas Pitre
parent 1ea6461560
commit 0ea1293009
56 changed files with 440 additions and 454 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
arch/arm/kernel/debug.S
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@ -22,7 +22,7 @@
#if defined(CONFIG_DEBUG_ICEDCC) #if defined(CONFIG_DEBUG_ICEDCC)
@@ debug using ARM EmbeddedICE DCC channel @@ debug using ARM EmbeddedICE DCC channel
.macro addruart, rx, tmp .macro addruart, rp, rv
.endm .endm
#if defined(CONFIG_CPU_V6) #if defined(CONFIG_CPU_V6)
@ -121,6 +121,22 @@ wait: mrc p14, 0, pc, c0, c1, 0
#include <mach/debug-macro.S> #include <mach/debug-macro.S>
#endif /* CONFIG_DEBUG_ICEDCC */ #endif /* CONFIG_DEBUG_ICEDCC */
#ifdef CONFIG_MMU
.macro addruart_current, rx, tmp1, tmp2
addruart \tmp1, \tmp2
mrc p15, 0, \rx, c1, c0
tst \rx, #1
moveq \rx, \tmp1
movne \rx, \tmp2
.endm
#else /* !CONFIG_MMU */
.macro addruart_current, rx, tmp1, tmp2
addruart \rx, \tmp1
.endm
#endif /* CONFIG_MMU */
/* /*
* Useful debugging routines * Useful debugging routines
*/ */
@ -155,7 +171,7 @@ ENDPROC(printhex2)
.ltorg .ltorg
ENTRY(printascii) ENTRY(printascii)
addruart r3, r1 addruart_current r3, r1, r2
b 2f b 2f
1: waituart r2, r3 1: waituart r2, r3
senduart r1, r3 senduart r1, r3
@ -171,7 +187,7 @@ ENTRY(printascii)
ENDPROC(printascii) ENDPROC(printascii)
ENTRY(printch) ENTRY(printch)
addruart r3, r1 addruart_current r3, r1, r2
mov r1, r0 mov r1, r0
mov r0, #0 mov r0, #0
b 1b b 1b

10
arch/arm/mach-aaec2000/include/mach/debug-macro.S
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@ -10,12 +10,10 @@
*/ */
#include "hardware.h" #include "hardware.h"
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 mov \rp, 0x00000800
tst \rx, #1 @ MMU enabled? orr \rv, \rp, #io_p2v(0x80000000) @ virtual
moveq \rx, #0x80000000 @ physical orr \rp, \rp, #0x80000000 @ physical
movne \rx, #io_p2v(0x80000000) @ virtual
orr \rx, \rx, #0x00000800
.endm .endm
.macro senduart,rd,rx .macro senduart,rd,rx

8
arch/arm/mach-at91/include/mach/debug-macro.S
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@ -14,11 +14,9 @@
#include <mach/hardware.h> #include <mach/hardware.h>
#include <mach/at91_dbgu.h> #include <mach/at91_dbgu.h>
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 ldr \rp, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address)
tst \rx, #1 @ MMU enabled? ldr \rv, =(AT91_VA_BASE_SYS + AT91_DBGU) @ System peripherals (virt address)
ldreq \rx, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address)
ldrne \rx, =(AT91_VA_BASE_SYS + AT91_DBGU) @ System peripherals (virt address)
.endm .endm
.macro senduart,rd,rx .macro senduart,rd,rx

12
arch/arm/mach-clps711x/include/mach/debug-macro.S
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@ -14,16 +14,14 @@
#include <mach/hardware.h> #include <mach/hardware.h>
#include <asm/hardware/clps7111.h> #include <asm/hardware/clps7111.h>
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0
tst \rx, #1 @ MMU enabled?
moveq \rx, #CLPS7111_PHYS_BASE
movne \rx, #CLPS7111_VIRT_BASE
#ifndef CONFIG_DEBUG_CLPS711X_UART2 #ifndef CONFIG_DEBUG_CLPS711X_UART2
add \rx, \rx, #0x0000 @ UART1 mov \rp, #0x0000 @ UART1
#else #else
add \rx, \rx, #0x1000 @ UART2 mov \rp, #0x1000 @ UART2
#endif #endif
orr \rv, \rp, #CLPS7111_VIRT_BASE
orr \rp, \rp, #CLPS7111_PHYS_BASE
.endm .endm
.macro senduart,rd,rx .macro senduart,rd,rx

10
arch/arm/mach-cns3xxx/include/mach/debug-macro.S
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@ -10,12 +10,10 @@
* published by the Free Software Foundation. * published by the Free Software Foundation.
*/ */
.macro addruart,rx .macro addruart,rp,rv
mrc p15, 0, \rx, c1, c0 mov \rp, #0x00009000
tst \rx, #1 @ MMU enabled? orr \rv, \rp, #0xf0000000 @ virtual base
moveq \rx, #0x10000000 orr \rp, \rp, #0x10000000
movne \rx, #0xf0000000 @ virtual base
orr \rx, \rx, #0x00009000
.endm .endm
#include <asm/hardware/debug-pl01x.S> #include <asm/hardware/debug-pl01x.S>

46
arch/arm/mach-davinci/include/mach/debug-macro.S
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@ -29,35 +29,39 @@ davinci_uart_phys: .word 0
davinci_uart_virt: .word 0 davinci_uart_virt: .word 0
.popsection .popsection
.macro addruart, rx, tmp .macro addruart, rp, rv
/* Use davinci_uart_phys/virt if already configured */ /* Use davinci_uart_phys/virt if already configured */
10: mrc p15, 0, \rx, c1, c0 10: mrc p15, 0, \rp, c1, c0
tst \rx, #1 @ MMU enabled? tst \rp, #1 @ MMU enabled?
ldreq \rx, =__virt_to_phys(davinci_uart_phys) ldreq \rp, =__virt_to_phys(davinci_uart_phys)
ldrne \rx, =davinci_uart_virt ldrne \rp, =davinci_uart_phys
ldr \rx, [\rx] add \rv, \rp, #4 @ davinci_uart_virt
cmp \rx, #0 @ is port configured? ldr \rp, [\rp, #0]
ldr \rv, [\rv, #0]
cmp \rp, #0 @ is port configured?
cmpne \rv, #0
bne 99f @ already configured bne 99f @ already configured
mrc p15, 0, \rx, c1, c0 /* Check the debug UART address set in uncompress.h */
tst \rx, #1 @ MMU enabled? mrc p15, 0, \rp, c1, c0
tst \rp, #1 @ MMU enabled?
/* Copy uart phys address from decompressor uart info */ /* Copy uart phys address from decompressor uart info */
ldreq \tmp, =__virt_to_phys(davinci_uart_phys) ldreq \rv, =__virt_to_phys(davinci_uart_phys)
ldrne \tmp, =davinci_uart_phys ldrne \rv, =davinci_uart_phys
ldreq \rx, =DAVINCI_UART_INFO ldreq \rp, =DAVINCI_UART_INFO
ldrne \rx, =__phys_to_virt(DAVINCI_UART_INFO) ldrne \rp, =__phys_to_virt(DAVINCI_UART_INFO)
ldr \rx, [\rx, #0] ldr \rp, [\rp, #0]
str \rx, [\tmp] str \rp, [\rv]
/* Copy uart virt address from decompressor uart info */ /* Copy uart virt address from decompressor uart info */
ldreq \tmp, =__virt_to_phys(davinci_uart_virt) ldreq \rv, =__virt_to_phys(davinci_uart_virt)
ldrne \tmp, =davinci_uart_virt ldrne \rv, =davinci_uart_virt
ldreq \rx, =DAVINCI_UART_INFO ldreq \rp, =DAVINCI_UART_INFO
ldrne \rx, =__phys_to_virt(DAVINCI_UART_INFO) ldrne \rp, =__phys_to_virt(DAVINCI_UART_INFO)
ldr \rx, [\rx, #4] ldr \rp, [\rp, #4]
str \rx, [\tmp] str \rp, [\rv]
b 10b b 10b
99: 99:

11
arch/arm/mach-dove/include/mach/debug-macro.S
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@ -8,12 +8,11 @@
#include <mach/bridge-regs.h> #include <mach/bridge-regs.h>
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 ldr \rp, =DOVE_SB_REGS_PHYS_BASE
tst \rx, #1 @ MMU enabled? ldr \rv, =DOVE_SB_REGS_VIRT_BASE
ldreq \rx, =DOVE_SB_REGS_PHYS_BASE orr \rp, \rp, #0x00012000
ldrne \rx, =DOVE_SB_REGS_VIRT_BASE orr \rv, \rv, #0x00012000
orr \rx, \rx, #0x00012000
.endm .endm
#define UART_SHIFT 2 #define UART_SHIFT 2

7
arch/arm/mach-ebsa110/include/mach/debug-macro.S
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@ -11,9 +11,10 @@
* *
**/ **/
.macro addruart, rx, tmp .macro addruart, rp, rv
mov \rx, #0xf0000000 mov \rp, #0xf0000000
orr \rx, \rx, #0x00000be0 orr \rp, \rp, #0x00000be0
mov \rp, \rv
.endm .endm
#define UART_SHIFT 2 #define UART_SHIFT 2

11
arch/arm/mach-ep93xx/include/mach/debug-macro.S
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@ -11,12 +11,11 @@
*/ */
#include <mach/ep93xx-regs.h> #include <mach/ep93xx-regs.h>
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 ldr \rp, =EP93XX_APB_PHYS_BASE @ Physical base
tst \rx, #1 @ MMU enabled? ldr \rv, =EP93XX_APB_VIRT_BASE @ virtual base
ldreq \rx, =EP93XX_APB_PHYS_BASE @ Physical base orr \rp, \rp, #0x000c0000
ldrne \rx, =EP93XX_APB_VIRT_BASE @ virtual base orr \rv, \rv, #0x000c0000
orr \rx, \rx, #0x000c0000
.endm .endm
#include <asm/hardware/debug-pl01x.S> #include <asm/hardware/debug-pl01x.S>

22
arch/arm/mach-footbridge/include/mach/debug-macro.S
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@ -15,12 +15,10 @@
#ifndef CONFIG_DEBUG_DC21285_PORT #ifndef CONFIG_DEBUG_DC21285_PORT
/* For NetWinder debugging */ /* For NetWinder debugging */
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 mov \rp, #0x000003f8
tst \rx, #1 @ MMU enabled? orr \rv, \rp, #0x7c000000 @ physical
moveq \rx, #0x7c000000 @ physical orr \rp, \rp, #0xff000000 @ virtual
movne \rx, #0xff000000 @ virtual
orr \rx, \rx, #0x000003f8
.endm .endm
#define UART_SHIFT 0 #define UART_SHIFT 0
@ -32,14 +30,14 @@
.equ dc21285_high, ARMCSR_BASE & 0xff000000 .equ dc21285_high, ARMCSR_BASE & 0xff000000
.equ dc21285_low, ARMCSR_BASE & 0x00ffffff .equ dc21285_low, ARMCSR_BASE & 0x00ffffff
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0
tst \rx, #1 @ MMU enabled?
moveq \rx, #0x42000000
movne \rx, #dc21285_high
.if dc21285_low .if dc21285_low
orrne \rx, \rx, #dc21285_low mov \rp, #dc21285_low
.else
mov \rp, #0
.endif .endif
orr \rv, \rp, #0x42000000
orr \rp, \rp, #dc21285_high
.endm .endm
.macro senduart,rd,rx .macro senduart,rd,rx

8
arch/arm/mach-gemini/include/mach/debug-macro.S
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@ -11,11 +11,9 @@
*/ */
#include <mach/hardware.h> #include <mach/hardware.h>
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 ldr \rp, =GEMINI_UART_BASE @ physical
tst \rx, #1 @ MMU enabled? ldr \rv, =IO_ADDRESS(GEMINI_UART_BASE) @ virtual
ldreq \rx, =GEMINI_UART_BASE @ physical
ldrne \rx, =IO_ADDRESS(GEMINI_UART_BASE) @ virtual
.endm .endm
#define UART_SHIFT 2 #define UART_SHIFT 2

10
arch/arm/mach-h720x/include/mach/debug-macro.S
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@ -16,12 +16,10 @@
.equ io_virt, IO_VIRT .equ io_virt, IO_VIRT
.equ io_phys, IO_PHYS .equ io_phys, IO_PHYS
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 mov \rp, #0x00020000 @ UART1
tst \rx, #1 @ MMU enabled? add \rv, \rp, #io_virt @ virtual address
moveq \rx, #io_phys @ physical base address add \rp, \rp, #io_phys @ physical base address
movne \rx, #io_virt @ virtual address
add \rx, \rx, #0x00020000 @ UART1
.endm .endm
.macro senduart,rd,rx .macro senduart,rd,rx

10
arch/arm/mach-integrator/include/mach/debug-macro.S
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@ -11,12 +11,10 @@
* *
*/ */
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 mov \rp, #0x16000000 @ physical base address
tst \rx, #1 @ MMU enabled? mov \rv, #0xf0000000 @ virtual base
moveq \rx, #0x16000000 @ physical base address add \rv, \rv, #0x16000000 >> 4
movne \rx, #0xf0000000 @ virtual base
addne \rx, \rx, #0x16000000 >> 4
.endm .endm
#include <asm/hardware/debug-pl01x.S> #include <asm/hardware/debug-pl01x.S>

16
arch/arm/mach-iop13xx/include/mach/debug-macro.S
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@ -11,15 +11,13 @@
* published by the Free Software Foundation. * published by the Free Software Foundation.
*/ */
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 mov \rp, #0x00002300
tst \rx, #1 @ mmu enabled? orr \rp, \rp, #0x00000040
moveq \rx, #0xff000000 @ physical orr \rv, \rp, #0xfe000000 @ virtual
orreq \rx, \rx, #0x00d80000 orr \rv, \rv, #0x00e80000
movne \rx, #0xfe000000 @ virtual orr \rp, \rp, #0xff000000 @ physical
orrne \rx, \rx, #0x00e80000 orr \rp, \rp, #0x00d80000
orr \rx, \rx, #0x00002300
orr \rx, \rx, #0x00000040
.endm .endm
#define UART_SHIFT 2 #define UART_SHIFT 2

7
arch/arm/mach-iop32x/include/mach/debug-macro.S
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@ -11,9 +11,10 @@
* published by the Free Software Foundation. * published by the Free Software Foundation.
*/ */
.macro addruart, rx, tmp .macro addruart, rp, rv
mov \rx, #0xfe000000 @ physical as well as virtual mov \rp, #0xfe000000 @ physical as well as virtual
orr \rx, \rx, #0x00800000 @ location of the UART orr \rp, \rp, #0x00800000 @ location of the UART
mov \rv, \rp
.endm .endm
#define UART_SHIFT 0 #define UART_SHIFT 0

12
arch/arm/mach-iop33x/include/mach/debug-macro.S
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@ -11,13 +11,11 @@
* published by the Free Software Foundation. * published by the Free Software Foundation.
*/ */
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 mov \rp, #0x00ff0000
tst \rx, #1 @ mmu enabled? orr \rp, \rp, #0x0000f700
moveq \rx, #0xff000000 @ physical orr \rv, #0xfe000000 @ virtual
movne \rx, #0xfe000000 @ virtual orr \rp, #0xff000000 @ physical
orr \rx, \rx, #0x00ff0000
orr \rx, \rx, #0x0000f700
.endm .endm
#define UART_SHIFT 2 #define UART_SHIFT 2

14
arch/arm/mach-ixp2000/include/mach/debug-macro.S
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@ -11,16 +11,14 @@
* *
*/ */
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 mov \rp, #0x00030000
tst \rx, #1 @ MMU enabled?
moveq \rx, #0xc0000000 @ Physical base
movne \rx, #0xfe000000 @ virtual base
orrne \rx, \rx, #0x00f00000
orr \rx, \rx, #0x00030000
#ifdef __ARMEB__ #ifdef __ARMEB__
orr \rx, \rx, #0x00000003 orr \rp, \rp, #0x00000003
#endif #endif
orr \rv, \rp, #0xfe000000 @ virtual base
orr \rv, \rv, #0x00f00000
orr \rp, \rp, #0xc0000000 @ Physical base
.endm .endm
#define UART_SHIFT 2 #define UART_SHIFT 2

11
arch/arm/mach-ixp23xx/include/mach/debug-macro.S
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@ -12,13 +12,12 @@
*/ */
#include <mach/ixp23xx.h> #include <mach/ixp23xx.h>
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 ldr \rp, =IXP23XX_PERIPHERAL_PHYS @ physical
tst \rx, #1 @ mmu enabled? ldr \rv, =IXP23XX_PERIPHERAL_VIRT @ virtual
ldreq \rx, =IXP23XX_PERIPHERAL_PHYS @ physical
ldrne \rx, =IXP23XX_PERIPHERAL_VIRT @ virtual
#ifdef __ARMEB__ #ifdef __ARMEB__
orr \rx, \rx, #0x00000003 orr \rp, \rp, #0x00000003
orr \rv, \rv, #0x00000003
#endif #endif
.endm .endm

16
arch/arm/mach-ixp4xx/include/mach/debug-macro.S
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@ -10,16 +10,16 @@
* published by the Free Software Foundation. * published by the Free Software Foundation.
*/ */
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0
tst \rx, #1 @ MMU enabled?
moveq \rx, #0xc8000000
movne \rx, #0xff000000
orrne \rx, \rx, #0x00b00000
#ifdef __ARMEB__ #ifdef __ARMEB__
add \rx,\rx,#3 @ Uart regs are at off set of 3 if mov \rp, #3 @ Uart regs are at off set of 3 if
@ byte writes used - Big Endian. @ byte writes used - Big Endian.
#else
mov \rp, #0
#endif #endif
orr \rv, \rp, #0xff000000 @ virtual
orr \rv, \rv, #0x00b00000
orr \rp, \rp, #0xc8000000 @ physical
.endm .endm
#define UART_SHIFT 2 #define UART_SHIFT 2

11
arch/arm/mach-kirkwood/include/mach/debug-macro.S
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@ -8,12 +8,11 @@
#include <mach/bridge-regs.h> #include <mach/bridge-regs.h>
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 ldr \rp, =KIRKWOOD_REGS_PHYS_BASE
tst \rx, #1 @ MMU enabled? ldr \rv, =KIRKWOOD_REGS_VIRT_BASE
ldreq \rx, =KIRKWOOD_REGS_PHYS_BASE orr \rp, \rp, #0x00012000
ldrne \rx, =KIRKWOOD_REGS_VIRT_BASE orr \rv, \rv, #0x00012000
orr \rx, \rx, #0x00012000
.endm .endm
#define UART_SHIFT 2 #define UART_SHIFT 2

8
arch/arm/mach-ks8695/include/mach/debug-macro.S
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@ -14,11 +14,9 @@
#include <mach/hardware.h> #include <mach/hardware.h>
#include <mach/regs-uart.h> #include <mach/regs-uart.h>
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 ldr \rp, =KS8695_UART_PA @ physical base address
tst \rx, #1 @ MMU enabled? ldr \rv, =KS8695_UART_VA @ virtual base address
ldreq \rx, =KS8695_UART_PA @ physical base address
ldrne \rx, =KS8695_UART_VA @ virtual base address
.endm .endm
.macro senduart, rd, rx .macro senduart, rd, rx

38
arch/arm/mach-l7200/include/mach/debug-macro.S Normal file
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@ -0,0 +1,38 @@
/* arch/arm/mach-l7200/include/mach/debug-macro.S
*
* Debugging macro include header
*
* Copyright (C) 1994-1999 Russell King
* Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
.equ io_virt, IO_BASE
.equ io_phys, IO_START
.macro addruart, rp, rv
mov \rp, #0x00044000 @ UART1
@ mov \rp, #0x00045000 @ UART2
add \rv, \rp, #io_virt @ virtual address
add \rp, \rp, #io_phys @ physical base address
.endm
.macro senduart,rd,rx
str \rd, [\rx, #0x0] @ UARTDR
.endm
.macro waituart,rd,rx
1001: ldr \rd, [\rx, #0x18] @ UARTFLG
tst \rd, #1 << 5 @ UARTFLGUTXFF - 1 when full
bne 1001b
.endm
.macro busyuart,rd,rx
1001: ldr \rd, [\rx, #0x18] @ UARTFLG
tst \rd, #1 << 3 @ UARTFLGUBUSY - 1 when busy
bne 1001b
.endm

10
arch/arm/mach-lh7a40x/include/mach/debug-macro.S
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@ -14,12 +14,10 @@
@ It is not known if this will be appropriate for every 40x @ It is not known if this will be appropriate for every 40x
@ board. @ board.
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 mov \rp, #0x00000700 @ offset from base
tst \rx, #1 @ MMU enabled? orr \rv, \rp, #0xf8000000 @ virtual base
mov \rx, #0x00000700 @ offset from base orr \rp, \rp, #0x80000000 @ physical base
orreq \rx, \rx, #0x80000000 @ physical base
orrne \rx, \rx, #0xf8000000 @ virtual base
.endm .endm
.macro senduart,rd,rx .macro senduart,rd,rx

11
arch/arm/mach-loki/include/mach/debug-macro.S
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@ -8,12 +8,11 @@
#include <mach/loki.h> #include <mach/loki.h>
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 ldr \rp, =LOKI_REGS_PHYS_BASE
tst \rx, #1 @ MMU enabled? ldr \rv, =LOKI_REGS_VIRT_BASE
ldreq \rx, =LOKI_REGS_PHYS_BASE orr \rp, \rp, #0x00012000
ldrne \rx, =LOKI_REGS_VIRT_BASE orr \rv, \rv, #0x00012000
orr \rx, \rx, #0x00012000
.endm .endm
#define UART_SHIFT 2 #define UART_SHIFT 2

8
arch/arm/mach-lpc32xx/include/mach/debug-macro.S
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@ -20,11 +20,9 @@
* Debug output is hardcoded to standard UART 5 * Debug output is hardcoded to standard UART 5
*/ */
.macro addruart,rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 ldreq \rp, =0x40090000
tst \rx, #1 @ MMU enabled? ldrne \rv, =0xF4090000
ldreq \rx, =0x40090000
ldrne \rx, =0xF4090000
.endm .endm
#define UART_SHIFT 2 #define UART_SHIFT 2

11
arch/arm/mach-mmp/include/mach/debug-macro.S
View File

@ -11,12 +11,11 @@
#include <mach/addr-map.h> #include <mach/addr-map.h>
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 ldr \rp, =APB_PHYS_BASE @ physical
tst \rx, #1 @ MMU enabled? ldr \rv, =APB_VIRT_BASE @ virtual
ldreq \rx, =APB_PHYS_BASE @ physical orr \rp, \rp, #0x00017000
ldrne \rx, =APB_VIRT_BASE @ virtual orr \rv, \rv, #0x00017000
orr \rx, \rx, #0x00017000
.endm .endm
#define UART_SHIFT 2 #define UART_SHIFT 2

20
arch/arm/mach-msm/include/mach/debug-macro.S
View File

@ -20,12 +20,9 @@
#include <mach/msm_iomap.h> #include <mach/msm_iomap.h>
#ifdef CONFIG_HAS_MSM_DEBUG_UART_PHYS #ifdef CONFIG_HAS_MSM_DEBUG_UART_PHYS
.macro addruart, rx, tmp .macro addruart, rp, rv
@ see if the MMU is enabled and select appropriate base address ldr \rp, =MSM_DEBUG_UART_PHYS
mrc p15, 0, \rx, c1, c0 ldr \rv, =MSM_DEBUG_UART_BASE
tst \rx, #1
ldreq \rx, =MSM_DEBUG_UART_PHYS
ldrne \rx, =MSM_DEBUG_UART_BASE
.endm .endm
.macro senduart,rd,rx .macro senduart,rd,rx
@ -39,16 +36,7 @@
tst \rd, #0x04 tst \rd, #0x04
beq 1001b beq 1001b
.endm .endm
#else
.macro addruart, rx, tmp
.endm
.macro senduart,rd,rx
.endm
.macro waituart,rd,rx
.endm
#endif
.macro busyuart,rd,rx .macro busyuart,rd,rx
.endm .endm
#endif

11
arch/arm/mach-mv78xx0/include/mach/debug-macro.S
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@ -8,12 +8,11 @@
#include <mach/mv78xx0.h> #include <mach/mv78xx0.h>
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 ldr \rp, =MV78XX0_REGS_PHYS_BASE
tst \rx, #1 @ MMU enabled? ldr \rv, =MV78XX0_REGS_VIRT_BASE
ldreq \rx, =MV78XX0_REGS_PHYS_BASE orr \rp, \rp, #0x00012000
ldrne \rx, =MV78XX0_REGS_VIRT_BASE orr \rv, \rv, #0x00012000
orr \rx, \rx, #0x00012000
.endm .endm
#define UART_SHIFT 2 #define UART_SHIFT 2

10
arch/arm/mach-netx/include/mach/debug-macro.S
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@ -13,12 +13,10 @@
#include "hardware.h" #include "hardware.h"
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 mov \rp, #0x00000a00
tst \rx, #1 @ MMU enabled? orr \rv, \rp, #io_p2v(0x00100000) @ virtual
moveq \rx, #0x00100000 @ physical orr \rp, \rp, #0x00100000 @ physical
movne \rx, #io_p2v(0x00100000) @ virtual
orr \rx, \rx, #0x00000a00
.endm .endm
.macro senduart,rd,rx .macro senduart,rd,rx

12
arch/arm/mach-nomadik/include/mach/debug-macro.S
View File

@ -10,13 +10,11 @@
* *
*/ */
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 mov \rp, #0x00100000
tst \rx, #1 @ MMU enabled? add \rp, \rp, #0x000fb000
moveq \rx, #0x10000000 @ physical base address add \rv, \rp, #0xf0000000 @ virtual base
movne \rx, #0xf0000000 @ virtual base add \rp, \rp, #0x10000000 @ physical base address
add \rx, \rx, #0x00100000
add \rx, \rx, #0x000fb000
.endm .endm
#include <asm/hardware/debug-pl01x.S> #include <asm/hardware/debug-pl01x.S>

8
arch/arm/mach-ns9xxx/include/mach/debug-macro.S
View File

@ -12,11 +12,9 @@
#include <mach/regs-board-a9m9750dev.h> #include <mach/regs-board-a9m9750dev.h>
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 ldr \rp, =NS9XXX_CSxSTAT_PHYS(0)
tst \rx, #1 ldr \rv, =io_p2v(NS9XXX_CSxSTAT_PHYS(0))
ldreq \rx, =NS9XXX_CSxSTAT_PHYS(0)
ldrne \rx, =io_p2v(NS9XXX_CSxSTAT_PHYS(0))
.endm .endm
#define UART_SHIFT 2 #define UART_SHIFT 2

68
arch/arm/mach-omap1/include/mach/debug-macro.S
View File

@ -28,56 +28,58 @@ omap_uart_virt: .word 0x0
* the desired UART phys and virt addresses temporarily into * the desired UART phys and virt addresses temporarily into
* the omap_uart_phys and omap_uart_virt above. * the omap_uart_phys and omap_uart_virt above.
*/ */
.macro addruart, rx, tmp .macro addruart, rp, rv
/* Use omap_uart_phys/virt if already configured */ /* Use omap_uart_phys/virt if already configured */
9: mrc p15, 0, \rx, c1, c0 9: mrc p15, 0, \rp, c1, c0
tst \rx, #1 @ MMU enabled? tst \rp, #1 @ MMU enabled?
ldreq \rx, =__virt_to_phys(omap_uart_phys) @ physical base address ldreq \rp, =__virt_to_phys(omap_uart_phys) @ MMU not enabled
ldrne \rx, =omap_uart_virt @ virtual base ldrne \rp, =omap_uart_phys @ MMU enabled
ldr \rx, [\rx, #0] add \rv, \rp, #4 @ omap_uart_virt
cmp \rx, #0 @ is port configured? ldr \rp, [\rp, #0]
ldr \rv, [\rv, #0]
cmp \rp, #0 @ is port configured?
cmpne \rv, #0
bne 99f @ already configured bne 99f @ already configured
/* Check the debug UART configuration set in uncompress.h */ /* Check the debug UART configuration set in uncompress.h */
mrc p15, 0, \rx, c1, c0 mrc p15, 0, \rp, c1, c0
tst \rx, #1 @ MMU enabled? tst \rp, #1 @ MMU enabled?
ldreq \rx, =OMAP_UART_INFO ldreq \rp, =OMAP_UART_INFO @ MMU not enabled
ldrne \rx, =__phys_to_virt(OMAP_UART_INFO) ldrne \rp, =__phys_to_virt(OMAP_UART_INFO) @ MMU enabled
ldr \rx, [\rx, #0] ldr \rp, [\rp, #0]
/* Select the UART to use based on the UART1 scratchpad value */ /* Select the UART to use based on the UART1 scratchpad value */
10: cmp \rx, #0 @ no port configured? 10: cmp \rp, #0 @ no port configured?
beq 11f @ if none, try to use UART1 beq 11f @ if none, try to use UART1
cmp \rx, #OMAP1UART1 cmp \rp, #OMAP1UART1
beq 11f @ configure OMAP1UART1 beq 11f @ configure OMAP1UART1
cmp \rx, #OMAP1UART2 cmp \rp, #OMAP1UART2
beq 12f @ configure OMAP1UART2 beq 12f @ configure OMAP1UART2
cmp \rx, #OMAP1UART3 cmp \rp, #OMAP1UART3
beq 13f @ configure OMAP2UART3 beq 13f @ configure OMAP2UART3
/* Configure the UART offset from the phys/virt base */ /* Configure the UART offset from the phys/virt base */
11: mov \rx, #0x00fb0000 @ OMAP1UART1 11: mov \rp, #0x00fb0000 @ OMAP1UART1
b 98f b 98f
12: mov \rx, #0x00fb0000 @ OMAP1UART1 12: mov \rp, #0x00fb0000 @ OMAP1UART1
orr \rx, \rx, #0x00000800 @ OMAP1UART2 orr \rp, \rp, #0x00000800 @ OMAP1UART2
b 98f b 98f
13: mov \rx, #0x00fb0000 @ OMAP1UART1 13: mov \rp, #0x00fb0000 @ OMAP1UART1
orr \rx, \rx, #0x00000800 @ OMAP1UART2 orr \rp, \rp, #0x00000800 @ OMAP1UART2
orr \rx, \rx, #0x00009000 @ OMAP1UART3 orr \rp, \rp, #0x00009000 @ OMAP1UART3
/* Store both phys and virt address for the uart */ /* Store both phys and virt address for the uart */
98: add \rx, \rx, #0xff000000 @ phys base 98: add \rp, \rp, #0xff000000 @ phys base
mrc p15, 0, \tmp, c1, c0 mrc p15, 0, \rv, c1, c0
tst \tmp, #1 @ MMU enabled? tst \rv, #1 @ MMU enabled?
ldreq \tmp, =__virt_to_phys(omap_uart_phys) ldreq \rv, =__virt_to_phys(omap_uart_phys) @ MMU not enabled
ldrne \tmp, =omap_uart_phys ldrne \rv, =omap_uart_phys @ MMU enabled
str \rx, [\tmp, #0] str \rp, [\rv, #0]
sub \rx, \rx, #0xff000000 @ phys base sub \rp, \rp, #0xff000000 @ phys base
add \rx, \rx, #0xfe000000 @ virt base add \rp, \rp, #0xfe000000 @ virt base
ldreq \tmp, =__virt_to_phys(omap_uart_virt) add \rv, \rv, #4 @ omap_uart_lsr
ldrne \tmp, =omap_uart_virt str \rp, [\rv, #0]
str \rx, [\tmp, #0]
b 9b b 9b
99: 99:
.endm .endm

127
arch/arm/mach-omap2/include/mach/debug-macro.S
View File

@ -31,95 +31,94 @@ omap_uart_lsr: .word 0
* the desired UART phys and virt addresses temporarily into * the desired UART phys and virt addresses temporarily into
* the omap_uart_phys and omap_uart_virt above. * the omap_uart_phys and omap_uart_virt above.
*/ */
.macro addruart, rx, tmp .macro addruart, rp, rv
/* Use omap_uart_phys/virt if already configured */ /* Use omap_uart_phys/virt if already configured */
10: mrc p15, 0, \rx, c1, c0 10: mrc p15, 0, \rp, c1, c0
tst \rx, #1 @ MMU enabled? tst \rp, #1 @ MMU enabled?
ldreq \rx, =__virt_to_phys(omap_uart_phys) @ physical base address ldreq \rp, =__virt_to_phys(omap_uart_phys) @ MMU not enabled
ldrne \rx, =omap_uart_virt @ virtual base address ldrne \rp, =omap_uart_phys @ MMU enabled
ldr \rx, [\rx, #0] add \rv, \rp, #4 @ omap_uart_virt
cmp \rx, #0 @ is port configured? ldr \rp, [\rp, #0]
ldr \rv, [\rv, #0]
cmp \rp, #0 @ is port configured?
cmpne \rv, #0
bne 99f @ already configured bne 99f @ already configured
/* Check the debug UART configuration set in uncompress.h */ /* Check the debug UART configuration set in uncompress.h */
mrc p15, 0, \rx, c1, c0 mrc p15, 0, \rp, c1, c0
tst \rx, #1 @ MMU enabled? tst \rp, #1 @ MMU enabled?
ldreq \rx, =OMAP_UART_INFO ldreq \rp, =OMAP_UART_INFO @ MMU not enabled
ldrne \rx, =__phys_to_virt(OMAP_UART_INFO) ldrne \rp, =__phys_to_virt(OMAP_UART_INFO) @ MMU enabled
ldr \rx, [\rx, #0] ldr \rp, [\rp, #0]
/* Select the UART to use based on the UART1 scratchpad value */ /* Select the UART to use based on the UART1 scratchpad value */
cmp \rx, #0 @ no port configured? cmp \rp, #0 @ no port configured?
beq 21f @ if none, try to use UART1 beq 21f @ if none, try to use UART1
cmp \rx, #OMAP2UART1 @ OMAP2/3/4UART1 cmp \rp, #OMAP2UART1 @ OMAP2/3/4UART1
beq 21f @ configure OMAP2/3/4UART1 beq 21f @ configure OMAP2/3/4UART1
cmp \rx, #OMAP2UART2 @ OMAP2/3/4UART2 cmp \rp, #OMAP2UART2 @ OMAP2/3/4UART2
beq 22f @ configure OMAP2/3/4UART2 beq 22f @ configure OMAP2/3/4UART2
cmp \rx, #OMAP2UART3 @ only on 24xx cmp \rp, #OMAP2UART3 @ only on 24xx
beq 23f @ configure OMAP2UART3 beq 23f @ configure OMAP2UART3
cmp \rx, #OMAP3UART3 @ only on 34xx cmp \rp, #OMAP3UART3 @ only on 34xx
beq 33f @ configure OMAP3UART3 beq 33f @ configure OMAP3UART3
cmp \rx, #OMAP4UART3 @ only on 44xx cmp \rp, #OMAP4UART3 @ only on 44xx
beq 43f @ configure OMAP4UART3 beq 43f @ configure OMAP4UART3
cmp \rx, #OMAP3UART4 @ only on 36xx cmp \rp, #OMAP3UART4 @ only on 36xx
beq 34f @ configure OMAP3UART4 beq 34f @ configure OMAP3UART4
cmp \rx, #OMAP4UART4 @ only on 44xx cmp \rp, #OMAP4UART4 @ only on 44xx
beq 44f @ configure OMAP4UART4 beq 44f @ configure OMAP4UART4
cmp \rx, #ZOOM_UART @ only on zoom2/3 cmp \rp, #ZOOM_UART @ only on zoom2/3
beq 95f @ configure ZOOM_UART beq 95f @ configure ZOOM_UART
/* Configure the UART offset from the phys/virt base */ /* Configure the UART offset from the phys/virt base */
21: mov \rx, #UART_OFFSET(OMAP2_UART1_BASE) @ omap2/3/4 21: mov \rp, #UART_OFFSET(OMAP2_UART1_BASE) @ omap2/3/4
b 98f b 98f
22: mov \rx, #UART_OFFSET(OMAP2_UART2_BASE) @ omap2/3/4 22: mov \rp, #UART_OFFSET(OMAP2_UART2_BASE) @ omap2/3/4
b 98f b 98f
23: mov \rx, #UART_OFFSET(OMAP2_UART3_BASE) 23: mov \rp, #UART_OFFSET(OMAP2_UART3_BASE)
b 98f b 98f
33: mov \rx, #UART_OFFSET(OMAP3_UART1_BASE) 33: mov \rp, #UART_OFFSET(OMAP3_UART1_BASE)
add \rx, \rx, #0x00fb0000 add \rp, \rp, #0x00fb0000
add \rx, \rx, #0x00006000 @ OMAP3_UART3_BASE add \rp, \rp, #0x00006000 @ OMAP3_UART3_BASE
b 98f b 98f
34: mov \rx, #UART_OFFSET(OMAP3_UART1_BASE) 34: mov \rp, #UART_OFFSET(OMAP3_UART1_BASE)
add \rx, \rx, #0x00fb0000 add \rp, \rp, #0x00fb0000
add \rx, \rx, #0x00028000 @ OMAP3_UART4_BASE add \rp, \rp, #0x00028000 @ OMAP3_UART4_BASE
b 98f b 98f
43: mov \rx, #UART_OFFSET(OMAP4_UART3_BASE) 43: mov \rp, #UART_OFFSET(OMAP4_UART3_BASE)
b 98f b 98f
44: mov \rx, #UART_OFFSET(OMAP4_UART4_BASE) 44: mov \rp, #UART_OFFSET(OMAP4_UART4_BASE)
b 98f b 98f
95: ldr \rx, =ZOOM_UART_BASE 95: ldr \rp, =ZOOM_UART_BASE
mrc p15, 0, \tmp, c1, c0 mrc p15, 0, \rv, c1, c0
tst \tmp, #1 @ MMU enabled? tst \rv, #1 @ MMU enabled?
ldreq \tmp, =__virt_to_phys(omap_uart_phys) ldreq \rv, =__virt_to_phys(omap_uart_phys) @ MMU not enabled
ldrne \tmp, =omap_uart_phys ldrne \rv, =omap_uart_phys @ MMU enabled
str \rx, [\tmp, #0] str \rp, [\rv, #0]
ldr \rx, =ZOOM_UART_VIRT ldr \rp, =ZOOM_UART_VIRT
ldreq \tmp, =__virt_to_phys(omap_uart_virt) add \rv, \rv, #4 @ omap_uart_virt
ldrne \tmp, =omap_uart_virt str \rp, [\rv, #0]
str \rx, [\tmp, #0] mov \rp, #(UART_LSR << ZOOM_PORT_SHIFT)
mov \rx, #(UART_LSR << ZOOM_PORT_SHIFT) add \rv, \rv, #4 @ omap_uart_lsr
ldreq \tmp, =__virt_to_phys(omap_uart_lsr) str \rp, [\rv, #0]
ldrne \tmp, =omap_uart_lsr
str \rx, [\tmp, #0]
b 10b b 10b
/* Store both phys and virt address for the uart */ /* Store both phys and virt address for the uart */
98: add \rx, \rx, #0x48000000 @ phys base 98: add \rp, \rp, #0x48000000 @ phys base
mrc p15, 0, \tmp, c1, c0 mrc p15, 0, \rv, c1, c0
tst \tmp, #1 @ MMU enabled? tst \rv, #1 @ MMU enabled?
ldreq \tmp, =__virt_to_phys(omap_uart_phys) ldreq \rv, =__virt_to_phys(omap_uart_phys) @ MMU not enabled
ldrne \tmp, =omap_uart_phys ldrne \rv, =omap_uart_phys @ MMU enabled
str \rx, [\tmp, #0] str \rp, [\rv, #0]
sub \rx, \rx, #0x48000000 @ phys base sub \rp, \rp, #0x48000000 @ phys base
add \rx, \rx, #0xfa000000 @ virt base add \rp, \rp, #0xfa000000 @ virt base
ldreq \tmp, =__virt_to_phys(omap_uart_virt) add \rv, \rv, #4 @ omap_uart_virt
ldrne \tmp, =omap_uart_virt str \rp, [\rv, #0]
str \rx, [\tmp, #0] mov \rp, #(UART_LSR << OMAP_PORT_SHIFT)
mov \rx, #(UART_LSR << OMAP_PORT_SHIFT) add \rv, \rv, #4 @ omap_uart_lsr
ldreq \tmp, =__virt_to_phys(omap_uart_lsr) str \rp, [\rv, #0]
ldrne \tmp, =omap_uart_lsr
str \rx, [\tmp, #0]
b 10b b 10b
99: 99:
@ -131,9 +130,9 @@ omap_uart_lsr: .word 0
.macro busyuart,rd,rx .macro busyuart,rd,rx
1001: mrc p15, 0, \rd, c1, c0 1001: mrc p15, 0, \rd, c1, c0
tst \rd, #1 @ MMU enabled? tst \rd, #1 @ MMU enabled?
ldreq \rd, =__virt_to_phys(omap_uart_lsr) ldreq \rd, =__virt_to_phys(omap_uart_lsr) @ MMU not enabled
ldrne \rd, =omap_uart_lsr ldrne \rd, =omap_uart_lsr @ MMU enabled
ldr \rd, [\rd, #0] ldr \rd, [\rd, #0]
ldrb \rd, [\rx, \rd] ldrb \rd, [\rx, \rd]
and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE) and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE)

11
arch/arm/mach-orion5x/include/mach/debug-macro.S
View File

@ -10,12 +10,11 @@
#include <mach/orion5x.h> #include <mach/orion5x.h>
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 ldr \rp, =ORION5X_REGS_PHYS_BASE
tst \rx, #1 @ MMU enabled? ldr \rv, =ORION5X_REGS_VIRT_BASE
ldreq \rx, =ORION5X_REGS_PHYS_BASE orr \rp, \rp, #0x00012000
ldrne \rx, =ORION5X_REGS_VIRT_BASE orr \rv, \rv, #0x00012000
orr \rx, \rx, #0x00012000
.endm .endm
#define UART_SHIFT 2 #define UART_SHIFT 2

10
arch/arm/mach-pnx4008/include/mach/debug-macro.S
View File

@ -11,12 +11,10 @@
* *
*/ */
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 mov \rp, #0x00090000
tst \rx, #1 @ MMU enabled? add \rv, \rp, #0xf4000000 @ virtual
mov \rx, #0x00090000 add \rp, \rp, #0x40000000 @ physical
addeq \rx, \rx, #0x40000000
addne \rx, \rx, #0xf4000000
.endm .endm
#define UART_SHIFT 2 #define UART_SHIFT 2

10
arch/arm/mach-pxa/include/mach/debug-macro.S
View File

@ -13,12 +13,10 @@
#include "hardware.h" #include "hardware.h"
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 mov \rp, #0x00100000
tst \rx, #1 @ MMU enabled? orr \rv, \rp, #io_p2v(0x40000000) @ virtual
moveq \rx, #0x40000000 @ physical orr \rp, \rp, #0x40000000 @ physical
movne \rx, #io_p2v(0x40000000) @ virtual
orr \rx, \rx, #0x00100000
.endm .endm
#define UART_SHIFT 2 #define UART_SHIFT 2

10
arch/arm/mach-realview/include/mach/debug-macro.S
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@ -33,12 +33,10 @@
#error "Unknown RealView platform" #error "Unknown RealView platform"
#endif #endif
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 mov \rp, #DEBUG_LL_UART_OFFSET
tst \rx, #1 @ MMU enabled? orr \rv, \rp, #0xfb000000 @ virtual base
moveq \rx, #0x10000000 orr \rp, \rp, #0x10000000 @ physical base
movne \rx, #0xfb000000 @ virtual base
orr \rx, \rx, #DEBUG_LL_UART_OFFSET
.endm .endm
#include <asm/hardware/debug-pl01x.S> #include <asm/hardware/debug-pl01x.S>

12
arch/arm/mach-rpc/include/mach/debug-macro.S
View File

@ -11,13 +11,11 @@
* *
*/ */
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 mov \rp, #0x00010000
tst \rx, #1 @ MMU enabled? orr \rp, \rp, #0x00000fe0
moveq \rx, #0x03000000 orr \rv, \rp, #0xe0000000 @ virtual
movne \rx, #0xe0000000 orr \rp, \rp, #0x03000000 @ physical
orr \rx, \rx, #0x00010000
orr \rx, \rx, #0x00000fe0
.endm .endm
#define UART_SHIFT 2 #define UART_SHIFT 2

11
arch/arm/mach-s3c2410/include/mach/debug-macro.S
View File

@ -19,13 +19,12 @@
#define S3C2410_UART1_OFF (0x4000) #define S3C2410_UART1_OFF (0x4000)
#define SHIFT_2440TXF (14-9) #define SHIFT_2440TXF (14-9)
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 ldr \rp, = S3C24XX_PA_UART
tst \rx, #1 ldr \rv, = S3C24XX_VA_UART
ldreq \rx, = S3C24XX_PA_UART
ldrne \rx, = S3C24XX_VA_UART
#if CONFIG_DEBUG_S3C_UART != 0 #if CONFIG_DEBUG_S3C_UART != 0
add \rx, \rx, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART) add \rp, \rp, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART)
add \rv, \rv, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART)
#endif #endif
.endm .endm

11
arch/arm/mach-s3c24a0/include/mach/debug-macro.S
View File

@ -10,13 +10,12 @@
#include <mach/map.h> #include <mach/map.h>
#include <plat/regs-serial.h> #include <plat/regs-serial.h>
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 ldr \rp, = S3C24XX_PA_UART
tst \rx, #1 ldr \rv, = S3C24XX_VA_UART
ldreq \rx, = S3C24XX_PA_UART
ldrne \rx, = S3C24XX_VA_UART
#if CONFIG_DEBUG_S3C_UART != 0 #if CONFIG_DEBUG_S3C_UART != 0
add \rx, \rx, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART) add \rp, \rp, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART)
add \rv, \rv, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART)
#endif #endif
.endm .endm

11
arch/arm/mach-s3c64xx/include/mach/debug-macro.S
View File

@ -21,13 +21,12 @@
* aligned and add in the offset when we load the value here. * aligned and add in the offset when we load the value here.
*/ */
.macro addruart, rx, rtmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 ldr \rp, = S3C_PA_UART
tst \rx, #1 ldr \rv, = (S3C_VA_UART + S3C_PA_UART & 0xfffff)
ldreq \rx, = S3C_PA_UART
ldrne \rx, = (S3C_VA_UART + S3C_PA_UART & 0xfffff)
#if CONFIG_DEBUG_S3C_UART != 0 #if CONFIG_DEBUG_S3C_UART != 0
add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) add \rp, \rp, #(0x400 * CONFIG_DEBUG_S3C_UART)
add \rv, \rv, #(0x400 * CONFIG_DEBUG_S3C_UART)
#endif #endif
.endm .endm

11
arch/arm/mach-s5p6442/include/mach/debug-macro.S
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@ -15,13 +15,12 @@
#include <mach/map.h> #include <mach/map.h>
#include <plat/regs-serial.h> #include <plat/regs-serial.h>
.macro addruart, rx, rtmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 ldr \rp, = S3C_PA_UART
tst \rx, #1 ldr \rv, = S3C_VA_UART
ldreq \rx, = S3C_PA_UART
ldrne \rx, = S3C_VA_UART
#if CONFIG_DEBUG_S3C_UART != 0 #if CONFIG_DEBUG_S3C_UART != 0
add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) add \rp, \rp, #(0x400 * CONFIG_DEBUG_S3C_UART)
add \rv, \rv, #(0x400 * CONFIG_DEBUG_S3C_UART)
#endif #endif
.endm .endm

11
arch/arm/mach-s5pc100/include/mach/debug-macro.S
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@ -22,13 +22,12 @@
* aligned and add in the offset when we load the value here. * aligned and add in the offset when we load the value here.
*/ */
.macro addruart, rx, rtmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 ldr \rp, = S3C_PA_UART
tst \rx, #1 ldr \rv, = S3C_VA_UART
ldreq \rx, = S3C_PA_UART
ldrne \rx, = S3C_VA_UART
#if CONFIG_DEBUG_S3C_UART != 0 #if CONFIG_DEBUG_S3C_UART != 0
add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) add \rp, \rp, #(0x400 * CONFIG_DEBUG_S3C_UART)
add \rv, \rv, #(0x400 * CONFIG_DEBUG_S3C_UART)
#endif #endif
.endm .endm

11
arch/arm/mach-s5pv210/include/mach/debug-macro.S
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@ -21,13 +21,12 @@
* aligned and add in the offset when we load the value here. * aligned and add in the offset when we load the value here.
*/ */
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 ldr \rp, = S3C_PA_UART
tst \rx, #1 ldr \rv, = S3C_VA_UART
ldreq \rx, = S3C_PA_UART
ldrne \rx, = S3C_VA_UART
#if CONFIG_DEBUG_S3C_UART != 0 #if CONFIG_DEBUG_S3C_UART != 0
add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) add \rp, \rp, #(0x400 * CONFIG_DEBUG_S3C_UART)
add \rv, \rv, #(0x400 * CONFIG_DEBUG_S3C_UART)
#endif #endif
.endm .endm

11
arch/arm/mach-s5pv310/include/mach/debug-macro.S
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@ -20,13 +20,12 @@
* aligned and add in the offset when we load the value here. * aligned and add in the offset when we load the value here.
*/ */
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 ldreq \rp, = S3C_PA_UART
tst \rx, #1 ldrne \rv, = S3C_VA_UART
ldreq \rx, = S3C_PA_UART
ldrne \rx, = S3C_VA_UART
#if CONFIG_DEBUG_S3C_UART != 0 #if CONFIG_DEBUG_S3C_UART != 0
add \rx, \rx, #(0x10000 * CONFIG_DEBUG_S3C_UART) add \rp, \rp, #(0x10000 * CONFIG_DEBUG_S3C_UART)
add \rv, \rv, #(0x10000 * CONFIG_DEBUG_S3C_UART)
#endif #endif
.endm .endm

36
arch/arm/mach-sa1100/include/mach/debug-macro.S
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@ -12,33 +12,37 @@
*/ */
#include <mach/hardware.h> #include <mach/hardware.h>
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 mrc p15, 0, \rp, c1, c0
tst \rx, #1 @ MMU enabled? tst \rp, #1 @ MMU enabled?
moveq \rx, #0x80000000 @ physical base address moveq \rp, #0x80000000 @ physical base address
movne \rx, #0xf8000000 @ virtual address movne \rp, #0xf8000000 @ virtual address
@ We probe for the active serial port here, coherently with @ We probe for the active serial port here, coherently with
@ the comment in arch/arm/mach-sa1100/include/mach/uncompress.h. @ the comment in arch/arm/mach-sa1100/include/mach/uncompress.h.
@ We assume r1 can be clobbered. @ We assume r1 can be clobbered.
@ see if Ser3 is active @ see if Ser3 is active
add \rx, \rx, #0x00050000 add \rp, \rp, #0x00050000
ldr r1, [\rx, #UTCR3] ldr \rv, [\rp, #UTCR3]
tst r1, #UTCR3_TXE tst \rv, #UTCR3_TXE
@ if Ser3 is inactive, then try Ser1 @ if Ser3 is inactive, then try Ser1
addeq \rx, \rx, #(0x00010000 - 0x00050000) addeq \rp, \rp, #(0x00010000 - 0x00050000)
ldreq r1, [\rx, #UTCR3] ldreq \rv, [\rp, #UTCR3]
tsteq r1, #UTCR3_TXE tsteq \rv, #UTCR3_TXE
@ if Ser1 is inactive, then try Ser2 @ if Ser1 is inactive, then try Ser2
addeq \rx, \rx, #(0x00030000 - 0x00010000) addeq \rp, \rp, #(0x00030000 - 0x00010000)
ldreq r1, [\rx, #UTCR3] ldreq \rv, [\rp, #UTCR3]
tsteq r1, #UTCR3_TXE tsteq \rv, #UTCR3_TXE
@ clear top bits, and generate both phys and virt addresses
lsl \rp, \rp, #8
lsr \rp, \rp, #8
orr \rv, \rp, #0xf8000000 @ virtual
orr \rp, \rp, #0x80000000 @ physical
@ if all ports are inactive, then there is nothing we can do
moveq pc, lr
.endm .endm
.macro senduart,rd,rx .macro senduart,rd,rx

7
arch/arm/mach-shark/include/mach/debug-macro.S
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@ -11,9 +11,10 @@
* *
*/ */
.macro addruart, rx, tmp .macro addruart, rp, rv
mov \rx, #0xe0000000 mov \rp, #0xe0000000
orr \rx, \rx, #0x000003f8 orr \rp, \rp, #0x000003f8
mov \rv, \rp
.endm .endm
.macro senduart,rd,rx .macro senduart,rd,rx

26
arch/arm/mach-tegra/include/mach/debug-macro.S
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@ -20,24 +20,28 @@
#include <mach/io.h> #include <mach/io.h>
.macro addruart,rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 ldreq \rp, =IO_APB_PHYS @ physical
tst \rx, #1 @ MMU enabled? ldrne \rv, =IO_APB_VIRT @ virtual
ldreq \rx, =IO_APB_PHYS @ physical
ldrne \rx, =IO_APB_VIRT @ virtual
#if defined(CONFIG_TEGRA_DEBUG_UART_NONE) #if defined(CONFIG_TEGRA_DEBUG_UART_NONE)
#error "A debug UART must be selected in the kernel config to use DEBUG_LL" #error "A debug UART must be selected in the kernel config to use DEBUG_LL"
#elif defined(CONFIG_TEGRA_DEBUG_UARTA) #elif defined(CONFIG_TEGRA_DEBUG_UARTA)
orr \rx, \rx, #0x6000 orr \rp, \rp, #0x6000
orr \rv, \rv, #0x6000
#elif defined(CONFIG_TEGRA_DEBUG_UARTB) #elif defined(CONFIG_TEGRA_DEBUG_UARTB)
ldr \tmp, =0x6040 orr \rp, \rp, #0x6000
orr \rx, \rx, \tmp orr \rp, \rp, #0x40
orr \rv, \rv, #0x6000
orr \rv, \rv, #0x40
#elif defined(CONFIG_TEGRA_DEBUG_UARTC) #elif defined(CONFIG_TEGRA_DEBUG_UARTC)
orr \rx, \rx, #0x6200 orr \rp, \rp, #0x6200
orr \rv, \rv, #0x6200
#elif defined(CONFIG_TEGRA_DEBUG_UARTD) #elif defined(CONFIG_TEGRA_DEBUG_UARTD)
orr \rx, \rx, #0x6300 orr \rp, \rp, #0x6300
orr \rv, \rv, #0x6300
#elif defined(CONFIG_TEGRA_DEBUG_UARTE) #elif defined(CONFIG_TEGRA_DEBUG_UARTE)
orr \rx, \rx, #0x6400 orr \rp, \rp, #0x6400
orr \rv, \rv, #0x6400
#endif #endif
.endm .endm

11
arch/arm/mach-u300/include/mach/debug-macro.S
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@ -10,13 +10,12 @@
*/ */
#include <mach/hardware.h> #include <mach/hardware.h>
.macro addruart, rx, tmp .macro addruart, rp, rv
/* If we move the address using MMU, use this. */ /* If we move the address using MMU, use this. */
mrc p15, 0, \rx, c1, c0 ldr \rp, = U300_SLOW_PER_PHYS_BASE @ MMU off, physical address
tst \rx, #1 @ MMU enabled? ldr \rv, = U300_SLOW_PER_VIRT_BASE @ MMU on, virtual address
ldreq \rx, = U300_SLOW_PER_PHYS_BASE @ MMU off, physical address orr \rp, \rp, #0x00003000
ldrne \rx, = U300_SLOW_PER_VIRT_BASE @ MMU on, virtual address orr \rv, \rv, #0x00003000
orr \rx, \rx, #0x00003000
.endm .endm
#include <asm/hardware/debug-pl01x.S> #include <asm/hardware/debug-pl01x.S>

8
arch/arm/mach-ux500/include/mach/debug-macro.S
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@ -18,11 +18,9 @@
#define UX500_UART(n) __UX500_UART(n) #define UX500_UART(n) __UX500_UART(n)
#define UART_BASE UX500_UART(CONFIG_UX500_DEBUG_UART) #define UART_BASE UX500_UART(CONFIG_UX500_DEBUG_UART)
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 ldr \rp, =UART_BASE @ no, physical address
tst \rx, #1 @ MMU enabled? ldr \rv, =IO_ADDRESS(UART_BASE) @ yes, virtual address
ldreq \rx, =UART_BASE @ no, physical address
ldrne \rx, =IO_ADDRESS(UART_BASE) @ yes, virtual address
.endm .endm
#include <asm/hardware/debug-pl01x.S> #include <asm/hardware/debug-pl01x.S>

12
arch/arm/mach-versatile/include/mach/debug-macro.S
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@ -11,13 +11,11 @@
* *
*/ */
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 mov \rp, #0x001F0000
tst \rx, #1 @ MMU enabled? orr \rp, \rp, #0x00001000
moveq \rx, #0x10000000 orr \rv, \rp, #0xf1000000 @ virtual base
movne \rx, #0xf1000000 @ virtual base orr \rp, \rp, #0x10000000 @ physical base
orr \rx, \rx, #0x001F0000
orr \rx, \rx, #0x00001000
.endm .endm
#include <asm/hardware/debug-pl01x.S> #include <asm/hardware/debug-pl01x.S>

10
arch/arm/mach-vexpress/include/mach/debug-macro.S
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@ -12,12 +12,10 @@
#define DEBUG_LL_UART_OFFSET 0x00009000 #define DEBUG_LL_UART_OFFSET 0x00009000
.macro addruart,rx,tmp .macro addruart,rp,rv
mrc p15, 0, \rx, c1, c0 mov \rp, #DEBUG_LL_UART_OFFSET
tst \rx, #1 @ MMU enabled? orr \rv, \rp, #0xf8000000 @ virtual base
moveq \rx, #0x10000000 orr \rp, \rp, #0x10000000 @ physical base
movne \rx, #0xf8000000 @ virtual base
orr \rx, \rx, #DEBUG_LL_UART_OFFSET
.endm .endm
#include <asm/hardware/debug-pl01x.S> #include <asm/hardware/debug-pl01x.S>

8
arch/arm/plat-mxc/include/mach/debug-macro.S
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@ -62,11 +62,9 @@
#define UART_PADDR MXC91231_UART2_BASE_ADDR #define UART_PADDR MXC91231_UART2_BASE_ADDR
#define UART_VADDR MXC91231_IO_ADDRESS(MXC91231_UART2_BASE_ADDR) #define UART_VADDR MXC91231_IO_ADDRESS(MXC91231_UART2_BASE_ADDR)
#endif #endif
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 ldr \rp, =UART_PADDR @ physical
tst \rx, #1 @ MMU enabled? ldr \rv, =UART_VADDR @ virtual
ldreq \rx, =UART_PADDR @ physical
ldrne \rx, =UART_VADDR @ virtual
.endm .endm
.macro senduart,rd,rx .macro senduart,rd,rx

8
arch/arm/plat-spear/include/plat/debug-macro.S
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@ -14,11 +14,9 @@
#include <linux/amba/serial.h> #include <linux/amba/serial.h>
#include <mach/spear.h> #include <mach/spear.h>
.macro addruart, rx .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 mov \rp, #SPEAR_DBG_UART_BASE @ Physical base
tst \rx, #1 @ MMU enabled? mov \rv, #VA_SPEAR_DBG_UART_BASE @ Virtual base
moveq \rx, #SPEAR_DBG_UART_BASE @ Physical base
movne \rx, #VA_SPEAR_DBG_UART_BASE @ Virtual base
.endm .endm
.macro senduart, rd, rx .macro senduart, rd, rx

11
arch/arm/plat-stmp3xxx/include/mach/debug-macro.S
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@ -16,13 +16,10 @@
* http://www.gnu.org/copyleft/gpl.html * http://www.gnu.org/copyleft/gpl.html
*/ */
.macro addruart, rx, tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 mov \rp, #0x00070000
tst \rx, #1 @ MMU enabled? add \rv, \rp, #0xf0000000 @ virtual base
moveq \rx, #0x80000000 @ physical base address add \rp, \rp, #0x80000000 @ physical base
addeq \rx, \rx, #0x00070000
movne \rx, #0xf0000000 @ virtual base
addne \rx, \rx, #0x00070000
.endm .endm
.macro senduart,rd,rx .macro senduart,rd,rx

11
arch/arm/plat-tcc/include/mach/debug-macro.S
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@ -9,12 +9,11 @@
* *
*/ */
.macro addruart,rx,tmp .macro addruart, rp, rv
mrc p15, 0, \rx, c1, c0 moveq \rp, #0x90000000 @ physical base address
tst \rx, #1 @ MMU enabled? movne \rv, #0xF1000000 @ virtual base
moveq \rx, #0x90000000 @ physical base address orr \rp, \rp, #0x00007000 @ UART0
movne \rx, #0xF1000000 @ virtual base orr \rv, \rv, #0x00007000 @ UART0
orr \rx, \rx, #0x00007000 @ UART0
.endm .endm
.macro senduart,rd,rx .macro senduart,rd,rx